Patents by Inventor Benjamin Szu-Min Lin
Benjamin Szu-Min Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7052808Abstract: An apparatus, system and method to compensate for the proximity effects in the imaging of patterns in a photolithography process. A light exposure of a photoresist layer is effectuated in predetermined patterns through an exposure mask having light-transmissive openings in correspondence to the predetermined patterns. The exposure mask has areas densely populated with the light-transmissive openings and areas sparsely populated with the light-transmissive openings. Light is attenuated through the densely populated light-transmissive openings by a different amount than through the sparsely populated light-transmissive openings.Type: GrantFiled: February 11, 2003Date of Patent: May 30, 2006Assignees: Infineon Technologies AG, United Microelectronics Co.Inventors: Hang Yip Liu, Sebastian Schmidt, Benjamin Szu-Min Lin
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Patent number: 7018788Abstract: A dual phase shifting mask (PSM)/double exposure lithographic process for manufacturing a shrunk semiconductor device. A semiconductor wafer having a photoresist layer coated thereon is provided. A first phase shift mask is disposed over the semiconductor wafer and implementing a first exposure process to expose the photoresist layer to light transmitted through the first phase shift mask so as to form a latent pattern comprising a peripheral unexposed line pattern in the photoresist layer. The first phase shift mask is then replaced with a second phase shift mask and implementing a second exposure process to expose the photoresist layer to light transmitted through the second phase shift mask so as to remove the peripheral unexposed line pattern.Type: GrantFiled: November 30, 2004Date of Patent: March 28, 2006Assignee: United Microelectronics Corp.Inventor: Benjamin Szu-Min Lin
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Publication number: 20050196951Abstract: A method of forming at least one wire on a substrate comprising at least one conductive region is provided. AnAn insulatingayer is disposed on the substrate. The method includes forming a hard mask layer on the insulating layer followed by forming at least one recess by removing portions of the hard mask layer and the insulating layer, forming a light blocking layer on the hard mask layer and the recess, and the light blocking layer and the hard mask layer forming a composite layer, forming a gap filling layer filling up the recess on the light blocking layer, forming a photoresist layer on the gap filling layer, aligning a photo mask with the recess by utilizing the composite layer as a mask, and performing an exposure/development process to form at least one pattern above the recess in the photoresist layer.Type: ApplicationFiled: March 8, 2004Publication date: September 8, 2005Inventors: Benjamin Szu-Min Lin, Shou-Wan Huang
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Publication number: 20050074678Abstract: A dual phase shifting mask (PSM)/double exposure lithographic process for manufacturing a shrunk semiconductor device. A semiconductor wafer having a photoresist layer coated thereon is provided. A first phase shift mask is disposed over the semiconductor wafer and implementing a first exposure process to expose the photoresist layer to light transmitted through the first phase shift mask so as to form a latent pattern comprising a peripheral unexposed line pattern in the photoresist layer. The first phase shift mask is then replaced with a second phase shift mask and implementing a second exposure process to expose the photoresist layer to light transmitted through the second phase shift mask so as to remove the peripheral unexposed line pattern.Type: ApplicationFiled: November 30, 2004Publication date: April 7, 2005Inventor: Benjamin Szu-Min Lin
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Patent number: 6866967Abstract: A phase shifting mask is disclosed in this present invention. The above-mentioned phase shifting mask comprises a quartz layer and a plurality of transmission adjustor layer onto the quartz layer. By employing the above-mentioned phase shifting mask, the material of the transmission adjustors has not to be changed with the light source. Furthermore, the contrast of the phase shifting mask of this invention is better than the contrast of the binary mask and the half-tone mask in the prior art. Therefore, this invention provides a more efficient mask, and the phase shifting mask according to this present invention can improve the resolution in photolithography.Type: GrantFiled: July 3, 2002Date of Patent: March 15, 2005Assignee: United Microelectronics Corp.Inventor: Benjamin Szu-Min Lin
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Patent number: 6849393Abstract: A phase shifting lithographic process capable of creating a shrunk fine line pattern on a photoresist layer coated on a semiconductor wafer is disclosed. A first phase shift mask is prepared, which comprises thereon a first phase shift clear area, a second phase shift clear area situated adjacent to the first phase shift clear area, a vertical control chrome line section disposed at a boundary between the first phase shift clear area and the second phase shift clear area, and a horizontal opaque area connected to the vertical control chrome line section in an orthogonal manner.Type: GrantFiled: February 14, 2003Date of Patent: February 1, 2005Assignee: United Microelectronics Corp.Inventor: Benjamin Szu-Min Lin
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Patent number: 6844143Abstract: A photolithographic process that involves building a sandwich photoresist structure. A first photoresist layer is formed over a substrate. An anti-reflection layer is formed over the first photoresist layer. A second photoresist layer is formed over the anti-reflection layer. A first photo-exposure is conducted and the exposed second photoresist layer is developed to pattern the second photoresist layer and the anti-reflection layer. Using the second photoresist layer and the anti-reflection layer as a mask, a second photo-exposure and a second photoresist development are conducted to pattern the first photoresist layer.Type: GrantFiled: August 2, 2002Date of Patent: January 18, 2005Assignee: United Microelectronics Corp.Inventors: Benjamin Szu-Min Lin, Vencent Chang, George Liu, Cheng-Chung Chen
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Publication number: 20040241587Abstract: There is a grain phenomenon issue of rough sidewall for patterning. Thus, imprecise grain profiles would be observed. As the critical dimensions of integrated circuit microelectronics fabrication device have decreased, the effect of grain phenomenon have become more pronounced. A profile improvement method with a thermal-compressive material and a thermal-compressive process is provided to solve the grain phenomenon issue for baseline of 0.09 um generation and beyond. With this material, the profile can be improved no matter in top view or lateral view. Furthermore, there are 0.1 um IDOF improvement and better physical etching performance.Type: ApplicationFiled: May 27, 2003Publication date: December 2, 2004Inventors: Hui-Ling Huang, Benjamin Szu-Min Lin, Cheng-Chung Chen, George Liu
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Publication number: 20040219437Abstract: An invention of lithography process using an improved reflection mask is provided for extreme ultraviolet (EUV) lithography. In the process an incident EUV is transmitted onto the reflection mask at a grazing incident angle. Therefore a reflected EUV develops a pattern image to a photo resist layer on the surface of the wafer, wherein the shape of the pattern image is dependent on the shape of a plurality of reflective regions on the surface of the reflection mask. Specially, the improved reflection mask is more easily fabricated. The surface roughness and the defects of the reflection mask are also more easily controlled. The improved EUV lithography process is more efficiently and cheap.Type: ApplicationFiled: May 1, 2003Publication date: November 4, 2004Inventor: Benjamin Szu-Min Lin
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Publication number: 20040166447Abstract: First of all, a semiconductor substrate with a photoresist layer thereon is provided. Then a plurality of pattern photoresists with a first line width are formed on the semiconductor substrate by a photolithography process. Next, an acid-process is performed to form a diffusion layer having the acid-based materials on the plurality of pattern photoresists and the semiconductor substrate. Afterward, a re-baking process is performed to diffuse the acid-based materials within diffusion layer into the plurality of pattern photoresists such that the acid-based materials chain-react with the plurality of pattern photoresist located on the diffusion depth of the acid-based materials so as to form a plurality of reaction layers within the skin layers of the plurality of pattern photoresists, wherein the diffusion depth of the acid-based materials in the plurality of pattern photoresists depends on the diffuse rate of the acid-based materials in the acid-process.Type: ApplicationFiled: February 26, 2003Publication date: August 26, 2004Inventors: Vencent Chang, Chia-Chen Chen, George Liu, Benjamin Szu-Min Lin, Cheng-Chung Chen
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Publication number: 20040166448Abstract: First of all, a semiconductor substrate with a photoresist layer thereon is provided. Then a photoresist region is formed on the semiconductor substrate by a photolithography process. Next, a chemical reaction layer is formed within the photoresist region. Subsequently, a developing process is performed to remove the chemical reaction layer within the photoresist region to shrink the photoresist region in line width on the semiconductor substrate.Type: ApplicationFiled: November 21, 2003Publication date: August 26, 2004Applicant: United Microelectronics Corp.Inventors: Vencent Chang, George Liu, Chia-Chen Chen, Benjamin Szu-Min Lin, Cheng-Chung Chen
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Publication number: 20040161675Abstract: A phase shifting lithographic process capable of creating a shrunk fine line pattern on a photoresist layer coated on a semiconductor wafer is disclosed. A first phase shift mask is prepared, which comprises thereon a first phase shift clear area, a second phase shift clear area situated adjacent to the first phase shift clear area, a vertical control chrome line section disposed at a boundary between the first phase shift clear area and the second phase shift clear area, and a horizontal opaque area connected to the vertical control chrome line section in an orthogonal manner.Type: ApplicationFiled: February 14, 2003Publication date: August 19, 2004Inventor: Benjamin Szu-Min Lin
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Publication number: 20040157135Abstract: An apparatus, system and method to compensate for the proximity effects in the imaging of patterns in a photolithography process. A light exposure of a photoresist layer is effectuated in predetermined patterns through an exposure mask having light-transmissive openings in correspondence to the predetermined patterns. The exposure mask has areas densely populated with the light-transmissive openings and areas sparsely populated with the light-transmissive openings. Light is attenuated through the densely populated light-transmissive openings by a different amount than through the sparsely populated light-transmissive openings.Type: ApplicationFiled: February 11, 2003Publication date: August 12, 2004Inventors: Hang Yip Liu, Sebastian Schmidt, Benjamin Szu-Min Lin
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Publication number: 20040106067Abstract: A method for shrinking critical dimension of semiconductor devices includes forming a first pattern of a photoresist layer on a semiconductor device layer, by performing a blanket exposing process to expose the photoresist layer and the exposed semiconductor device layer to light having a wavelength that can be absorbed by the photoresist layer to provide the photoresist layer with a predetermined energy per unit area, thereby producing photo generated acids therein. A first thermal process is performed to diffuse the photo-generated acids formed within the photoresist layer and to equalize glass transition temperature (Tg) of the photoresist layer. A second thermal process is thereafter carried out. The first thermal process is carried out under a temperature lower than Tg of the photoresist layer.Type: ApplicationFiled: November 28, 2002Publication date: June 3, 2004Inventors: Benjamin Szu-Min Lin, Hui-Ling Huang
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Patent number: 6740473Abstract: A method for shrinking critical dimension of semiconductor devices includes forming a first pattern of a photoresist layer on a semiconductor device layer, by performing a blanket exposing process to expose the photoresist layer and the exposed semiconductor device layer to light having a wavelength that can be absorbed by the photoresist layer to provide the photoresist layer with a predetermined energy per unit area, thereby producing photo generated acids therein. A first thermal process is performed to diffuse the photo-generated acids formed within the photoresist layer and to equalize glass transition temperature (Tg) of the photoresist layer. A second thermal process is thereafter carried out. The first thermal process is carried out under a temperature lower than Tg of the photoresist layer.Type: GrantFiled: November 28, 2002Date of Patent: May 25, 2004Assignee: United Microelectronics Corp.Inventors: Benjamin Szu-Min Lin, Hui-Ling Huang
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Publication number: 20040075179Abstract: A structural design for an alignment mark on a substrate having a plurality of layers thereon. The alignment mark is formed within a first dielectric layer above the substrate and a patterned metallic layer is formed within a second dielectric layer underneath the first dielectric layer. The patterned metallic layer includes a group of longitudinal metallic lines separated from each other by a distance smaller than the wavelength of light used in the aligning operation.Type: ApplicationFiled: December 5, 2002Publication date: April 22, 2004Applicant: UNITED MICROELECTRONICS CORPInventors: George Liu, Benjamin Szu-Min Lin
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Publication number: 20040008879Abstract: A method for detecting wafer level defect by die-to-aerial image comparison is disclosed. The method utilizes patterns in a database which are used to form photo masks utilized in photolithography processes to simulate aerial images. The simulation aerial images are then compared with die images produced by the photo masks to find out wafer level defects without missing any repeating defect induced by the photo masks and mistaking any process deviation as a wafer level defect.Type: ApplicationFiled: July 11, 2002Publication date: January 15, 2004Applicant: UNITED MICROELECTRONICS CORP.Inventor: Benjamin Szu-Min Lin
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Publication number: 20040009434Abstract: A photolithographic process that involves building a sandwich photoresist structure. A first photoresist layer is formed over a substrate. An anti-reflection layer is formed over the first photoresist layer. A second photoresist layer is formed over the anti-reflection layer. A first photo-exposure is conducted and the exposed second photoresist layer is developed to pattern the second photoresist layer and the anti-reflection layer. Using the second photoresist layer and the anti-reflection layer as a mask, a second photo-exposure and a second photoresist development are conducted to pattern the first photoresist layer.Type: ApplicationFiled: August 2, 2002Publication date: January 15, 2004Applicant: UNITED MICROELECTRONICS CORP.Inventors: Benjamin Szu-Min Lin, Vencent Chang, George Liu, Cheng-Chung Chen
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Publication number: 20040005505Abstract: A phase shifting mask is disclosed in this present invention. The above-mentioned phase shifting mask comprises a quartz layer and a plurality of transmission adjustor layer onto the quartz layer. By employing the above-mentioned phase shifting mask, the material of the transmission adjustors has not to be changed with the light source. Furthermore, the contrast of the phase shifting mask of this invention is better than the contrast of the binary mask and the half-tone mask in the prior art. Therefore, this invention provides a more efficient mask, and the phase shifting mask according to this present invention can improve the resolution in photolithography.Type: ApplicationFiled: July 3, 2002Publication date: January 8, 2004Applicant: UNITED MICROELECTRONICS CORPInventor: Benjamin Szu-Min Lin
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Patent number: 6534412Abstract: A method for removing a native oxide layer using hydrogen to react with the native oxide layer is described. Oxygen atoms in silicon dioxide is replaced to achieve the purpose of native oxide removal. Additionally, laser enhancement is used to lower the reaction temperature to between 200°-700° C. The purpose of low-temperature native oxide removal is thus achieved.Type: GrantFiled: October 11, 2000Date of Patent: March 18, 2003Assignee: United Microelectronics Corp.Inventor: Benjamin Szu-Min Lin