Abstract: Articles including repellent surfaces and methods of making and using these articles are disclosed. The repellant surface can comprise a polymer having a roughened surface and a fluorinated silane and a lubricating liquid deposited on the roughened surface. The repellent surface, and by extension the articles described herein, can exhibit superomniphobic properties. The methods for producing the repellant surface can comprise dissolving a polymer in a solvent to produce a polymer solution and optionally adding a non-solvent to the polymer solution to produce a casting mixture. The polymer solution or casting mixture can be deposited on a surface of a substrate and the solvent and/or the non-solvent evaporated to provide a coated-substrate having a roughened surface. A functional layer comprising a fluorinated silane followed by a lubricating liquid can be deposited on the roughened surface to form the repellant surface.

Abstract: A first access point (AP) detects a communication between a client device and a second AP. The first AP determines at least one criteria for AP steering is satisfied. AP steering is then used by the first AP to cause the client device to associate with the first AP, or a particular network of the first AP. For example, the first AP may transmit a disassociation message to the client device. The disassociation message may identify the second AP associated with the client device and cause the client device to disassociate from the second AP. After the client device disassociates from the second AP, the client device may select and associate with the first AP. The first AP may manage which network the client device associates with using a blacklist at the first AP.

Abstract: Methods, systems, and devices for wireless communication are described. Methods, systems, and devices provide for determining or identifying a client device that is monopolizing a channel associated with a first basic service set (BSS). Once identified, a second BSS is dynamically created and configured with parameters that are throttled with respect to the first BSS. The client device is steered to the second BSS and is prevented from reassociating with the first BSS until a change in device status.

Abstract: Magnetic random access memory (MRAM) packages with magnetic shield protections and methods of forming thereof are presented. Package contact traces are formed on the first major surface of the package substrate and package balls are formed on the second major surface of the package substrate. A die having active and inactive surfaces is provided on the first major surface of the package substrate. The die includes a magnetic storage element, such as an array of magnetic tunnel junctions (MTJs), formed in the die, die microbumps formed on the active surface. The package includes a top magnetic shield layer formed on the inactive surface of the die. The package may also include a first bottom magnetic shield in the form of magnetic shield traces disposed below the package contact traces. The package may further include a second bottom magnetic shield in the form of magnetic permeable underfill dielectric material.

Abstract: Provided herein are methods of making functional surfaces, including liquid repellant surfaces that can exhibit selective wetting properties. Methods of forming a functional surfaces can comprise providing a dispersion of nanoparticles; and applying the dispersion to a polymer surface to form a multiplicity of re-entrant structures embedded within and protruding from the polymer surface. The re-entrant structures are formed from aggregates of the nanoparticles. Also provided are functional surfaces prepared by these methods, as well as articles comprising these functional surfaces.

Abstract: Emerging memory chips and methods for forming an emerging memory chip are presented. For example, magnetoresistive random access memory (MRAM) chip magnetic shielding and vertical stacking capabilities processed at the wafer-level are disclosed. The method includes providing a magnetic shield in the through silicon vias and/or through silicon trenches surrounding or adjacent to magnetic tunnel junction (MTJ) array within the MRAM region and also at the front side and back side of the chip. Magnetic shield in the through silicon trenches connects front side and back side magnetic shield. Magnetic shield in the through silicon vias provides vertical stacking, magnetic shielding and electrical connection of the MRAM chips to form 3D IC packages. This magnetic shielding method is applicable for both in-plane and perpendicular MRAM chips. The MTJ array is formed in the MRAM region and in between adjacent inter layer dielectric (ILD) levels of the upper ILD layer in the back end of line (BEOL) of the MRAM chip.

Abstract: The present invention relates to a method for storing of network host provided content at a non-host location. In accordance with an embodiment, an event corresponding to storing of at least one network host provided content or web page is detected on a device where a user accessing a browsing application to view the web page. Upon detecting the network host provided content or web page and retrieval information corresponding to the web page is stored at a non-host location in a mapped relationship with each other. The retrieval information is a information of the searchable type based on the information present in the network host provided content.

Abstract: A system for pre-fetching a data frame from a system memory to a cache memory includes a processor, a queue manager, and a pre-fetch manager. The processor issues a de-queue request associated with the data frame. The queue manager receives the de-queue request, identifies a frame descriptor associated with the data frame, and generates a pre-fetch hint signal. The pre-fetch manager receives the pre-fetch hint signal and generates a pre-fetch signal and enables the cache memory to pre-fetch the data frame. Subsequently, the queue manager de-queues the frame descriptor. The processor receives the frame descriptor and reads the data frame from the cache memory.

Abstract: A bioprocess comprises regulating pH of trade effluent wastewater, adding and mixing a first bio-additive, adding and mixing a flocculant/coagulant, filtering through a filter device, adding, mixing of a second bio-additive with aeration, and adding and mixing of a third bio-additive with aeration. Treatment can be discontinued or continued by adding and mixing of hydrogen peroxide with aeration, and optionally exposing treated effluent to UV disinfectant. The treated effluent can be recycled or disposed. Compositions of bio-additives 1, 2 and 3 comprise a group of highly selective and effective microorganisms and enzymes that are immobilized on carrier support matrices from a group of alginate, chitosan, polyacrylamides, k-carrageenan and agarose.

Abstract: Multilayer coatings, articles comprising multilayer coatings, and methods of making and using thereof are described herein. The multilayer coating can contain two or more oppositely charged alternating layers, comprising at least one fixed layer comprising a first polymer and at least one inorganic layer comprising a plurality of particles, wherein the inorganic layer forms a surface of the two or more oppositely charged alternating layers. The multilayer coating can further contain an adhesion layer disposed on the at least one inorganic layer, the adhesion layer comprising a second polymer having a charge opposite that of the plurality of particles. The multilayer coating can also contain a functional layer disposed on the adhesion layer, wherein the functional layer forms a surface of the multilayer coating. In some embodiments, the coatings can separate a liquid mixture comprising a polar liquid and a non-polar liquid.

Abstract: A data processing system includes a host processor, a co-processor, and a memory that includes multiple buffer descriptor (BD) rings. The host processor includes multiple cores that execute multiple threads to process data packets stored in the memory. The host processor generates a notification command based on multiple context switch events that occur in the cores. The notification command indicates a context switch event type and BD ring IDs associated with BD rings to be polled by the co-processor. The BD rings are referred to as active BD rings. The co-processor polls only the active BD rings based on the notification command and processes the data packets associated with the active BD rings.

Abstract: Emerging memory chips and methods for forming an emerging memory chip are presented. For example, magnetoresistive random access memory (MRAM) chip magnetic shielding and vertical stacking capabilities processed at the wafer-level are disclosed. The method includes providing a magnetic shield in the through silicon vias and/or through silicon trenches surrounding or adjacent to magnetic tunnel junction (MTJ) array within the MRAM region and also at the front side and back side of the chip. Magnetic shield in the through silicon trenches connects front side and back side magnetic shield. Magnetic shield in the through silicon vias provides vertical stacking, magnetic shielding and electrical connection of the MRAM chips to form 3D IC packages. This magnetic shielding method is applicable for both in-plane and perpendicular MRAM chips. The MTJ array is formed in the MRAM region and in between adjacent inter layer dielectric (ILD) levels of the upper ILD layer in the back end of line (BEOL) of the MRAM chip.

Abstract: Emerging memory chips and methods for forming an emerging memory chip are presented. For example, magnetic random access memory (MRAM) chip magnetic shielding and methods of forming a magnetic shield processed at the wafer-level are disclosed. The method includes providing a magnetic shield at the front side of the chip, back side of the chip, and also in the deep trenches surrounding or adjacent to magnetic tunnel junction (MTJ) array within the prime die region. Magnetic shield in the deep trenches connects front side and back side magnetic shield. This magnetic shielding method is applicable for both in-plane and perpendicular MRAM chips. The MTJ array is formed in the prime die region and in between adjacent inter layer dielectric (ILD) levels of the upper ILD layer in the back end of line (BEOL) of the MRAM chip.

Abstract: Magnetic random access memory (MRAM) fan-out wafer level packages with package level and chip level magnetic shielding and methods of forming these magnetic shields processed at the wafer-level are disclosed. The method includes providing a MRAM wafer prepared with a plurality of MRAM dies. The MRAM wafer is processed to form a magnetic shield layer over the front side of the MRAM wafer, and the wafer is separated into a plurality of individual dies. An individual MRAM die includes front, back and lateral surfaces and the magnetic shield layer is disposed over the front surface of the MRAM die. Magnetic shield structures are provided over the individual MRAM dies. The magnetic shield structure encapsulates and surrounds back and lateral surfaces of the MRAM die. An encapsulation layer is formed to cover the individual MRAM dies which are provided with magnetic shield structures.

Abstract: Emerging memory chips and methods for forming an emerging memory chip are presented. For example, magnetic random access memory (MRAM) chip magnetic shielding and methods of forming a magnetic shield processed at the device-level are disclosed. The method includes providing a magnetic shield structure that is substantially surrounding a magnetic tunnel junction (MTJ) bit or device of a MTJ array within the MRAM region. The magnetic shield may be configured in the form of a cylindrical shield structure or magnetic shield spacer that substantially surrounds the MTJ bit or device. The magnetic shield structure in the form of cylindrical shield structure or magnetic shield spacer may include top and/or bottom plate shield. The magnetic shield structure in various forms and configurations protect the MTJ stack from external or local magnetic fields.

Abstract: This disclosure is directed to nanocomposite compositions that are suitable for air bladders, innertubes, innerliners and other desirable air-retention articles. In particular, this disclosure is directed to compositions that include the nanocomposite, the nanocomposite made in such that its air-retention properties are much improved over what is known, while maintaining desirable elasticity and processability. In a particular aspect, an air-retention article such as an innerliner if formed by first contacting a desirable elastomer, especially a functionalized poly(isobutylene-co-p-methylstyrene) elastomer, with one or more layered fillers such as a clay described further below, and also contacting one or more processing aids, and one or more solvents to form an nanocomposite composition.

Abstract: Magnetic random access memory (MRAM) packages with magnetic shield protections and methods of forming thereof are presented. Package contact traces are formed on the first major surface of the package substrate and package balls are formed on the second major surface of the package substrate. A die having active and inactive surfaces is provided on the first major surface of the package substrate. The die includes a magnetic storage element, such as an array of magnetic tunnel junctions (MTJs), formed in the die, die microbumps formed on the active surface. The package includes a top magnetic shield layer formed on the inactive surface of the die. The package may also include a first bottom magnetic shield in the form of magnetic shield traces disposed below the package contact traces. The package may further include a second bottom magnetic shield in the form of magnetic permeable underfill dielectric material.

Abstract: A data processing system includes a host processor, a co-processor, and a memory that includes multiple buffer descriptor (BD) rings. The host processor includes multiple cores that execute multiple threads to process data packets stored in the memory. The host processor generates a notification command based on multiple context switch events that occur in the cores. The notification command indicates a context switch event type and BD ring IDs associated with BD rings to be polled by the co-processor. The BD rings are referred to as active BD rings. The co-processor polls only the active BD rings based on the notification command and processes the data packets associated with the active BD rings.

Abstract: A first access point (AP) detects a communication between a client device and a second AP. The first AP determines at least one criteria for AP steering is satisfied. AP steering is then used by the first AP to cause the client device to associate with the first AP, or a particular network of the first AP. For example, the first AP may transmit a disassociation message to the client device. The disassociation message may identify the second AP associated with the client device and cause the client device to disassociate from the second AP. After the client device disassociates from the second AP, the client device may select and associate with the first AP. The first AP may manage which network the client device associates with using a blacklist at the first AP.

Abstract: A system for managing data packets has multiple cores, a data buffer, a hardware accelerator, and an interrupt controller. The interrupt controller transmits a first interrupt signal to a first one of the cores based on a first hardware signal received from the hardware accelerator. The first core creates a copy of buffer descriptors (BD) of a buffer descriptor ring that correspond to the data packets in the data buffer in a first virtual queue and indicates to the hardware accelerator that the data packets are processed. If there are additional data packets, the interrupt controller transmits a second interrupt signal to a second core, which performs the same steps as performed by the first core. The first and the second cores simultaneously process the data packets associated with the BDs in the first and second virtual queues, respectively.