Abstract: Methods and arrangements for a radix sort with a read only key. A plurality of keys are received, an array and a link table are populated for the first digit of the keys based upon the keys; and an array and a link table are populated for each successive digit of the keys based upon the array and link table populated for the preceding digit of the keys. Embodiments may be implemented in both hardware (FPGAs, ASICs, information handling devices, etc.) and software. Other embodiments are also disclosed and claimed.

Abstract: Embodiments include methods, systems and computer program products for providing an extendable job structure for executing instructions on an accelerator. The method includes creating a number of data descriptor blocks, each having a fixed number of memory location addresses and a pointer to a next of the number of the data descriptor block. The method further includes creating a last data descriptor block having the fixed number of memory location addresses and a last block indicator. Based on determining that additional memory is required for executing instructions on the accelerator, the method includes modifying the last data descriptor block to become a data extender block having a pointer to one of one or more new data descriptor blocks and creating a new last data descriptor block.

Abstract: Methods and arrangements for facilitating accelerations of database functions. A field programmable gate array is incorporated. At least one query control block is incorporated in the field programmable gate array, and database management system operations are accelerated via the field programmable gate array. The accelerating includes employing the at least one query control block to execute a query without reconfiguring the field programmable gate array.

Abstract: Methods and arrangements for facilitating accelerations of database functions. A field programmable gate array is incorporated. At least one query control block is incorporated in the field programmable gate array, and database management system operations are accelerated via the field programmable gate array. The accelerating includes employing the at least one query control block to execute a query without reconfiguring the field programmable gate array.

Abstract: Embodiments include methods, systems and computer program products for offloading multiple processing operations to an accelerator. Aspects include receiving a database query from an application, performing an analysis on the query, and identifying a plurality of available accelerators. Aspects further include retrieving cost information for one or more templates available on each of the plurality of available accelerators, determining a query execution plan based on the cost information and the analysis on the query, and offloading one or more query operations to at least one of the plurality of accelerators based on the query execution plan.

Abstract: Embodiments include methods, systems and computer program products for performing a tournament tree sort on a hardware accelerator. The method includes receiving a plurality of key values by the hardware accelerator, storing each the plurality of keys into a location on a memory of the hardware accelerator, and creating a pointer to each of the locations of the plurality of keys. The method also includes storing the pointer to each of the plurality of keys into a first array stored by the hardware accelerator, sorting the plurality of keys by ordering the pointers in the first array and by using a second array for storing the pointers, wherein the sorting identifies a winning key from the plurality of keys in the memory, and outputting the winning key.

Abstract: Embodiments include methods, systems and computer program products a for offloading multiple processing operations to an accelerator includes receiving, by a processing device, a database query from an application. The method also includes performing analysis on the database query and selecting an accelerator template from a plurality of accelerator templates based on the analysis of the database query. The method further includes transmitting an indication of the accelerator template to the accelerator and executing at least a portion of the database query on the accelerator.

Abstract: Embodiments include methods, systems and computer program products for performing a tournament tree sort on a hardware accelerator. The method includes receiving a plurality of key values by the hardware accelerator, storing each the plurality of keys into a location on a memory of the hardware accelerator, and creating a pointer to each of the locations of the plurality of keys. The method also includes storing the pointer to each of the plurality of keys into a first array stored by the hardware accelerator, sorting the plurality of keys by ordering the pointers in the first array and by using a second array for storing the pointers, wherein the sorting identifies a winning key from the plurality of keys in the memory, and outputting the winning key.

Abstract: Embodiments include methods, systems and computer program products for performing a composite sort on a tunable hardware sort engine includes determining desired sort performance parameters, configuring a composite sort engine based on the desired sort performance parameters, and receiving a plurality of keys having a payload associated with each of the plurality of keys. The method also includes reserving DRAM storage for each of the payloads, generating a tag for each of the plurality of keys, the tag identifying the DRAM storage reserved for each of the payloads, and storing the payloads in the portions of the DRAM storage. The method further includes generating a composite key for each of the plurality of keys, sorting the composite keys by the composite sort engine, and retrieving the payloads associated with the sorted composite keys from the DRAM storage. The method also includes outputting the payloads associated the sorted composite keys.

Abstract: Embodiments include methods, systems and computer program products a for offloading multiple processing operations to an accelerator includes receiving, by a processing device, a database query from an application. The method also includes performing analysis on the database query and selecting an accelerator template from a plurality of accelerator templates based on the analysis of the database query. The method further includes transmitting an indication of the accelerator template to the accelerator and executing at least a portion of the database query on the accelerator.

Abstract: Embodiments include methods, systems and computer program products for performing a composite sort on a tunable hardware sort engine includes determining desired sort performance parameters, configuring a composite sort engine based on the desired sort performance parameters, and receiving a plurality of keys having a payload associated with each of the plurality of keys. The method also includes reserving DRAM storage for each of the payloads, generating a tag for each of the plurality of keys, the tag identifying the DRAM storage reserved for each of the payloads, and storing the payloads in the portions of the DRAM storage. The method further includes generating a composite key for each of the plurality of keys, sorting the composite keys by the composite sort engine, and retrieving the payloads associated with the sorted composite keys from the DRAM storage. The method also includes outputting the payloads associated the sorted composite keys.

Abstract: Embodiments include methods, systems and computer program products for offloading multiple processing operations to an accelerator. Aspects include receiving a database query from an application, performing an analysis on the query, and identifying a plurality of available accelerators. Aspects further include retrieving cost information for one or more templates available on each of the plurality of available accelerators, determining a query execution plan based on the cost information and the analysis on the query, and offloading one or more query operations to at least one of the plurality of accelerators based on the query execution plan.

Abstract: In an exemplary embodiment of this disclosure, a computer-implemented method includes receiving, at a hardware accelerator, a first instruction to project a first plurality of database rows, where each of the first plurality of database rows has one or more variable-length columns. The first plurality of database rows are projected, by a computer processor, to produce a first plurality of projected rows. This projection is performed at streaming rate.

Abstract: In an exemplary embodiment of this disclosure, a computer-implemented method includes receiving, at a hardware accelerator, a first instruction to project a first plurality of database rows, where each of the first plurality of database rows has one or more variable-length columns. The first plurality of database rows are projected, by a computer processor, to produce a first plurality of projected rows. This projection is performed at streaming rate.

Abstract: In an exemplary embodiment of this disclosure, a computer-implemented method includes determining that a database query warrants a first projection operation to project a plurality of input rows to a plurality of projected rows, where each of the plurality of input rows has one or more variable-length columns. A first projection control block is constructed, by a computer processor, to describe the first projection operation. The first projection operation is offloaded to a hardware accelerator. The first projection control block is provided to the hardware accelerator, and the first projection control block enables the hardware accelerator to perform the first projection operation at streaming rate.

Abstract: In an exemplary embodiment of this disclosure, a computer-implemented method includes determining that a database query warrants a first projection operation to project a plurality of input rows to a plurality of projected rows, where each of the plurality of input rows has one or more variable-length columns. A first projection control block is constructed, by a computer processor, to describe the first projection operation. The first projection operation is offloaded to a hardware accelerator. The first projection control block is provided to the hardware accelerator, and the first projection control block enables the hardware accelerator to perform the first projection operation at streaming rate.

Abstract: An apparatus comprises a hardware accelerator coupled to a memory. The hardware accelerator comprises one or more decompression units. The one or more decompression units are reconfigurable. The hardware accelerator may be a field-programmable gate array. The hardware accelerator may also comprise one or more reconfigurable scanner units. The one or more decompression units, in the aggregate, are operative to decompress one or more rows of a database at a bus speed of the coupling between the hardware accelerator and the memory. Two or more decompression units are operative to decompress two or more rows of a database in parallel. The apparatus allows for hardware accelerated row decompression.

Abstract: Techniques are provided for hardware-accelerated relational joins. A first table comprising one or more rows is processed through a hardware accelerator. At least one join column in at least one of the one or more rows of the first table is hashed to set at least one bit in at least one bit vector. A second table comprising one or more rows is processed through a hardware accelerator. At least one join column in at least one of the one or more rows of the second table is hashed to generate at least one hash value. At least one bit vector is probed using the at least one hash value. A joined row is constructed responsive to the probing step. The row-construction step is performed in the hardware accelerator.

Abstract: Generating a data feed specific parser circuit is provided. An input of a number of bytes of feed data associated with a particular data feed that the data feed specific parser circuit is to process is received. A feed format specification file that describes a data format of the particular data feed is parsed to generate an internal data structure of the feed format specification file. A minimum number of parallel pipeline stages in the data feed specific parser circuit to process the number of bytes of feed data associated with the particular data is determined based on the generated internal data structure of the feed format specification file. Then, a description of the data feed specific parser circuit with the determined number of parallel pipeline stages is generated.

Abstract: Methods and arrangements for a radix sort with a read only key. A plurality of keys are received, an array and a link table are populated for the first digit of the keys based upon the keys; and an array and a link table are populated for each successive digit of the keys based upon the array and link table populated for the preceding digit of the keys. Embodiments may be implemented in both hardware (FPGAs, ASICs, information handling devices, etc.) and software. Other embodiments are also disclosed and claimed.