Patents by Inventor Bharath Kumar

Bharath Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11470067
    Abstract: Disclosed are various embodiments for an authentication service. A unique identifier is associated with a device access token for a client to be authenticated. An authentication identifier is sent to an authenticated client. The client to be authenticated communicates the authentication identifier and unique identifier to the authentication service to complete authentication.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: October 11, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Yogesh Vilas Golwalkar, Bharath Kumar Bhimanaik
  • Publication number: 20220305232
    Abstract: Disclosed herein is an indwelling urinary catheter having a guidewire anchoring mechanism. The indwelling urinary catheter includes a catheter tube having a proximal opening, a distal opening, a catheter tube lumen with the catheter tube having a first wall thickness. The guidewire anchoring mechanism is configured to transition between an insertion state and an anchored state. The guidewire anchoring mechanism can include a proximal portion having a top cap, a collapsible section having a second wall thickness less than the first wall thickness, and a distal portion including a holder cap coupled to a holder. The holder can be coupled to the catheter tube, the distal portion can be in communication with the proximal portion, and a guidewire can be coupled to the proximal portion, the guidewire extending through the catheter tube lumen to the distal portion.
    Type: Application
    Filed: March 22, 2022
    Publication date: September 29, 2022
    Inventors: M. P. Dinesh Babu, Bharath Kumar Vishnuraj
  • Publication number: 20220292192
    Abstract: System and method for executing scan operations on computing systems use a sparse file that represents a storage device of a computing system to scan a file stored in the storage device. The sparse file is created and mounted to a scanner appliance such that the sparse file appears to a scan engine of the scanner appliance as a local storage device. When a read request for the file stored in the storage device is issued from the scan engine that results in an implicit read request to the sparse file, the implicit read request is trapped. While the implicit read request is trapped, data of the file is retrieved from the storage device of the computing system to the scanner appliance using a communication transport. The retrieved data of the file is then scanned using the scan engine at the scanner appliance.
    Type: Application
    Filed: April 26, 2021
    Publication date: September 15, 2022
    Inventors: MANDAR NANIVADEKAR, BHARATH KUMAR CHANDRASEKHAR, SACHIN SHINDE
  • Patent number: 11410097
    Abstract: The present invention provides an intelligent recruitment management system, method and computer program product for performing an automated recruitment process. The system comprises at least one processor (11) configured to execute modules of a recruitment intelligence platform (10), including a true requisition module (12) that parses data from intake forms and outputs a standardized result, analysing historical data of previous requisitions, a resume intelligence module (13) that mines resume and display a formatted output highlighting skills and best fit, cautioning frauds and plagiarism, a submission intelligence module (14) that enables candidates to submit relevant information via a unique link, generated by the true requisition module and a profile sourcing module (15) that invokes an RPA pipeline where a classification model automatically determines job matches and prompts the recruiters to select relevant candidates.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: August 9, 2022
    Assignee: Titan Data Group Inc.
    Inventors: Viswanathan Subramanian, Pradeep Janakiraman, Bharath Kumar Inbasekaran, Subhadeep Roy, Shankarri Ragavan, Madhuvani S, Penamakuri V B Abhirama Subramanyam, Kona Sirisha
  • Publication number: 20220224335
    Abstract: A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.
    Type: Application
    Filed: March 21, 2022
    Publication date: July 14, 2022
    Inventors: Win Naing Maung, Bharath Kumar Singareddy, Soumi Paul, Mayank Garg, Suzanne Mary Vining
  • Publication number: 20220214904
    Abstract: The disclosure provides an approach for hypervisor-assisted security analysis. Embodiments include receiving, at a hypervisor on a host computer, events from one or more virtual computing instances (VCIs). Embodiments include analyzing, by the hypervisor, the events according to one or more rules to identify a subset of the events for additional analysis. Embodiments include compressing, by the hypervisor, the subset of the events by performing deduplication to produce a compressed subset of the events. Embodiments include transmitting, by the hypervisor, the compressed subset of the events over a network to a separate analysis component, wherein the separate analysis component performs the additional analysis.
    Type: Application
    Filed: March 3, 2021
    Publication date: July 7, 2022
    Inventors: Bharath Kumar Chandrasekhar, Leena Shuklendu Soman, Vasantha Kumar Dhanasekar
  • Publication number: 20220206983
    Abstract: A method of operating an embedded universal serial bus (eUSB) repeater includes holding an eUSB receiver and a USB transmitter in active states and holding a USB receiver and an eUSB transmitter in standby states. The method includes receiving by the eUSB receiver a token packet indicative of transmission of a first downstream packet, and transitioning the USB receiver and the eUSB transmitter from the standby states to the active states responsive to the token packet. The method includes transmitting the token packet by the USB transmitter. The method includes receiving by the eUSB receiver a downstream packet or receiving by the USB receiver an upstream packet within a first timeout period after receiving the token packet, and transmitting the downstream packet by the USB transmitter or transmitting the upstream packet by the eUSB transmitter.
    Type: Application
    Filed: October 15, 2021
    Publication date: June 30, 2022
    Inventors: Mustafa Ulvi Erdogan, Bharath Kumar Singareddy, Suzanne Mary Vining, Srijan Rastogi, Sirish Oruganti, Douglas Edward Wente
  • Publication number: 20220206556
    Abstract: High-speed data communication devices, e.g., repeaters, interfacing between a host and a peripheral operate such that high-speed components except for a host-side squelch detector are set or maintained in a deactivated state during an idle period of a micro frame. In an example, a start of a micro frame is detected on a data bus during a first time period. In a second time period after the first time period, the high-speed communication device determines whether at least one data packet is contained in the micro frame. When it is determined during the second time period that no data packet is contained in the micro frame, active components, except a squelch detector, are controlled to be inactive during a third time period after the second time period.
    Type: Application
    Filed: May 25, 2021
    Publication date: June 30, 2022
    Inventors: Mustafa Ulvi Erdogan, Suzanne Mary Vining, Bharath Kumar Singareddy, Douglas Edward Wente
  • Patent number: 11348511
    Abstract: Two extended embedded Display Port displays may be enabled by using a single set of panel power sequencing (PPS) signals from a chipset to enable the two embedded Display Port panels. To enhance the user experience, the backlight module brightness is controlled by making use of a pin available on a system on a chip (SOC) and modification of drivers. This helps to save power when only one panel is used. When both panels are used simultaneously, power savings can be achieved by using backlight control signals.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: May 31, 2022
    Assignee: Intel Corporation
    Inventors: Mallari C. Hanchate, Ganesh R. S.T., Bharath Kumar, Sameer Kp
  • Patent number: 11327547
    Abstract: Technology for a system operable to extend a level of processor performance is disclosed. The system can comprise a power source connected to a platform voltage regulator (VR) and one or more processors and configured to provide an input power to the platform VR. The system can further comprise the platform VR connected to a peripheral interface and the one or more processors and configured to power the peripheral interface and send a power good signal to the one or more processors. The system can further comprise the peripheral interface connected to the platform VR and the one or more processors and configured to connect to a peripheral device and send a signal to the one or more processors when a peripheral interface connection state is identified as connected.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: May 10, 2022
    Assignee: Intel Corporation
    Inventors: Naveen G, Bharath Kumar
  • Patent number: 11309892
    Abstract: A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: April 19, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Win Naing Maung, Bharath Kumar Singareddy, Soumi Paul, Mayank Garg, Suzanne Mary Vining
  • Publication number: 20220114006
    Abstract: An object tiering system transfers or tiers data objects from a data store to a cloud store. The system includes a processor and a memory having stored instructions that, when executed by the processor, cause the processor to ingest a first plurality of data objects in the data store, map a second plurality of data objects having a common tiering date to a region, and upon reaching the common tiering date, transfer the region to the cloud store. In some embodiments, the mapping is done a priori when each data object is ingested or at a first time before the common tiering date. In some embodiments, the common tiering date is a second time for transferring the second plurality of data objects from the data store to the cloud store. In some embodiments, the first plurality of objects includes the second plurality of objects.
    Type: Application
    Filed: June 24, 2021
    Publication date: April 14, 2022
    Applicant: Nutanix, Inc.
    Inventors: Ajaykrishna Raghavan, Biswa Ranjan Panda, Bharath Kumar, Karan Gupta
  • Publication number: 20220051571
    Abstract: Methods and systems for authenticating operations of an aircraft are disclosed. In at least one embodiment, the method may include: receiving, by an aircraft data gateway, a request for an operation of an aircraft from an operations portal; performing a first digital authentication of the request using first digital authentication information; performing a second digital authentication of the request using second digital authentication information, the second digital authentication information being distinct from the first digital authentication information; and executing the operation of the aircraft upon validating the first digital authentication and the second digital authentication.
    Type: Application
    Filed: October 16, 2020
    Publication date: February 17, 2022
    Inventors: Vijayshankaran IYER, Phani Ammi Raju POTHULA, Kovalan RAMANA, G V Bharath Kumar, Raveendra Reddy MUDIMALA, Paul DRAKE, Lawrence MARSALA
  • Patent number: 11233788
    Abstract: Disclosed are various embodiments for determining authentication assurance from a combination of historical and runtime-provided inputs. An authentication request associated with an account is received. A composite measure of authentication assurance is determined from a combination of a historical measure of authentication assurance and a runtime measure of authentication assurance. A response to the authentication request is generated based at least in part on the composite measure of authentication assurance.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: January 25, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Daniel Hitchcock, Yogesh Golwalkar, Dharinee Gupta, Bharath Kumar
  • Patent number: 11227036
    Abstract: Disclosed are various embodiments for determining authentication assurance using algorithmic decay. In an embodiment, an authentication request associated with an account is received. At least one historical authentication event associated with the account is determined. A measure of authentication assurance is determined based at least in part on applying an exponential time decay to at least one authentication assurance value individually corresponding to the historical authentication event(s). A response to the authentication request is generated based at least in part on the measure of authentication assurance.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: January 18, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Daniel Hitchcock, Yogesh Golwalkar, Dharinee Gupta, Bharath Kumar
  • Patent number: 11221312
    Abstract: An adhesive bond test resonance array provides inspection of adhesively bonded composite laminate structures with improved productivity and higher reliability. A holder has multiple slots arranged in a two-dimensional array for holding transducers in respective slots. The holder is adapted to position a probe end of each of the transducers adjacent a component for scanning and has a material hardness adapted for enabling flexing while scanning curved composite parts. A fluid channel is adapted for delivering a couplant to the probe end of the transducers such that the couplant is automatically delivered during scanning of the component to inspect bond integrity.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: January 11, 2022
    Assignee: Textron Innovations, Inc.
    Inventors: Jay M. Amos, Bharath Kumar Kodumuru
  • Publication number: 20210379583
    Abstract: Multiwell devices and methods of filtration using the multiwell devices are disclosed.
    Type: Application
    Filed: June 5, 2020
    Publication date: December 9, 2021
    Inventors: James George Till, Jeffrey Toma, William Scott Gordon, Bharath Kumar Raghavan, Daniel Dalessio
  • Publication number: 20210305409
    Abstract: A semiconductor device includes a substrate having a semiconductor fin. A gate structure is over the semiconductor fin, in which the gate structure has a tapered profile and comprises a gate dielectric. A work function metal layer is over the gate dielectric, and a filling metal is over the work function metal layer. A gate spacer is along a sidewall of the gate structure, in which the work function metal layer is in contact with the gate dielectric and a top portion of the gate spacer. An epitaxy structure is over the semiconductor fin.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 30, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Qiang WU, Kuo-An LIU, Chan-Lon YANG, Bharath Kumar PULICHERLA, Li-Te LIN, Chung-Cheng WU, Gwan-Sin CHANG, Pinyen LIN
  • Publication number: 20210280186
    Abstract: A method and a voice assistant device for managing private data are provided. The voice assistant device includes a processor configured to detect a privacy triggering event while obtaining at least one voice input from a first user in a voice input mode, switch from the voice input mode to a non-voice input mode in response to the privacy triggering event, obtain a non-voice input from the first user in the non-voice input mode, and execute an operation of the voice assistant device corresponding to the non-voice input.
    Type: Application
    Filed: March 5, 2021
    Publication date: September 9, 2021
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sathwick MAHADEVA, Indira Preethi Jain GARGATTI AJITH, Vishwanath Pethri KAMATH, Bharath Kumar NATARAJAN, Madhushree SHREESURESH GOWDA, Vijetha Kannukere Vinaya PRASAD
  • Publication number: 20210250026
    Abstract: A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.
    Type: Application
    Filed: February 11, 2021
    Publication date: August 12, 2021
    Inventors: Win Naing Maung, Bharath Kumar Singareddy, Soumi Paul, Mayank Garg, Suzanne Mary Vining