Abstract: A method for etching features in a silicon oxide based dielectric layer over a substrate, comprising performing an etch cycle. A lag etch partially etching features in the silicon oxide based dielectric layer is performed, comprising providing a lag etchant gas, forming a plasma from the lag etchant gas, and etching the etch layer with the lag etchant gas, so that smaller features are etched slower than wider features. A reverse lag etch further etching the features in the silicon oxide based dielectric layer is performed comprising providing a reverse lag etchant gas, which is different from the lag etchant gas and is more polymerizing than the lag etchant gas, forming a plasma from the reverse lag etchant gas, and etching the silicon oxide based dielectric layer with the plasma formed from the reverse lag etchant gas, so that smaller features are etched faster than wider features.

Abstract: A method for forming features in dielectric layers and opening barrier layers for a plurality of wafers and cleaning an etch chamber after processing and removing each wafer of the plurality of wafers is provided. A wafer of the plurality of wafers is placed into the etch chamber wherein the wafer has a barrier layer over the wafer and a dielectric layer over the barrier layer. The dielectric layer is etched. The barrier layer is opened. The wafer is removed from the etch chamber. A waferless automatic cleaning of the etch chamber without the wafer is provided. The waferless automatic cleaning comprises providing a waferless automatic cleaning gas comprising oxygen and nitrogen to the etch chamber and forming a waferless automatic cleaning plasma from the waferless automatic cleaning gas to clean the etch chamber.

Abstract: A method for forming features in dielectric layers and opening barrier layers for a plurality of wafers and cleaning an etch chamber after processing and removing each wafer of the plurality of wafers is provided. A wafer of the plurality of wafers is placed into the etch chamber wherein the wafer has a barrier layer over the wafer and a dielectric layer over the barrier layer. The dielectric layer is etched. The barrier layer is opened. The wafer is removed from the etch chamber. A waferless automatic cleaning of the etch chamber without the wafer is provided. The waferless automatic cleaning comprises providing a waferless automatic cleaning gas comprising oxygen and nitrogen to the etch chamber and forming a waferless automatic cleaning plasma from the waferless automatic cleaning gas to clean the etch chamber.

Abstract: An apparatus for providing different gases to different zones of a processing chamber is provided. A gas supply for providing an etching gas flow is provided. A flow splitter in fluid connection with the gas supply for splitting the etching gas flow from the gas supply into a plurality of legs is provided. A tuning gas system in fluid connection to at least one of the legs of the plurality of legs is provided.

Abstract: A method of etching a substrate in a plasma processing system is disclosed. The substrate has a semi-conductor layer, a first barrier layer disposed above the semi-conductor layer, a low-k layer disposed above the first barrier layer, a third hard mask layer disposed above the low-k layer; a second hard mask layer disposed above the third hard mask layer, and a first hard mask layer disposed above the second hard mask layer.

Abstract: A semiconductor chip formed on a substrate is provided. An oxygen-doped silicon carbide etch stop layer is formed over the substrate. An organosilicate glass layer is formed over the oxygen-doped silicon carbide etch stop layer. A feature is selectively etched in the organosilicate glass layer using an etch with an organosilicate glass to oxygen-doped silicon carbide selectivity greater than 5:1.

Abstract: In a plasma processing system, a method of inspecting a contact opening of a contact formed in a first layer of the substrate to determine whether the contact reaches a metal layer that is disposed below the first layer is shown. The method includes flowing a gas mixture into a plasma reactor of the plasma processing system, the gas mixture comprising a flow of a chlorine containing gas. The method also includes striking a plasma from the gas mixture; and exposing the contact to the plasma. The method further includes detecting whether metal chloride is present in the contact opening after the exposing.

Abstract: A method for forming features in dielectric layers and opening barrier layers for a plurality of wafers and cleaning an etch chamber after processing and removing each wafer of the plurality of wafers is provided. A wafer of the plurality of wafers is placed into the etch chamber wherein the wafer has a barrier layer over the wafer and a dielectric layer over the barrier layer. The dielectric layer is etched. The barrier layer is opened. The wafer is removed from the etch chamber. A waferless automatic cleaning of the etch chamber without the wafer is provided. The waferless automatic cleaning comprises providing a waferless automatic cleaning gas comprising oxygen and nitrogen to the etch chamber and forming a waferless automatic cleaning plasma from the waferless automatic cleaning gas to clean the etch chamber.

Abstract: A method of etching a substrate in a plasma processing system is disclosed. The substrate has a semi-conductor layer, a first barrier layer disposed above the semi-conductor layer, a low-k layer disposed above the first barrier layer, a third hard mask layer disposed above the low-k layer; a second hard mask layer disposed above the third hard mask layer, and a first hard mask layer disposed above the second hard mask layer.

Abstract: The invention is a method of etching an integrated circuit (IC) structure that includes a metal hard mask layer. The etching of the metal hard mask layer is performed by first feeding a gas mixture comprising a fluorine containing gas and oxygen (O2) gas to a reactor. The method then proceeds to generate a plasma that etches the metal hard mask layer. The method can be applied to either performing a via etch or a trench etch. Additionally, the invention teaches the removal of a photoresist layer without affecting the metal hard mask layer.

Abstract: A semiconductor chip formed on a substrate is provided. An oxygen-doped silicon carbide etch stop layer is formed over the substrate. An organosilicate glass layer is formed over the oxygen-doped silicon carbide etch stop layer. A feature is selectively etched in the organosilicate glass layer using an etch with an organosilicate glass to oxygen-doped silicon carbide selectivity greater than 5:1.

Abstract: An apparatus for providing different gases to different zones of a processing chamber is provided. A gas supply for providing an etching gas flow is provided. A flow splitter in fluid connection with the gas supply for splitting the etching gas flow from the gas supply into a plurality of legs is provided. A tuning gas system in fluid connection to at least one of the legs of the plurality of legs is provided.

Abstract: An apparatus for providing a gas from a gas supply to at least two different zones in a process chamber is provided. A flow divider provides a fluid connection to the gas supply, where the flow divider splits gas flow from the gas supply into a plurality of legs. A master leg is in fluid connection with the flow divider, where the master leg comprises a master fixed orifice. A first slave leg is in fluid connection with the flow divider and in parallel with the master leg, where the first slave leg comprises a first slave leg valve and a first slave leg fixed orifice.

Abstract: Etching a layer over a substrate is provided. The substrate is placed in a plasma processing chamber. A first gas is provided to an inner zone within the plasma processing chamber. A second gas is provided to the outer zone within the plasma processing chamber, where the outer zone surrounds the inner zone and the first gas is different than the second gas. Plasmas are simultaneously generated from the first gas and second gas. The layer is etched, where the layer is etched by the plasmas from the first gas and second gas.

Abstract: A plasma processing chamber is provided. The plasma processing chamber includes a bottom electrode configured to support a substrate and a top electrode located over the bottom electrode. The plasma processing chamber further includes a plasma confinement assembly designed to transition between a closed orientation and an open orientation. In the closed orientation, the plasma confinement assembly defines a first volume for plasma during processing, and in the open orientation, the plasma confinement assembly defines a second volume for plasma during processing which is larger than the first volume.