Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The release layer comprises at least one additive that adjusts a frequency of electro-magnetic radiation absorption property of the release layer. The additive comprises, for example, a 355 nm chemical absorber and/or chemical absorber for one of more wavelengths in a range comprising 600 nm to 740 nm. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.

Abstract: A magnetic tracking apparatus, method, system and computer program product for magnetically encoding pills are provided. A pill feeder includes a first valve controlling an opening of the pill feeder. A chamber is arranged in communication with an outlet of the pill feeder, and a second valve when closed retains the pill within the chamber, and when open communicates with a passageway for the pill to exit the chamber. A microcontroller is configured to control operation of the first valve and the second valve. A magnetic nano-particle applicator deposits bio-compatible nano-magnetic particles in a magnetic pattern onto a surface of the pill within the chamber. A system for detection of the pill includes a wearable patch or article including a magnetic reader to read the magnetic pattern on a coated pill when consumed by the patient.

Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The release layer comprises at least one additive that adjusts a frequency of electro-magnetic radiation absorption property of the release layer. The additive comprises, for example, a 355 nm chemical absorber and/or chemical absorber for one of more wavelengths in a range comprising 600 nm to 740 nm. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.

Abstract: An electro-optical module assembly is provided that includes a flexible substrate having a first surface and a second surface opposite the first surface, wherein the flexible substrate contains an opening located therein that extends from the first surface to the second surface. An optical component is located on the second surface of the flexible substrate and is positioned to have a surface exposed by the opening. At least one electronic component is located on a first portion of the first surface of the flexible substrate, and at least one micro-energy source is located on a second portion of the first surface of the flexible substrate.

Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The the at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.

Abstract: Die stacks and methods of making die stacks with very thin dies are disclosed. The die surfaces remain flat within a 5 micron tolerance despite the thinness of the die and the process steps of making the die stack. A residual flux height is kept below 50% of the spacing distance between adjacent surfaces or structures, e.g. in the inter-die spacing.

Abstract: Small size chip handling and electronic component integration are accomplished using handle fixturing to transfer die or other electronic components from a full area array to a targeted array. Area array dicing of a thinned device wafer on a handle wafer/panel may be followed by selective or non-selective de-bonding of targeted die or electronic components from the handle wafer and optional attachment to a carrier such as a transfer head or tape. Alignment fiducials may facilitate precision alignment of the transfer head or tape to the device wafer and subsequently to the targeted array. Alternatively, the dies or other electronic elements are transferred selectively from either a carrier or the device wafer to the targeted array.

Abstract: A method for integrating a thin film microbattery with electronic circuitry includes forming a release layer over a handler, forming a thin film microbattery over the release layer of the handler, removing the thin film microbattery from the handler, depositing the thin film microbattery on an interposer, forming electronic circuitry on the interposer, and sealing the thin film microbattery and the electronic circuitry to create individual microbattery modules.

Abstract: Small size chip handling and electronic component integration are accomplished using handle fixturing to transfer die or other electronic components from a full area array to a targeted array. Area array dicing of a thinned device wafer on a handle wafer/panel may be followed by selective or non-selective de-bonding of targeted die or electronic components from the handle wafer and optional attachment to a carrier such as a transfer head or tape. Alignment fiducials may facilitate precision alignment of the transfer head or tape to the device wafer and subsequently to the targeted array. Alternatively, the dies or other electronic elements are transferred selectively from either a carrier or the device wafer to the targeted array.

Abstract: An apparatus includes a substrate mechanically and electrically connected on one side of the substrate to multiple metallic probes in one or more arrays and includes the multiple metallic probes in the one or more arrays. In a method, multiple pits may be formed in an array on a first substrate. The pits have a pyramidal shape. A release layer is formed on the first substrate and covers surfaces of the pits. Probe tips are formed in the pits on the first substrate. The probe tips are formed from rigid conductive material. Multiple pillars are formed from rigid conductive material. The pillars are electrically and mechanically connected to a second substrate and to the probe tips. Release is caused of the probe tips from the first substrate, wherein the pillars and probe tips are connected to the second substrate and together form an array of rigid and conductive probes.

Abstract: Magnetic regions of at least one of a chiplet or a receiving substrate are used to permit magnetically guided precision placement of a plurality of chiplets on the receiving substrate. In the present application, a solution containing dispersed chiplets is employed to facilitate the placement of the dispersed chiplets on bond pads that are present on a receiving substrate.

Abstract: A method for integrating a thin film microbattery with electronic circuitry includes forming a release layer over a handler, forming a thin film microbattery over the release layer of the handler, removing the thin film microbattery from the handler, depositing the thin film microbattery on an interposer, forming electronic circuitry on the interposer, and sealing the thin film microbattery and the electronic circuitry to create individual microbattery modules.

Abstract: An electro-optical module assembly is provided that includes a flexible substrate having a first surface and a second surface opposite the first surface, wherein the flexible substrate contains an opening located therein that extends from the first surface to the second surface. An optical component is located on the second surface of the flexible substrate and is positioned to have a surface exposed by the opening. At least one electronic component is located on a first portion of the first surface of the flexible substrate, and at least one micro-energy source is located on a second portion of the first surface of the flexible substrate.

Abstract: A method of manufacturing a multi-layer wafer is provided. The method comprises creating under bump metallization (UMB) pads on each of the two heterogeneous wafers; applying a conductive means above the UMB pads on at least one of the two heterogeneous wafers; and low temperature bonding the two heterogeneous wafers to adhere the UMB pads together via the conductive means. At least one stress compensating polymer layer may be applied to at least one of two heterogeneous wafers. The multi-layer wafer comprises two heterogeneous wafers, each of the heterogeneous wafer having UMB pads and at least one of the heterogeneous wafers having a stress compensating polymer layer and a conductive means applied above the UMB pads on at least one of the two heterogeneous wafers. The two heterogeneous wafers low temperature bonded together to adhere the UMB pads together via the conductive means.

Abstract: The application provides a routing method which includes configuring a first path and a second path in charge of load sharing for a data flow, and configuring a third path in charge of reroute protection. A first group entry is generated for instructing the forwarding device to use the first path and the second path as load-sharing paths and use the third path to perform reroute protection on the first path and the second path. A flow entry for instructing to perform an operation of going to the first group entry is generated.

Abstract: A support structure for use in fan-out wafer level packaging is provided that includes, a silicon handler wafer having a first surface and a second surface opposite the first surface, a release layer is located above the first surface of the silicon handler wafer, and a layer selected from the group consisting of an adhesive layer and a redistribution layer is located on a surface of the release layer. After building-up a fan-out wafer level package on the support structure, infrared radiation is employed to remove (via laser ablation) the release layer, and thus remove the silicon handler wafer from the fan-out wafer level package.

Abstract: A bonding material including a phenoxy resin thermoplastic component, and a carbon black filler component. The carbon black filler component is present in an amount greater than 1 wt. %. The carbon black filler converts the phenoxy resin thermoplastic component from a material that transmits infra-red (IR) wavelengths to a material that absorbs a substantial portion of infra-red (IR) wavelengths.

Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The release layer comprises at least one additive that adjusts a frequency of electro-magnetic radiation absorption property of the release layer. The additive comprises, for example, a 355 nm chemical absorber and/or chemical absorber for one of more wavelengths in a range comprising 600 nm to 740 nm. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The the at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.

Abstract: Techniques regarding a thin film battery, which can comprise one or more sealing layers, and a method of manufacturing thereof are provided. For example, one or more embodiments described herein can regard an apparatus that can comprise a thin film battery cell encapsulated in a multi-layer stack comprising an adhesive layer located between a first substrate layer and a second substrate layer. The apparatus can also comprise a metal sealing layer at least partially surrounding the multi-layer stack.

Abstract: A structure containing a vertical light emitting diode (LED) is provided. The vertical LED is present in an opening located in a display substrate, and the vertical LED is coupled to a back contact structure via a magnetic back contact structure. A first top contact structure contacts a topmost surface of the vertical LED and a second top contact structure contacts a surface of the back contact structure.