Abstract: A gate structure includes a substrate divided into an N-type transistor region and a P-type transistor region. An interlayer dielectric covers the substrate. A first trench is embedded in the interlayer dielectric within the N-type transistor region. A first gate electrode having a bullet-shaped profile is disposed in the first trench. A gate dielectric contacts the first trench. An N-type work function layer is disposed between the gate dielectric layer and the first gate electrode. A second trench is embedded in the interlayer dielectric within the P-type transistor region. A second gate electrode having a first mushroom-shaped profile is disposed in the second trench. The gate dielectric layer contacts the second trench. The N-type work function layer is disposed between the gate dielectric layer and the second gate electrode. A first P-type work function layer is disposed between the gate dielectric layer and the N-type work function layer.

Abstract: The present disclosure relates to a chlorin derivative or a pharmaceutically acceptable salt thereof, a preparation method thereof, an anti-tumor composition including the chlorin derivative or the pharmaceutically acceptable salt thereof, use of the chlorin derivative or the pharmaceutically acceptable salt thereof in the treatment of a tumor, and a combination of the chlorin derivative or the pharmaceutically acceptable salt thereof and an ultrasound medical system. The chlorin derivative or the pharmaceutically acceptable salt thereof has a structure represented by formula (I), and the ultrasonic medical system comprises a transducer ultrasonic bed and a contact agent. The chlorin derivative of the present disclosure can be used in photodynamic therapy and sonodynamic therapy, thereby effectively inhibiting and treating cancer.

Abstract: The present disclosure provides a clock data recovery apparatus. The clock data recovery apparatus includes a phase detection circuit, a digital filter, a phase-interpolating circuit and an oscillator circuit. The phase detection circuit receives and samples a data signal according to multiple reference clock signals having different phases, to generate a phase detection result. The digital filter performs accumulation on the phase detection result, to generate a phase-adjusting signal. The phase interpolator circuit performs phase adjustment on a source clock signal according to the phase-adjusting signal, in order to generate an injection clock signal. The oscillator circuit generates the reference clock signals according to the injection clock signal, in which the phases of the reference clock signals follow the phase of the injection clock signal.

Abstract: The application relates to N-(4-fluoro-3-(6-(3-methylpyridin-2-yl)-[1,2,4]triazolo[1,5-a]pyrimidin-2-yl)phenyl)-2,4-dimethyloxazole-5-carboxamide (Compound I) fumaric acid co-crystals and X-ray amorphous complexes of Compound (I) and fumaric acid. The application also provides methods of making the same; pharmaceutical compositions comprising them; and their use in treating, preventing, inhibiting, ameliorating, or eradicating the pathology and/or symptomology of a disease caused by a kinetoplastid parasite, such as leishmaniasis, human African trypanosomiasis and Chagas disease.

Abstract: A semiconductor device includes a semiconductive channel region, a semiconductive protection layer, a gate structure, and a pair of gate spacers. The semiconductive protection layer is on and in contact with the channel. The gate structure is above the semiconductive protection layer and includes gate dielectric layer and a gate electrode. The gate dielectric layer is above the semiconductive protection layer. The gate electrode is above the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The semiconductive protection layer extends from an inner sidewall of a first one of the pair of gate spacers to an inner sidewall of a second one of the pair of gate spacers.

Abstract: A semiconductor device includes a semiconductive channel region, a semiconductive protection layer, a gate structure, and a pair of gate spacers. The semiconductive protection layer is on and in contact with the channel. The gate structure is above the semiconductive protection layer and includes gate dielectric layer and a gate electrode. The gate dielectric layer is above the semiconductive protection layer. The gate electrode is above the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The semiconductive protection layer extends from an inner sidewall of a first one of the pair of gate spacers to an inner sidewall of a second one of the pair of gate spacers.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to forma second spacer.

Abstract: This invention discloses a practical method for landslide detection in large space, which comprises the following steps: image synthesis, ice and snow detection, removal of non-potential landslide area, detection of potential landslide area, feature calculation, landslide detection model construction and precision validation; this invention avoids radiometric correction and outlier by detecting landslide from synthetic image. That guarantees practical applicability of the proposal. Firstly, detecting potential landslides can avoid the imbalanced sample distribution issue between background objects and landslides when training the landslide detection model. The landslide is further detected by building a random forest model based on the spectral features and textural features of potential landslide pixels in different neighboring time domains. It fully considers the changes of objects in different time domains, and lays a foundation for efficient landslide extraction.

Abstract: A method includes forming a metal gate in a first inter-layer dielectric, performing a treatment on the metal gate and the first inter-layer dielectric, selectively growing a hard mask on the metal gate without growing the hard mask from the first inter-layer dielectric, depositing a second inter-layer dielectric over the hard mask and the first inter-layer dielectric, planarizing the second inter-layer dielectric and the hard mask, and forming a gate contact plug penetrating through the hard mask to electrically couple to the metal gate.

Abstract: A gate structure includes a substrate divided into an N-type transistor region and a P-type transistor region. An interlayer dielectric covers the substrate. A first trench is embedded in the interlayer dielectric within the N-type transistor region. A first gate electrode having a bullet-shaped profile is disposed in the first trench. A gate dielectric contacts the first trench. An N-type work function layer is disposed between the gate dielectric layer and the first gate electrode. A second trench is embedded in the interlayer dielectric within the P-type transistor region. A second gate electrode having a first mushroom-shaped profile is disposed in the second trench. The gate dielectric layer contacts the second trench. The N-type work function layer is disposed between the gate dielectric layer and the second gate electrode. A first P-type work function layer is disposed between the gate dielectric layer and the N-type work function layer.

Abstract: A method for allocating a plurality of resource units among a plurality of client stations in a wireless local area network is disclosed herein. An access point (AP) estimates a channel quality indicator for each of the respective channels between the AP and the plurality of client stations, obtains queue information corresponding to each of the plurality of client stations, and computes a utility function for each of the plurality of client stations based on the channel quality indicator and the obtained queue information. The AP then allocates each resource unit to a client station of the plurality of client stations having a highest value output by the respective utility function.

Abstract: The present disclosure provides humanized and affinity matured antibodies (mAbs) and fragments thereof that specifically bind to CD79 with high affinity. The anti-CD79 mAbs and fragments thereof can be used to treat antibody-associated conditions, including autoimmune diseases, allergies, transplant rejection, or immune-mediated rejection of a therapeutics optionally in combination with an additional therapeutic agent. Furthermore, the anti-CD79 mAbs and fragments thereof can be used for diagnostic purposes, including to detect CD79 cells in biological samples and to diagnose B-cell associated disorders.

Abstract: A circuit board with an electrostatic discharge protection mechanism and an electronic apparatus having the same are provided. The circuit board includes a substrate, at least one signal trace, and a conductive element. The at least one signal trace is disposed on the substrate. The conductive element is electrically connected to a ground plane of the substrate and crosses over the at least one signal trace. The conductive element has at least one discharging portion. The position of the at least one discharging portion corresponds to the at least one signal trace. A gap exists between the at least one discharging portion and the at least one signal trace. A static electricity of the at least one signal trace is discharged to the at least one discharging portion.

Abstract: A heat dissipation substrate includes a substrate, a heat conducting element, an insulating filling material, a first circuit layer, and a second circuit layer. The substrate has a first surface, a second surface opposite the first surface, and a through groove communicating the first surface with the second surface. The heat conducting element is disposed in the through groove. The heat conducting element includes an insulating material layer and at least one metal layer. The insulating filling material is filled in the through groove for fixing the heat conducting element into the through groove. The first circuit layer is disposed on the first surface of the substrate and exposes a portion of the heat conducting element. The second circuit layer is disposed on the second surface of the substrate. The first circuit layer and the metal layer are respectively disposed on two opposite sides of the insulating material layer.

Abstract: A process for correcting longitudinal roll from an offset load using active roll control within a vehicle is provided. The process includes, within a computerized controller using axle-based control to control a suspension system, operating programming to control pneumatic pressure supplied to each of a plurality of air spring devices within the suspension system to execute a vehicle leveling event including one of adjusting a height of the vehicle or maintaining the height of the vehicle. The process further includes operating programming to, simultaneously with the controlling the pneumatic pressure, utilize a plurality of active sway bars to provide an offset torque to the vehicle body. Each of the plurality of active sway bars is associated with one of a plurality of axles. Providing the offset torque is based upon a number of moles of air in each of the plurality of air spring devices and reducing the longitudinal roll.

Abstract: According to various embodiments, an integrated circuit may include an upper inter-level dielectric (ILD) layer, a lower ILD layer, and an interlayer arranged between the upper ILD layer and the lower ILD layer. The integrated circuit may further include a capacitor device and a resistor device. The capacitor device may include a top plate disposed in a first region of the interlayer and a bottom plate disposed in the lower ILD layer. The resistor device may include a resistive element and a plurality of vias disposed in a second region of the interlayer. The plurality of vias may extend from the resistive element to the lower ILD layer. A distance between the top plate and the lower ILD layer may be at least substantially equal to a height of each via of the plurality of vias.

Abstract: A process for correcting longitudinal roll from an offset load using active roll control within a vehicle is provided. The process includes, within a computerized controller using axle-based control to control a suspension system, operating programming to control pneumatic pressure supplied to each of a plurality of air spring devices within the suspension system to execute a vehicle leveling event including one of adjusting a height of the vehicle or maintaining the height of the vehicle. The process further includes operating programming to, simultaneously with the controlling the pneumatic pressure, utilize a plurality of active sway bars to provide an offset torque to the vehicle body. Each of the plurality of active sway bars is associated with one of a plurality of axles. Providing the offset torque is based upon a number of moles of air in each of the plurality of air spring devices and reducing the longitudinal roll.

Abstract: The present invention relates to an artificial turf. In the present invention, nylon is used as the main material. Through selecting straight fibers and curve fibers with certain cross-sectional shapes, lengths and widths and using the straight fiber and curve fiber together, the obtained grass fibers not only have relatively good temperature resistance, but also good handfeel, wear resistance, anti-aging performance, grass fiber resilience, trampling resistance and grass uprightness.

Abstract: A light-emitting device, including a mount substrate, at least one light emitting element, a first light transparent member, a second light transparent member and a covering member, is disclosed. The at least one light emitting element is disposed on the mount substrate in a flip-chip manner. The first light transparent member is configured to receive the incident light emitting from the light emitting element, wherein the first light transparent member is formed of an inorganic substance and an inorganic phosphor, and includes a top surface and a first side surface contiguous to the top surface. The second light transparent member is disposed on the top surface of the first light transparent member and is formed of the inorganic substance and contains no the inorganic phosphor, and includes an externally exposed light emission surface and a second side surface contiguous to the externally exposed light emission surface.

Abstract: A method includes forming a gate dielectric layer on a semiconductor fin, and forming a gate electrode over the gate dielectric layer. The gate electrode extends on sidewalls and a top surface of the semiconductor fin. A gate spacer is selectively deposited on a sidewall of the gate electrode. An exposed portion of the gate dielectric layer is free from a same material for forming the gate spacer deposited thereon. The method further includes etching the gate dielectric layer using the gate spacer as an etching mask to expose a portion of the semiconductor fin, and forming an epitaxy semiconductor region based on the semiconductor fin.