Patents by Inventor Bratin Saha

Bratin Saha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080162885
    Abstract: A method and apparatus for ensuring integrity of transaction exit functions is herein described. Dead local data in a transaction is prevented from overwriting local variables associated with a transaction exit function. In a write-buffering Software Transactional Memory (STM) system, a commit function is associated with a private stack to store local variables to ensure write-back of local dead data in a write-buffer does not corrupt the commit function. Similarly, in a roll-back STM, an abort function is associated with a private stack to store local variables to ensure the roll-back of a program stack with local dead data from a write log does not corrupt the abort function. Alternatively, one stack may be used for the transaction including a first function and an exit function. Here, local dead variables are detected and prevented from overwriting local variables of the exit function.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Inventors: Cheng Wang, Youfeng Wu, Bratin Saha, Ali-Reza Adl-Tabatabai
  • Publication number: 20080163220
    Abstract: A method and apparatus for efficient and consistent validation/conflict detection in a Software Transactional Memory (STM) system is herein described. A version check barrier is inserted after a load to compare versions of loaded values before and after the load. In addition, a global timestamp (GTS) is utilized to track a latest committed transaction. Each transaction is associated with a local timestamp (LTS) initialized to the GTS value at the start of a transaction. As a transaction commits it updates the GTS to a new value and sets versions of modified locations to the new value. Pending transactions compare versions determined in read barriers to their LTS. If the version is greater than their LTS indicating another transaction has committed after the pending transaction started and initialized the LTS, then the pending transaction validates its read set to maintain efficient and consistent transactional execution.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Inventors: Cheng Wang, Youfeng Wu, Wei-Yu Chen, Bratin Saha, Ali-Reza Adl-Tabatabai
  • Publication number: 20080162881
    Abstract: A method and apparatus for designating and handling irrevocable transaction is herein described. In response to detecting an irrevocable event, such as an I/O operation, a user-defined irrevocable designation, and a dynamic failure profile, a transaction is designated as irrevocable. In response to designating a transaction as irrevocable, Single Owner Read Locks (SORLs) are acquired for previous and subsequent reads in the irrevocably designated transaction to ensure the transaction is able to complete without modification to locations read from, while permitting remote resources to load from those locations to continue execution.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Inventors: Adam Welc, Bratin Saha, Ali-Reza Adl-Tabatabai
  • Patent number: 7380276
    Abstract: Processor extensions and software verification to support type-safe language environments running with untrusted code. Code and data spaces are partitioned into trusted and untrusted regions. Type-safe code is loaded into the trusted region of the code space, while non-type-safe code is loaded into the untrusted region of the code space. The trusted region of the data space is allocated to the type-safe code. The untrusted region of the data space is allocated to the non-type-safe code. Hardware-based truth tables are employed for defining allowable and disallowable code sequences and memory access operations. For code sequences, allowable operations are based on the location (i.e., region) of a code sequence including a current instruction and a prior instruction. For memory access, the location of the requesting instruction and data requested are considered. Disallowed code sequence or memory access operations cause the processor to generate a safe access protection trap.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: May 27, 2008
    Assignee: Intel Corporation
    Inventors: Bratin Saha, Weldon Washburn, James Paul Held
  • Patent number: 7366831
    Abstract: A system includes a processor and a size bounded first-in first-out (FIFO) memory that is connected to the processor and a display is connected to the processor. A managing process to run on the processor to manage the FIFO memory structure. The FIFO memory includes a counter portion and a value portion for each of a tail portion and a head portion, and the managing process is non-blocking. The counter portion is used as a timestamp to maintain FIFO order.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: April 29, 2008
    Assignee: Intel Corporation
    Inventors: Bratin Saha, Ali-Reza Adi-Tabatabai
  • Publication number: 20080098374
    Abstract: A method for managing a transaction includes determining that an optimistically immutable field in the transaction is written to. Invaliding a method in response to determining that the method in the transaction reads is the optimistically immutable field. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 24, 2008
    Inventors: Ali-Reza Adl-tabatabai, Vijay Menon, Richard L. Hudson, Bratin Saha, Tatiana Shpeisman
  • Publication number: 20080059717
    Abstract: A method and apparatus for accelerating transactional execution. Barriers associated with shared memory lines referenced by memory accesses within a transaction are only invoked/executed the first time the shared memory lines are accessed within a transaction. Hardware support, such as a transaction field/transaction bits, are provided to determine if an access is the first access to a shared memory line during a pendancy of a transaction. Additionally, in an aggressive operational mode version numbers representing versions of elements stored in shared memory lines are not stored and validated upon commitment to save on validation costs. Moreover, even in a cautious mode, that stores version numbers to enable validation, validation costs may not be incurred, if eviction of accessed shared memory lines do not occur during execution of the transaction.
    Type: Application
    Filed: October 29, 2007
    Publication date: March 6, 2008
    Inventors: Bratin Saha, Ali-Reza Adl-Tabatabai, Quinn Jacobson
  • Publication number: 20080046661
    Abstract: A method and apparatus for accelerating transactional execution. Barriers associated with shared memory lines referenced by memory accesses within a transaction are only invoked/executed the first time the shared memory lines are accessed within a transaction. Hardware support, such as a transaction field/transaction bits, are provided to determine if an access is the first access to a shared memory line during a pendancy of a transaction. Additionally, in an aggressive operational mode version numbers representing versions of elements stored in shared memory lines are not stored and validated upon commitment to save on validation costs. Moreover, even in a cautious mode, that stores version numbers to enable validation, validation costs may not be incurred, if eviction of accessed shared memory lines do not occur during execution of the transaction.
    Type: Application
    Filed: October 29, 2007
    Publication date: February 21, 2008
    Inventors: Bratin Saha, Ali-Reza Adi-Tabatabai, Quinn Jacobson
  • Publication number: 20080022054
    Abstract: Object-based conflict detection is described in the context of software transactional memory. In one example, a block of instructions is received for execution as an object in a software transactional memory transaction. The base of the object is computed, a lock is found for the object using the base of the object.
    Type: Application
    Filed: June 28, 2006
    Publication date: January 24, 2008
    Inventors: Ben Hertzberg, Bratin Saha, Ali-Reza Adl-Tabatabai
  • Publication number: 20080021934
    Abstract: Embodiments of a system and method for transactional memory (TM) with automatic object versioning are described. Embodiments described herein include a TM system and method that facilitates the execution of object-oriented application programs in a transactional environment, including automatically versioning objects to enhance efficiency. Embodiments of the TM automatically designate versions of objects using pointers, accurately identifying usable and unusable versions. Object versioning as described herein allows the garbage collector to easily and efficiently determine which objects may be moved, freeing memory space and reducing the number of objects traversed by a transaction before finding a useable version of an object. Other embodiments are described and claimed.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 24, 2008
    Inventors: Richard L. Hudson, Ali-Reza Adl-tabatabai, Bratin Saha
  • Publication number: 20080005737
    Abstract: Various usage models are provided to utilize a Monitor and Call (“mcall”) instruction that incorporates user-level asynchronous signaling. The various usage models utilize the mcall instruction in a multithreading system in order to enhance concurrent thread execution. Other embodiments are also described and claimed.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Inventors: Bratin Saha, Ali-Reza Adl-Tabatabai, Quinn A. Jacobson
  • Publication number: 20070300238
    Abstract: Embodiments of a system and method for adapting software programs to operate in software transactional memory (STM) environments are described. Embodiments include a software transactional memory (STM) adapter system including, in one embodiment, a version of a binary rewriting tool. The STM adapter system provides a simple-to-use application programming interface (API) for legacy languages (e.g., C and C++) that allows the programmer to simply mark the block of code to be executed atomically; the STM adapter system automatically transforms all the binary code executed within that block (including pre-compiled libraries) to execute atomically (that is, to execute as a transaction). In an embodiment, the STM adapter system automatically transforms lock-based critical sections in existing binary code to atomic blocks, for example by replacing locks with begin and end markers that mark the beginning and end of transactions. Other embodiments are described and claimed.
    Type: Application
    Filed: June 21, 2006
    Publication date: December 27, 2007
    Inventors: Leonidas Kontothanassis, Ali-Reza Adl-tabatabai, Bratin Saha
  • Publication number: 20070288708
    Abstract: Memory reclamation with optimistic concurrency is described. In one example an allocated memory object is tentatively freed in a software transactional memory, the object having pointers into it from at least one transaction. A time when all transactions that are outstanding at the time an object is tentatively freed have ended is detected, and the object is actually freed based on the detection.
    Type: Application
    Filed: June 9, 2006
    Publication date: December 13, 2007
    Inventors: Bratin Saha, Richard L. Hudson, Ali-Reza Adl-tabatabai
  • Publication number: 20070260608
    Abstract: Methods and systems are provided for managing memory allocations and deallocations while in transactional code, including nested transactional code. The methods and systems manage transactional memory operations by using identifiers, such as sequence numbers, to handle memory management in transactions. The methods and systems also maintain lists of deferred actions to be performed at transaction abort and commit times. A number of memory management routines associated with one or more transactions examine the transaction sequence number of the current transaction, manipulate commit and/or undo logs, and set/use the transaction sequence number of an associated object, but are not so limited. The methods and systems provide for memory allocation and deallocations within transactional code while preserving transactional semantics. Other embodiments are described and claimed.
    Type: Application
    Filed: May 2, 2006
    Publication date: November 8, 2007
    Inventors: Ben Hertzberg, Bratin Saha, Ali-Reza Adi-Tabatabal
  • Publication number: 20070239915
    Abstract: In one embodiment, the present invention includes a method for accessing a shared memory associated with a reader-writer lock according to a first concurrency mode, dynamically changing from the first concurrency mode to a second concurrency mode, and accessing the shared memory according to the second concurrency mode. In this way, concurrency modes can be adaptively changed based on system conditions. Other embodiments are described and claimed.
    Type: Application
    Filed: March 29, 2006
    Publication date: October 11, 2007
    Inventors: Bratin Saha, Ali-Reza Adl-Tabatabai
  • Publication number: 20070233970
    Abstract: Attempting to acquire a write lock provided by an implementation of a software transactional memory (STM) system for each of a set of memory locations of the STM; if a write lock is acquired for each of the set of memory locations, comparing the value in each of the set of memory locations to a corresponding expected value; and if the comparing yields the same, predetermined result for each of the set of memory locations, storing in each memory location a corresponding new value.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 4, 2007
    Inventors: Bratin Saha, Ali-Reza Adl-Tabatabai
  • Publication number: 20070186055
    Abstract: A technique for using memory attributes to relay information to a program or other agent. More particularly, embodiments of the invention relate to using memory attribute bits to check various memory properties in an efficient manner.
    Type: Application
    Filed: February 7, 2006
    Publication date: August 9, 2007
    Inventors: Quinn Jacobson, Anne Bracy, Hong Wang, John Shen, Per Hammarlund, Matthew Merten, Suresh Srinivas, Kshitij Doshi, Gautham Chinya, Bratin Saha, Ali-Reza Adl-Tabatabai, Gad Sheaffer
  • Publication number: 20070186056
    Abstract: A method and apparatus for accelerating transactional execution. Barriers associated with shared memory lines reference by memory accesses within a transaction are only invoked/executed the first time the shared memory lines are accessed within a transaction. Hardware support, such as a transaction field/transaction bits, are provided to determine if an access is the first access to a shared memory line during a pendancy of a transaction. Additionally, in an aggressive operational mode version numbers representing versions of elements stored in shared memory lines are not stored and validated upon commitment to save on validation cost. Moreover, even in a cautious mode, that stores version numbers to enable validation, validation costs may not be incurred, if eviction of accessed shared memory lines do not occur during execution of the transaction.
    Type: Application
    Filed: February 7, 2006
    Publication date: August 9, 2007
    Inventors: Bratin Saha, Ali-Reza Adl-Tabatabai, Quinn Jacobson
  • Publication number: 20070162520
    Abstract: A method and apparatus for efficiently executing nested transactions is herein described. Hardware support for execution of transactions is provided. Additionally, through the use of logging previous values immediately before a current nested transaction in a local memory and storage of a stack of handlers associated with a hierarchy of transactions, nested transactions are potentially efficiently executed. Upon a failure, abort, or invalidating event/access within a nested transaction, the state of variables or memory locations written to during execution of the nested transaction are rolled-back to immediately before the nested transaction, instead of all the way back to an original state of the variables or memory locations before an enclosing transaction. As a result, nested transactions may be re-executed within enclosing transactions, without flattening the enclosing and nested transactions to re-execute everything.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 12, 2007
    Inventors: Leaf Petersen, Bratin Saha, Ali-Reza Adl-tabatabai
  • Publication number: 20070156780
    Abstract: For a variable accessed at least once in a software-based transactional memory system (STM) defined (STM-defined) critical region of a program, modifying an access to the variable that occurs outside any STM-defined critical region system by starting a hardware based transactional memory based transaction, within the hardware based transactional memory based transaction, checking if the variable is currently owned by a STM transaction, checking if the variable is currently owned by a STM transaction; if the variable is not currently owned by a STM transaction, performing the access and then committing the hardware based transactional memory transaction; and if the variable is currently owned by a STM transaction, performing a responsive action.
    Type: Application
    Filed: December 16, 2005
    Publication date: July 5, 2007
    Inventors: Bratin Saha, Ali-Reza Adl-Tabatabai