Patents by Inventor Bruce M. Green

Bruce M. Green has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090146191
    Abstract: Method and apparatus are described for semiconductor devices. The method (100) comprises, providing a partially completed semiconductor device (31-1) including a substrate (21), a semiconductor (22) on the substrate (21) and a passivation layer (25) on the semiconductor (22), and using a first mask (32), locally etching the passivation layer (25) to expose a portion (36) of the semiconductor (22), and without removing the first mask (32) forming a Schottky contact (42-1) of a first material on the exposed portion (36) of the semiconductor (22), then removing the first mask (32) and using a further mask (44), forming a step-gate conductor (48-1) of a second material electrically coupled to the Schottky contact (42-1) and overlying parts (25-1) of the passivation layer (25) adjacent to the Schottky contact (42-1).
    Type: Application
    Filed: December 5, 2007
    Publication date: June 11, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Bruce M. Green, Haldane S. Henry, Chun-Li Liu, Karen E. Moore, Matthias Passlack
  • Patent number: 7253455
    Abstract: In one embodiment, a semiconductor device (500) includes a buffer layer (504) formed over a substrate (502). An AlxGa1?xAs layer (506) is formed over the buffer layer (504) and has a first doped region (508) formed therein. An InxGa1?xAs channel layer (512) is formed over the AlxGa1?xAs layer (506). An AlxGa1?xAs layer (518) is formed over the InxGa1?xAs channel layer (512), and the AlxGa1?xAs layer (518) has a second doped region formed therein. A GaAs layer (520) having a first recess is formed over the AlxGa1?xAs layer (518). A control electrode (526) is formed over the AlxGa1?xAs layer (518). A doped GaAs layer (524) is formed over the undoped GaAs layer (520) and on opposite sides of the control electrode (526) and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device (500) maintains linear operation over a wide temperature range.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: August 7, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bruce M. Green, Olin L. Hartin, Ellen Y. Lan, Philip H. Li, Monte G. Miller, Matthias Passlack, Marcus R. Ray, Charles E. Weitzel
  • Patent number: 7253486
    Abstract: In one example embodiment, a transistor (100) is provided. The transistor (100) comprises a source (10), a gate (30), a drain (20), and a field plate (40) located between the gate (30) and the drain (20). The field plate (40) comprises a plurality of connection locations (47) and a plurality of electrical connectors (45) connecting said plurality of connection locations (47) to a potential.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: August 7, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bruce M. Green, Ellen Lan, Phillip Li
  • Patent number: 7229903
    Abstract: A semiconductor structure includes a first semiconductor layer, a second semiconductor layer over the first semiconductor layer, a third semiconductor layer over the second semiconductor layer, and a fourth semiconductor layer over the third semiconductor layer. A first conductive portion is coupled to the first semiconductor layer, and a second conductive portion is formed over the first semiconductor layer.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: June 12, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hsin-Hua P. Li, Bruce M. Green, Olin L. Hartin, Ellen Y. Lan, Charles E. Weitzel
  • Patent number: 6867078
    Abstract: A microwave field effect transistor (10) has a high conductivity gate (44) overlying a double heterojunction structure (14, 18, 22) that has an undoped channel layer (18). The heterojunction structure overlies a substrate (12). A recess layer that is a not intentionally doped (NID) layer (24) overlies the heterojunction structure and is formed with a predetermined thickness that minimizes impact ionization effects at an interface of a drain contact of source/drain ohmic contacts (30) and permits significantly higher voltage operation than previous step gate transistors. Another recess layer (26) is used to define a gate dimension. A Schottky gate opening (42) is formed within a step gate opening (40) to create a step gate structure. A channel layer (18) material of InxGa1?xAs is used to provide a region of electron confinement with improved transport characteristics that result in higher frequency of operation, higher power density and improved power-added efficiency.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: March 15, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bruce M. Green, Olin L. Hartin, Lawrence S. Klingbeil, Ellen Y. Lan, Hsin-Hua P. Li, Charles E. Weitzel
  • Publication number: 20040021182
    Abstract: In one example embodiment, a transistor (100) is provided. The transistor (100) comprises a source (10), a gate (30), a drain (20), and a field plate (40) located between the gate (30) and the drain (20). The field plate (40) comprises a plurality of connection locations (47) and a plurality of electrical connectors (45) connecting said plurality of connection locations (47) to a potential.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 5, 2004
    Inventors: Bruce M. Green, Ellen Lan, Phillip Li
  • Publication number: 20020137236
    Abstract: A passivation layer of AlN is deposited on a GaN channel HFET using molecular beam epitaxy (MBE). Using MBE, many other surfaces may also be coated with AlN, including silicon devices, nitride devices, GaN based LEDs and lasers as well as other semiconductor systems. The deposition is performed at approximately 150° C. and uses alternating beams of aluminum and remote plasma RF nitrogen to produce an approximately 500 Å thick AlN layer.
    Type: Application
    Filed: May 15, 2001
    Publication date: September 26, 2002
    Inventors: William J. Schaff, Jeonghyun Hwang, Bruce M. Green