Abstract: A method, computer program product, and data processing system for providing optional failure recovery features in operating system kernel code are disclosed. In accordance with a preferred embodiment, a segment of mainline code may designate a recovery routine for that segment by calling a kernel service provided for that purpose. The kernel service allocates a “footprint” region on the recovery stack for storing state information arising from the execution of the recovery-enabled code. In the event of an exception, a recovery manager routine uses information from the recovery stack to recover from the exception. Recovery may be disabled altogether for performance purposes by way of boot-time patching to disable the use of the recovery stack and to allow state information to be written to a static “scratchpad” area, which unlike the recovery stack, is allowed to be overwritten, its contents being ignored.

Abstract: A method, computer program product, and data processing system for providing optional exception recovery features in operating system kernel code are disclosed. In a preferred embodiment, a segment of mainline code may designate a recovery routine for that segment by calling a kernel service provided for that purpose. The kernel service pushes the address of the designated recovery routine, context, and re-entry point information corresponding to the segment to a recovery stack. An additional “footprint” region is also allocated on the recovery stack and used to store other state information needed for recovery. A mask value or barrier count value is also stored on the recovery stack to allow recovery to be disabled for non-recoverable routines.

Abstract: A method, system, and program key-controlled object-based memory protection are provided. A processing unit includes an authority check for controlling access by the processing unit to pages of memory according to whether a hardware protection key set currently loaded in an authority mask register allows access to the pages. In particular, each page of memory is assigned a page key number that indexes into the hardware protection key set. The currently loaded hardware protection key set specifies those page key numbers that are currently accessible to the processing unit for the execution context. Each hardware key within the hardware protection key set may be associated with a particular data object or group of data objects. Thus, effectively, the currently loaded hardware protection key set identifies which data objects or groups of data objects are currently accessible.

Abstract: A method, a system and a computer program product for controlling the hardware priority of hardware threads in a data processing system. A Thread Priority Control (TPC) utility assigns a primary level and one or more secondary levels of hardware priority to a hardware thread. When a hardware thread initiates execution in the absence of a system call, the TPC utility enables execution based on the primary level. When the hardware thread initiates execution within a system call, the TPC utility dynamically adjusts execution from the primary level to the secondary level associated with the system call. The TPC utility adjusts hardware priority levels in order to: (a) raise the hardware priority of one hardware thread relative to another; (b) reduce energy consumed by the hardware thread; and (c) fulfill requirements of time critical hardware sections.

Abstract: Scaling address space utilization in a multi-threaded, multi-processor computer, including attaching to process memory of an exporting process a region of virtual memory specified in a cross-memory descriptor; requesting, by an importing thread of an importing process having process memory, a lightweight attachment of the region of virtual memory to the process memory of the importing process for exclusive use by the importing thread; and lightweight attaching, by an operating system to the process memory of the importing process, the region of virtual memory for exclusive use by the importing thread.

Abstract: A method, system, and program key-controlled object-based memory protection are provided. A processing unit includes an authority check for controlling access by the processing unit to pages of memory according to whether a hardware protection key set currently loaded in an authority mask register allows access to the pages. In particular, each page of memory is assigned a page key number that indexes into the hardware protection key set. The currently loaded hardware protection key set specifies those page key numbers that are currently accessible to the processing unit for the execution context. Each hardware key within the hardware protection key set may be associated with a particular data object or group of data objects. Thus, effectively, the currently loaded hardware protection key set identifies which data objects or groups of data objects are currently accessible.

Abstract: A method, system, and program key-controlled object-based memory protection are provided. A processing unit includes an authority check for controlling access by the processing unit to pages of memory according to whether a hardware protection key set currently loaded in an authority mask register allows access to the pages. In particular, each page of memory is assigned a page key number that indexes into the hardware protection key set. The currently loaded hardware protection key set specifies those page key numbers that are currently accessible to the processing unit for the execution context. Each hardware key within the hardware protection key set may be associated with a particular data object or group of data objects. Thus, effectively, the currently loaded hardware protection key set identifies which data objects or groups of data objects are currently accessible.

Abstract: A method, computer program product, and data processing system for providing optional exception recovery features in operating system kernel code are disclosed. In a preferred embodiment, a segment of mainline code may designate a recovery routine for that segment by calling a kernel service provided for that purpose. The kernel service pushes the address of the designated recovery routine, context, and re-entry point information corresponding to the segment to a recovery stack. An additional “footprint” region is also allocated on the recovery stack and used to store other state information needed for recovery. A mask value or barrier count value is also stored on the recovery stack to allow recovery to be disabled for non-recoverable routines.

Abstract: A method, computer program product, and data processing system for providing optional failure recovery features in operating system kernel code are disclosed. In accordance with a preferred embodiment, a segment of mainline code may designate a recovery routine for that segment by calling a kernel service provided for that purpose. The kernel service allocates a “footprint” region on the recovery stack for storing state information arising from the execution of the recovery-enabled code. In the event of an exception, a recovery manager routine uses information from the recovery stack to recover from the exception. Recovery may be disabled altogether for performance purposes by way of boot-time patching to disable the use of the recovery stack and to allow state information to be written to a static “scratchpad” area, which unlike the recovery stack, is allowed to be overwritten, its contents being ignored.

Abstract: A method, system, and program key-controlled object-based memory protection are provided. A processing unit includes an authority check for controlling access by the processing unit to pages of memory according to whether a hardware protection key set currently loaded in an authority mask register allows access to the pages. In particular, each page of memory is assigned a page key number that indexes into the hardware protection key set. The currently loaded hardware protection key set specifies those page key numbers that are currently accessible to the processing unit for the execution context. Each hardware key within the hardware protection key set may be associated with a particular data object or group of data objects. Thus, effectively, the currently loaded hardware protection key set identifies which data objects or groups of data objects are currently accessible.

Abstract: A method, computer program product, and data processing system for preventing the occurrence of undetectable dangling pointers through memory reallocation are disclosed. Allocated memory regions that are no longer needed are deallocated but are not immediately freed for reallocation, being designated as “retained.” A memory retention metric is computed as a measure of an extent of the retained memory regions in the computer's memory space. Once the memory retention metric exceeds a pre-determined threshold, some or all of the retained memory regions are freed for reuse. In this manner, improper accesses to deallocated memory regions can be detected more easily, since reuse of those regions is delayed, while at the same time excessive resource usage and heap fragmentation is avoided by only retaining deallocated regions for a limited time (determined by the threshold and retention metric chosen).

Abstract: Provided are a method, system, and program for transferring data directed to virtual memory addresses to a device memory. Indicator bits are set for ranges of device memory addresses in a device accessible over an Input/Output (I/O) bus indicating whether gathering is enabled for the device memory address ranges. Transfer operations are processed to transfer data to contiguous device memory addresses in the device. A determination is made as to whether the indicator bits for the contiguous device memory addresses indicate that gathering is enabled. A single bus I/O transaction is generated to transfer data for the contiguous device memory addresses over the I/O bus in response to determining that the indicator bits for the contiguous device memory addresses indicate that gathering is enabled.

Abstract: Scaling address space utilization in a multi-threaded, multi-processor computer, including attaching to process memory of an exporting process a region of virtual memory specified in a cross-memory descriptor; requesting, by an importing thread of an importing process having process memory, a lightweight attachment of the region of virtual memory to the process memory of the importing process for exclusive use by the importing thread; and lightweight attaching , by an operating system to the process memory of the importing process, the region of virtual memory for exclusive use by the importing thread.

Abstract: Scaling address space utilization in a multi-threaded, multi-processor computer, including attaching to process memory of an exporting process a region of virtual memory specified in a cross-memory descriptor; requesting, by an importing thread of an importing process having process memory, a lightweight attachment of the region of virtual memory to the process memory of the importing process for exclusive use by the importing thread; and lightweight attaching, by an operating system to the process memory of the importing process, the region of virtual memory for exclusive use by the importing thread.

Abstract: A system, method, and computer program product for semi-synchronously copying data from a first portion of memory to a second portion of memory are disclosed. The method comprises receiving, in a processor, a call for a semi-synchronous memory copy operation. The semi-synchronous memory copy operation preserves temporal persistence of validity for a virtual source address corresponding to a source location in a memory and a virtual target address corresponding to a target location in the memory by setting a flag bit. The call includes at least the virtual source address, the virtual target address, and an indicator identifying a number of bytes to be copied. The memory copy operation is placed in a queue for execution by a memory controller. The queue is coupled to the memory controller. At least one subsequent instruction is continued to be executed as the subsequent instruction becomes available from an instruction pipeline.

Abstract: A method, processing node, and computer readable medium for propagating data using mirrored lock caches are disclosed. The method includes coupling a first mirrored lock cache associated with a first processing node to a bus that is communicatively coupled to at least a second mirrored lock cache associated with a second processing node in a multi-processing system. The method further includes receiving, by the first mirrored lock cache, data from a processing node. The data is then mirrored automatically so that the same data is available locally at the second mirrored lock cache for use by the second processing node.

Abstract: A system, method, and a computer readable for protecting content of a memory page are disclosed. The method includes determining a start of a semi-synchronous memory copy operation. A range of addresses is determined where the semi-synchronous memory copy operation is being performed. An issued instruction that removes a page table entry is detected. The method further includes determining whether the issued instruction is destined to remove a page table entry associated with at least one address in the range of addresses. In response to the issued instruction being destined to remove the page table entry, the execution of the issued instruction is stalled until the semi-synchronous memory copy operation is completed.

Abstract: A system, method, and a computer readable for inserting data into a cache memory based on information in a semi-synchronous memory copy instruction are disclosed. The method comprises determining a start of a semi-synchronous memory copy operation. The semi-synchronous memory copy operation is checked for a given value in at least one cache injection bit. In response to the given value in the cache injection bit, a predefined number of lines of destination data is copied into at least one level of cache memory.

Abstract: A system and method for passing Direct Memory Access (DMA) configuration information from one device driver to another in order to initialize devices for DMA operations are provided. More specifically, a mechanism for passing information, identifying a DMA address space allocated to a child virtual device, from the child virtual device to the virtual I/O (VIO) bus is provided so that DMA operations may be initialized for the child virtual device via the VIO bus. With the system and method, the device driver of the child virtual device passes information regarding the DMAble address space of the child virtual device directly to the device driver of the VIO bus using one of a I/O control (IOCTL) interface and an operating system kernel service. This information is then used by the VIO bus device driver to setup the VIO bus for DMA operations from the child virtual device.

Abstract: Provided are a method, system, and program for transferring data directed to virtual memory addresses to a device memory. Indicator bits are set for ranges of device memory addresses in a device accessible over an Input/Output (I/O) bus indicating whether gathering is enabled for the device memory address ranges. Transfer operations are processed to transfer data to contiguous device memory addresses in the device. A determination is made as to whether the indicator bits for the contiguous device memory addresses indicate that gathering is enabled. A single bus I/O transaction is generated to transfer data for the contiguous device memory addresses over the I/O bus in response to determining that the indicator bits for the contiguous device memory addresses indicate that gathering is enabled.