Abstract: This is a p-n junction device and the device comprises: a substrate 10 composed of a semiconductor material; a heavily doped n type sub-collector layer 14 over the substrate; a n type collector layer 16 over the sub-collector layer; a heavily doped p type first base layer 18, over the collector layer; a p type second base layer 20, substantially thinner than the first base layer, over the first base layer, with the second base layer being less heavily doped than the first base layer; and a n type emitter layer 24 over the second base layer, whereby, the second base layer serves as a diffusion barrier between the base and the emitter. Other devices and methods are also disclosed.

Abstract: Generally, and in one form of the invention, a microwave heterojunction bipolar transistor suitable for low-power, low-noise and high-power applications having an emitter 108, a base 126 and a collector 24 is disclosed, wherein the base 126 is composed of one or more islands 126 of semiconductor material. The one or more islands 126 are formed so that they do not cross any boundaries of the active area 60 of the transistor.Other devices, systems and methods are also disclosed.

Abstract: Generally, and in one form of the invention, a semi-insulating semiconductor substrate 10 is provided having a first surface. An HBT subcollector region 12 of a first conductivity type is implanted in the substrate 10 at the first surface. Next, an i-layer 16 is grown over the first surface, over which an HFET electron donor layer 18 of the first conductivity type is grown, the electron donor layer 18 having a wider energy bandgap than the i-layer. Subsequently, an HFET contact layer 20 of the first conductivity type is grown over the HFET donor layer 18. Next, the HFET contact 20 and donor 18 layers are etched away over the HBT subcollector region 12, after which an HBT base layer 22 of a second conductivity type is selectively grown on the i-layer 16 over the HBT subcollector region 12. Then, an HBT emitter layer 24/26/28 of the first conductivity type is selectively grown over the HBT base layer 22, the HBT emitter layer 24/26/28 having a wider energy bandgap than the HBT base layer 22.

Abstract: Generally, and in one form of the invention, a semi-insulating semiconductor substrate 10 is provided having a first surface. An HBT subcollector region 12 of a first conductivity type is implanted in the substrate 10 at the first surface. A PIN diode region 14 of the first conductivity type is then implanted in the substrate 10 at the first surface and spaced from the HBT subcollector region 12. Next, an i-layer 16 is grown over the first surface. Next, an HBT base/PIN diode layer 22 of a second conductivity type is selectively grown on the i-layer 16 over the HBT subcollector region 12 and the PIN diode region 14. Then, an HBT emitter layer 24/26/28 of the first conductivity type is selectively grown over the HBT base/PIN diode layer 22, the HBT emitter layer 24/26/28 having a wider energy bandgap than the HBT base/PIN diode layer 22.

Abstract: Generally, and in one form of the invention, a p-n junction diffusion barrier is disclosed comprising a first semiconductor layer 28 of p-type conductivity, a second semiconductor layer 32 of n-type conductivity and a third semiconductor layer 30 of p-type conductivity disposed between the first and second layers, the third layer being doped with a relatively low diffusivity dopant in order to form a diffusion barrier between the first and the second semiconductor layers.

Abstract: Integrated circuits and fabrication methods incorporating both two-terminal devices such as IMPATT diodes (446) and Schottky diodes (454) and three-terminal devices such as n-channel MESFETs (480) in a monolithic integrated circuit.

Abstract: A method of fabricating heterojunction bipolar transistors (HBTs) including epitaxial growth of collector, base and emitter layers, allowing for self-aligned emitter-base contacts to minimize series base resistance and to reduce total base-collector capacitance.

Abstract: An integrated circuit including both bipolar and field effect devices is disclosed, comprising a first continuous layer 102/104 of semi-insulating semiconductor material having a continuous first surface, a doped channel region 108 in the first layer 102/104 at the first surface of the first layer 102/104, a doped collector region 114 in the first layer 102/104 at the first surface spaced from the channel region 108, a doped base layer 122 on the collector region 114, the base layer 122 of conductivity type opposite that of the collector region 114, a doped emitter region 124 on the base layer 122, the emitter region 124 of the same conductivity type as the collector 114 to provide a bipolar device, the emitter region 124 made of semiconductor material with a wider bandgap than the base layer 122 semiconductor material, source and drain contacts 138 on the channel region 108, a gate 146 on the channel region 108 between the source and drain contacts 138 to provide a field effect device, and electrical couplin

Abstract: A GaAs MESFET employs an etch stop layer of Ga.sub.0.99 In.sub.0.01 As over the channel region.

Abstract: Generally, and in one form of the invention, a semi-insulating semiconductor substrate 10 is provided having a first surface. An HBT subcollector region 12 of a first conductivity type is implanted in the substrate 10 at the first surface. A PIN diode region 14 of the first conductivity type is then implanted in the substrate 10 at the first surface and spaced from the HBT subcollector region 12. Next, an i-layer 16 is grown over the first surface. Next, an HBT base/PIN diode layer 22 of a second conductivity type is selectively grown on the i-layer 16 over the HBT subcollector region 12 and the PIN diode region 14. Then, an HBT emitter layer 24/26/28 of the first conductivity type is selectively grown over the HBT base/PIN diode layer 22, the HBT emitter layer 24/26/28 having a wider energy bandgap than the HBT base/PIN diode layer 22.

Abstract: Generally, and in one form of the invention, a p-n junction diffusion barrier is disclosed comprising a first semiconductor layer 28 of p-type conductivity, a second semiconductor layer 32 of n-type conductivity and a third semiconductor layer 30 of p-type conductivity disposed between the first and second layers, the third layer being doped with a relatively low diffusivity dopant in order to form a diffusion barrier between the first and the second semiconductor layers.Other devices, systems and methods are also disclosed.

Abstract: Generally, and in one form of the invention, a semi-insulating semiconductor substrate 10 is provided having a first surface. An HBT subcollector region 12 of a first conductivity type is implanted in the substrate 10 at the first surface. Next, an i-layer 16 is grown over the first surface, over which an HFET electron donor layer 18 of the first conductivity type is grown, the electron donor layer 18 having a wider energy bandgap than the i-layer. Subsequently, an HFET contact layer 20 of the first conductivity type is grown over the HFET donor layer 18. Next, the HFET contact 20 and donor 18 layers are etched away over the HBT subcollector region 12, after which an HBT base layer 22 of a second conductivity type is selectively grown on the i-layer 16 over the HBT subcollector region 12. Then, an HBT emitter layer 24/26/28 of the first conductivity type is selectively grown over the HBT base layer 22, the HBT emitter layer 24/26/28 having a wider energy bandgap than the HBT base layer 22.

Abstract: Preferred embodiments include a microstrip patch antenna (38) which also acts as the resonator for an oscillator powered by IMPATT diodes (34, 36); this forms a monolithic transmitter (30) for microwave and millimeter wave frequencies.

Abstract: This is a p-n junction device and the device comprises: a substrate 10 composed of a semiconductor material; a heavily doped n type sub-collector layer 14 over the substrate; a n type collector layer 16 over the sub-collector layer; a heavily doped p type first base layer 18, over the collector layer; a p type second base layer 20, substantially thinner than the first base layer, over the first base layer, with the second base layer being less heavily doped than the first base layer; and a n type emitter layer 24 over the second base layer, whereby, the second base layer serves as a diffusion barrier between the base and the emitter. Other devices and methods are also disclosed.

Abstract: A monolithically realizable radio frequency (RF) bias choke implemented as a parallel inductor/capacitor arrangement connected between a DC supply node and an RF circuit bias point.

Abstract: An integrated circuit including both bipolar and field effect devices is disclosed, comprising a first continuous layer 102/104 of semi-insulating semiconductor material having a continuous first surface, a doped channel region 108 in the first layer 102/104 at the first surface of the first layer 102/104, a doped collector region 114 in the first layer 102/104 at the first surface spaced from the channel region 108, a doped base layer 122 on the collector region 114, the base layer 122 of conductivity type opposite that of the collector region 114, a doped emitter region 124 on the base layer 122, the emitter region 124 of the same conductivity type as the collector 114 to provide a bipolar device, the emitter region 124 made of semiconductor material with a wider bandgap than the base layer 122 semiconductor material, source and drain contacts 138 on the channel region 108, a gate 146 on the channel region 108 between the source and drain contacts 138 to provide a field effect device, and electrical couplin

Abstract: Preferred embodiments include a radar traffic light control system with a transmitter/receiver module including an array (103) of interconnected microstrip patch antennas (38) which also act as the resonators for oscillators powered by IMPATT diodes (34, 36); varactors (158) on the interconnections permit beam steering for scanning roadways.

Abstract: Two-terminal active devices, such as IMPATT and Gunn diodes, are combined with passive devices in a monolithic form using a plated metal heat sink to support the active elements and a coated-on dielectric to support the passive elements. Impedance-matching circuitry is preferably placed very close to (or partially overlapping) the active device, thereby eliminating detrimental device-to-circuit transition losses.

Abstract: Structures (30) with IMPATT type diodes (34) located periodically along a transmission line (38-32) to simulate a distributed diode are disclosed. Preferred embodiments include incorporation of the periodic diode structures as the gain element of microwave amplifiers and oscillators. Preferred embodiments also place capacitors between the diodes to fix nodes in the electric field and increase the effective structure size.

Abstract: The disclosure relates to a monolithic circuit and method of making same which includes the use of two substrates of different semiconductor materials or two substrates of the same semiconductor material wherein the processing steps required for certain parts of the circuit are incompatible with the processing steps required for other parts of the circuit.