Patents by Inventor Byeongdeck Jang

Byeongdeck Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11854891
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of separating, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a through hole formed by separating the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the through hole.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: December 26, 2023
    Assignee: DISCO CORPORATION
    Inventors: Youngsuk Kim, Byeongdeck Jang, Akihito Kawai, Shunsuke Teranishi
  • Patent number: 11764115
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: September 19, 2023
    Assignee: DISCO CORPORATION
    Inventors: Youngsuk Kim, Byeongdeck Jang, Akihito Kawai, Shunsuke Teranishi
  • Patent number: 11764114
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a support substrate fixing step of fixing the wafer to a support substrate, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region, and fixing the device chip to the support substrate.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: September 19, 2023
    Assignee: DISCO CORPORATION
    Inventors: Youngsuk Kim, Byeongdeck Jang, Akihito Kawai, Shunsuke Teranishi
  • Patent number: 11756831
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, a support substrate fixing step of fixing the wafer to a support substrate, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region, and fixing the device chip to the support substrate.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: September 12, 2023
    Assignee: DISCO CORPORATION
    Inventors: Youngsuk Kim, Byeongdeck Jang, Akihito Kawai, Shunsuke Teranishi
  • Patent number: 11682569
    Abstract: A workpiece cutting method of cutting a workpiece along a plurality of crossing division lines formed on a front side of the workpiece, by using a cutting blade having a thickness gradually decreasing toward an outer circumference of the cutting blade. The workpiece cutting method includes a shape checking step of checking a shape of the cutting blade; a cut depth setting step of setting a cut depth by the cutting blade into the workpiece according to the shape checked in the shape checking step such that a width of a cut groove to be formed on the front side of the workpiece becomes a previously set value; and a cutting step of cutting the workpiece with the cut depth set in the cut depth setting step, by forcing the cutting blade into the workpiece from the front side thereof.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: June 20, 2023
    Assignee: DISCO CORPORATION
    Inventors: Byeongdeck Jang, Youngsuk Kim
  • Patent number: 11590629
    Abstract: A method of processing a workpiece includes sticking an adhesive layer side of a resin sheet having a layered structure that includes the adhesive layer and a base material layer, to a support base, forming surface irregularities on a face side of the base material layer that is opposite the adhesive layer; placing a face side of the workpiece and the face side of the base material layer in facing relation to each other and pressing the workpiece against the resin sheet or pressing the resin sheet against the workpiece, thereby bringing the workpiece into intimate contact with the resin sheet to fix the workpiece to the resin sheet; holding a surface of the support base that is opposite the resin sheet on a holding surface of a chuck table, and grinding a reverse side of the workpiece with a grinding stone disposed in facing relation to the holding surface.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: February 28, 2023
    Assignee: DISCO CORPORATION
    Inventors: Yosuke Murata, Kazuhiro Koike, Byeongdeck Jang, Youngsuk Kim, Takeshi Sakamoto
  • Patent number: 11508607
    Abstract: A method of processing a workpiece includes sticking an adhesive layer side of a resin sheet having a layered structure that includes an adhesive layer and a base material layer, to an annular frame having an opening in covering relation to the opening, forming surface irregularities on a face side of the base material layer that is opposite the adhesive layer, placing the face side of the workpiece and the face side of the base material layer in facing relation to each other and pressing the workpiece against the resin sheet or pressing the resin sheet against the workpiece, thereby bringing the workpiece into intimate contact with the resin sheet to fix the workpiece to the resin sheet, holding the face side of the workpiece fixed to the resin sheet on a holding surface of a chuck table, and grinding the reverse side of the workpiece with a grinding stone.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: November 22, 2022
    Assignee: DISCO CORPORATION
    Inventors: Yosuke Murata, Kazuhiro Koike, Byeongdeck Jang, Youngsuk Kim, Takeshi Sakamoto
  • Publication number: 20220157660
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region.
    Type: Application
    Filed: November 4, 2021
    Publication date: May 19, 2022
    Inventors: Youngsuk KIM, Byeongdeck JANG, Akihito KAWAI, Shunsuke TERANISHI
  • Publication number: 20220157668
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a support substrate fixing step of fixing the wafer to a support substrate, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region, and fixing the device chip to the support substrate.
    Type: Application
    Filed: November 4, 2021
    Publication date: May 19, 2022
    Inventors: Youngsuk KIM, Byeongdeck JANG, Akihito KAWAI, Shunsuke TERANISHI
  • Publication number: 20220157667
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of separating, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a through hole formed by separating the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the through hole.
    Type: Application
    Filed: November 3, 2021
    Publication date: May 19, 2022
    Inventors: Youngsuk KIM, Byeongdeck JANG, Akihito KAWAI, Shunsuke TERANISHI
  • Publication number: 20220157659
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, a support substrate fixing step of fixing the wafer to a support substrate, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region, and fixing the device chip to the support substrate.
    Type: Application
    Filed: November 4, 2021
    Publication date: May 19, 2022
    Inventors: Youngsuk KIM, Byeongdeck JANG, Akihito KAWAI, Shunsuke TERANISHI
  • Publication number: 20220157658
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of separating, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a through hole formed by separating the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the through hole.
    Type: Application
    Filed: November 3, 2021
    Publication date: May 19, 2022
    Inventors: Youngsuk KIM, Byeongdeck JANG, Akihito KAWAI, Shunsuke TERANISHI
  • Publication number: 20220157669
    Abstract: A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region.
    Type: Application
    Filed: November 4, 2021
    Publication date: May 19, 2022
    Inventors: Youngsuk KIM, Byeongdeck JANG, Akihito KAWAI, Shunsuke TERANISHI
  • Patent number: 11322476
    Abstract: A manufacturing method of a semiconductor package includes a groove forming step of cutting a semiconductor package substrate from an upper surface side along division lines in a cut-in-depth range of at least such a depth as to cause a ground line included in a wiring substrate to be exposed in a processing groove to such a depth that the semiconductor package substrate is not fully cut with a first cutting blade, thereby forming the processing groove having a first width at least on an upper surface of a sealing material, a shielding layer forming step of forming a shielding layer on a side surface of the processing groove, a bottom surface of the processing groove, and the upper surface of the sealing material with a conductive material from an upper side of the sealing material, and a dividing step of, cutting the semiconductor package substrate into individual semiconductor packages.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: May 3, 2022
    Assignee: DISCO CORPORATION
    Inventors: Byeongdeck Jang, Youngsuk Kim
  • Patent number: 11289348
    Abstract: A workpiece processing method is provided for processing a workpiece including a device region, a peripheral surplus region surrounding the device region, and key patterns being arranged on a top surface side in the peripheral surplus region so as to correspond to a plurality of planned dividing lines, the method including: a resin sheet sticking step of sticking a resin sheet to the top surface side of the workpiece, and transferring the key patterns onto the resin sheet; a peripheral surplus region removing step of dividing the peripheral surplus region from the workpiece, and peeling off the peripheral surplus region from the resin sheet; and a device region processing step of identifying a position of at least one planned dividing line by using, as marks, traces of the key patterns exposed in the peripheral surplus region removing step, and processing the device region along the plurality of planned dividing lines.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: March 29, 2022
    Assignee: DISCO CORPORATION
    Inventors: Byeongdeck Jang, Youngsuk Kim
  • Patent number: 11183464
    Abstract: A package substrate processing method for processing a package substrate in which a plurality of semiconductor chips on a wiring substrate are collectively sealed with a sealing agent is provided. In the package substrate processing method, a protective tape is adhered to the wiring substrate side of the package substrate, the package substrate is divided into a plurality of semiconductor packages, and a shield layer is formed on an upper surface and side surfaces of each package. In this instance, the package substrate is divided in a state in which adhesiveness of an adhesive layer of the protective tape in the periphery of the package substrate is reduced or eliminated, whereby adhesion of a metallic powder scattering at the time of the dividing to the adhesive layer of the protective tape is restrained.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: November 23, 2021
    Assignee: DISCO CORPORATION
    Inventors: Byeongdeck Jang, Youngsuk Kim
  • Patent number: 11133198
    Abstract: A method of manufacturing a packaged device chip includes the steps of forming a rewiring layer having rewiring patterns respectively in a plurality of areas demarcated on the rewiring layer by a projected dicing line on a first surface of a support member that has a second surface opposite the first surface, forming a dividing groove for dividing the rewiring layer in the rewiring layer along the projected dicing line, placing device chips in the respective areas on the rewiring layer and connecting the rewiring patterns and the device chips to each other, covering the device chips and the rewiring layer with molded resin while filling the dividing groove with the molded resin, and cutting the molded resin across an area disposed within the dividing groove and narrower than the dividing groove and forming packaged device chips.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: September 28, 2021
    Assignee: DISCO CORPORATION
    Inventors: Byeongdeck Jang, Youngsuk Kim
  • Patent number: 11114385
    Abstract: A processing method for dividing a plate-shaped workpiece into a plurality of individual packages along a plurality of crossing division lines, in which the workpiece has terminals on the back side, includes the steps of attaching a protective member to the back side of the workpiece so as to cover the terminals to thereby unite the protective member with the workpiece, dividing the workpiece with the protective member along each division line to obtain the individual packages in a condition where the protective member is attached to each package, forming a conductive shield layer on the outer surface of each package, and peeling the protective member from each package.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: September 7, 2021
    Assignee: DISCO CORPORATION
    Inventors: Youngsuk Kim, Byeongdeck Jang
  • Publication number: 20210074559
    Abstract: A workpiece cutting method of cutting a workpiece along a plurality of crossing division lines formed on a front side of the workpiece, by using a cutting blade having a thickness gradually decreasing toward an outer circumference of the cutting blade. The workpiece cutting method includes a shape checking step of checking a shape of the cutting blade; a cut depth setting step of setting a cut depth by the cutting blade into the workpiece according to the shape checked in the shape checking step such that a width of a cut groove to be formed on the front side of the workpiece becomes a previously set value; and a cutting step of cutting the workpiece with the cut depth set in the cut depth setting step, by forcing the cutting blade into the workpiece from the front side thereof.
    Type: Application
    Filed: September 2, 2020
    Publication date: March 11, 2021
    Inventors: Byeongdeck JANG, Youngsuk KIM
  • Patent number: 10937668
    Abstract: A semiconductor package manufacturing method includes the steps of bonding a plurality of semiconductor chips to the front side of a wiring substrate, next supplying a sealing compound to the front side of the wiring substrate to thereby form a sealing layer from the sealing compound on the front side of the wiring substrate, thereby forming a package substrate, next holding the package substrate on a holding tape, next cutting the front side of the resin layer by using a profile grinding tool to thereby form a plurality of ridges and grooves on the front side of the resin layer, thereby increasing the surface area of the front side of the resin layer, and next dividing the package substrate along each division line to obtain a plurality of individual semiconductor packages.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: March 2, 2021
    Assignee: DISCO CORPORATION
    Inventors: Youngsuk Kim, Byeongdeck Jang