Abstract: Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process.

Abstract: An electronic package includes a substrate having a conductive element. The conductive element includes a stepped portion disposed at an end of the conductive element. In one embodiment, the conductive element is a lead. In another embodiment, the conductive element is a die pad. The stepped portion includes a first groove extending inward from a lower surface of the first conductive element, and a second groove extending further inward from the first groove towards an upper surface of the conductive element. An electronic component is connected to the conductive element. In one embodiment, a clip is used to electrically connect the electronic component to the conductive element. An encapsulant encapsulates the electronic component and a portion of the substrate such that the stepped portion is exposed outside an exterior side surface of the encapsulant. The stepped portion is configured to improve the bonding strength of the electronic package when attached to a next level of assembly.

Abstract: An electronic package includes a substrate having a conductive element. The conductive element includes a stepped portion disposed at an end of the conductive element. In one embodiment, the conductive element is a lead. In another embodiment, the conductive element is a die pad. The stepped portion includes a first groove extending inward from a lower surface of the first conductive element, and a second groove extending further inward from the first groove towards an upper surface of the conductive element. An electronic component is connected to the conductive element. In one embodiment, a clip is used to electrically connect the electronic component to the conductive element. An encapsulant encapsulates the electronic component and a portion of the substrate such that the stepped portion is exposed outside an exterior side surface of the encapsulant. The stepped portion is configured to improve the bonding strength of the electronic package when attached to a next level of assembly.

Abstract: In one embodiment, a semiconductor package includes a multi-layer encapsulated conductive substrate having a fine pitch. The multi-layer encapsulated conductive substrate includes a conductive leads spaced apart from each other, a first encapsulant disposed between the leads, a first conductive layer electrically connected to the plurality of leads, conductive pillars disposed on the first conductive layer, a second encapsulant encapsulating the first conductive layer and the conductive pillars, and a second conductive layer electrically connected to the conductive pillars and exposed in the second encapsulant. A semiconductor die is electrically connected to the second patterned conductive layer. A third encapsulant covers at least the semiconductor die.

Abstract: In one embodiment, a method for fabricating a semiconductor package includes providing a multi-layer molded conductive structure. The multi-layer molded conductive structure includes a first conductive structure disposed on a surface of a carrier and a first encapsulant covering at least portions of the first conductive structure while other portions are exposed in the first encapsulant. A second conductive structure is disposed on the first encapsulant and electrically connected to the first conductive structure. A second encapsulant covers a first portion of the second conductive structure while a second portion of the second conductive structure is exposed to the outside, and a third portion of the second conductive structure is exposed in a receiving space disposed in the second encapsulant. The method includes electrically connecting a semiconductor die to the second conductive structure and in some embodiments removing the carrier.

Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent the package body, which is electrically connected to the conductive spaced-apart pillar structures. In one embodiment, the electrical connection is made through the package.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.

Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: An electronic package includes a substrate having a plurality of lands embedded within an insulating layer. Conductive patterns are disposed on at least a portion of a respective land top surface. An electronic device is electrically connected to the conductive patterns, wherein the land bottom surfaces are exposed to the outside. In another embodiment, the top land surfaces and the top surface of the insulating layer are substantially co-planar and the conductive patterns further overlap portions of the top surface of the insulating layer. In one embodiment, a package body encapsulates the top surface of the insulating material and the electronic device, wherein the land bottom surfaces are exposed to the outside of the package body.

Abstract: Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process.

Abstract: A semiconductor device includes a die pad, a plurality of first lands each having a first land first top recessed portion disposed on a first land first end distal to the die pad, and a plurality of second lands each having a second land first bottom recessed portion disposed on a second land first end distal to the die pad. A semiconductor die is electrically connected to the first and second lands. A package body, which defines a bottom surface and a side surface, at least partially encapsulating the first and second lands and the semiconductor die such that at least portions of the first and second lands are exposed in and substantially flush with the bottom surface of the package body.

Abstract: Disclosed is a semiconductor device including a conductive shield layer formed within a cavity of a molding part and a manufacturing method thereof. Various aspects of the present invention, for example and without limitation, includes a semiconductor device including a conductive shield layer formed along the wall of a cavity to of a molding part to improve EMI shielding performance, and a manufacturing method thereof.

Abstract: A packaged electronic device includes an integrated antenna as part of a conductive leadframe. The conductive leadframe includes a die paddle have an elongated conductive beam structure configured as a transmission line, and a ground plane structure disposed surrounding the die paddle. The ground plane includes a gap where the transmission line extends to an edge of the packaged electronic device. In one embodiment, selected leads within the leadframe are configured with conductive connective structures as ground pins, source pins, and/or wave guides. In an alternate embodiment, a portion of the integrated antenna is embedded and partially exposed within the body of the packaged electronic device.

Abstract: A semiconductor package structure includes a substrate comprising a land structure. The land structure includes a first land section having a first height in a cross-sectional view and a second land section having a second height in the cross-sectional view that is different than the first height. A mold encapsulant is disposed adjacent a lateral portion of the first land section and is disposed below a bottom portion of the second land section. A semiconductor die is attached to the substrate, and includes a first major surface, a second major surface opposing the first major surface, and an outer perimeter. The semiconductor die further includes a bonding structure disposed adjacent the first major surface, which is coupled to the second land section such that the first land section is disposed outside the perimeter of the semiconductor die A mold member encapsulates at least portions of the semiconductor die.

Abstract: In one embodiment, an electronic package includes a substrate having a plurality of lands embedded within an insulating layer. Conductive patterns are disposed on at least a portion of a respective land top surface. An electronic device is electrically connected to the conductive patterns and a package body encapsulating the top surface of the insulating material and the electronic device, wherein the bottom land surfaces are exposed to the outside. In another embodiment, the top land surfaces and the top surface of the insulating layer are substantially co-planar and the conductive patterns further overlap portions of the top surface of the insulating layer.

Abstract: In one embodiment, a method for forming a package substrate includes selectively removing portions of a lead frame to form cavities and filling the cavities with a resin layer to define an adhesion pad and a land structure. Top portions of the lead frame are selectively removed to isolate the adhesion pad and the land structure from each other, to expose a top surface of the resin layer, and to form at least one land having a part with a relatively greater size than the size of a respective lower part.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.