Abstract: Provided are a nonvolatile memory device and a method of fabricating the same, in which a phase-change layer is formed using a solid-state reaction to reduce a programmable volume, thereby lessening power consumption. The device includes a first reactant layer, a second reactant layer formed on the first reactant layer, and a phase-change layer formed between the first and second reactant layers due to a solid-state reaction between a material forming the first reactant layer and a material forming the second reactant layer. The phase-change memory device consumes low power and operates at high speed.

Abstract: Provided are a nonvolatile memory device and a method of fabricating the same, in which a phase-change layer is formed using a solid-state reaction to reduce a programmable volume, thereby lessening power consumption. The device includes a first reactant layer, a second reactant layer formed on the first reactant layer, and a phase-change layer formed between the first and second reactant layers due to a solid-state reaction between a material forming the first reactant layer and a material forming the second reactant layer. The phase-change memory device consumes low power and operates at high speed.

Abstract: A phase change memory device and a method of fabricating the same are provided. A phase change material layer of the phase change memory device is formed of germanium (Ge)-antimony (Sb)-Tellurium (Te)-based Ge2Sb2+xTe5 (0.12?x?0.32), so that the crystalline state is determined as a stable single phase, not a mixed phase of a metastable phase and a stable phase, in phase transition between crystalline and amorphous states of a phase change material, and the phase transition according to increasing temperature directly transitions to the single stable phase from the amorphous state. As a result, set operation stability and distribution characteristics of set state resistances of the phase change memory device can be significantly enhanced, and an amorphous resistance can be maintained for a long time at a high temperature, i.e., around crystallization temperature, and thus reset operation stability and rewrite operation stability of the phase change memory device can be significantly enhanced.

Abstract: Provided is a method of depositing an amorphous silicon thin film by chemical vapor deposition (CVD) to prevent bubble defect occurring when an amorphous silicon thin film is deposited on a substrate contaminated by air exposure. The deposition method includes cleaning a surface of the contaminated substrate with a reaction gas activated by plasma and depositing an amorphous silicon thin film on the cleaned substrate. Here, a vacuum state is maintained from the substrate cleaning step to the thin film deposition step in order to prevent contamination of the surface of the cleaned substrate by re-exposure to air.

Abstract: Provided are a phase-change nonvolatile memory device and a manufacturing method thereof. The device includes: a substrate; and a stack structure disposed on the substrate and including a phase-change material layer. The phase-change material layer is formed of an alloy of antimony (Sb) and zinc (Zn), so that the phase-change memory device can stably operate at high speed and reduce power consumption.

Abstract: Provided are an apparatus and method for writing data to a phase-change random access memory (PRAM) by using writing power calculation and data inversion functions, and more particularly, an apparatus and method for writing data which can minimize power consumption by calculating the power consumed while input original data or inverted data is written to a PRAM and storing the data consuming less power. A PRAM consumes a significant amount of power in order to store data in a memory cell since a large electric current is required to flow for a long period of time.

Abstract: Provided is a programmable logic block of a field-programmable gate array (FPGA). The programmable logic block includes a pull-up access transistor connected to a power source, an up-phase-change memory device connected to the pull-up access transistor, a down-phase-change memory device connected to the up-phase-change memory device, an output terminal between the up-phase-change memory device and the down-phase-change memory device, and a pull-down access transistor connected to the down-phase-change memory device and a ground. The resistance values of the up-phase-change memory device and the down-phase-change memory device are individually programmed.

Abstract: An embedded memory required for a high performance, multifunction SOC, and a method of fabricating the same are provided. The memory includes a bipolar transistor, a phase-change memory device and a MOS transistor, adjacent and electrically connected, on a substrate. The bipolar transistor includes a base composed of SiGe disposed on a collector. The phase-change memory device has a phase-change material layer which is changed from an amorphous state to a crystalline state by a current, and a heating layer composed of SiGe that contacts the lower surface of the phase-change material layer.

Abstract: A phase-change memory device in which a phase-change material layer has a multilayered structure with different compositions and a method of fabricating the same are provided. The phase-change memory device includes a first electrode layer formed on a substrate, a heater electrode layer formed on the first electrode layer, an insulating layer formed on the heater electrode layer and having a pore partially exposing the heater electrode layer, a phase-change material layer formed to fill the pore and partially contacting the heater electrode layer, and a second electrode layer formed on the phase-change material layer.

Abstract: Provided are a microbolometer having a cantilever structure and a method of manufacturing the same, and more particularly, a microbolometer having a three-dimensional cantilever structure, which is improved from a conventional two-dimensional cantilever structure, and a method of manufacturing the same. The method includes providing a substrate including a read-out integrated circuit and a reflective layer for forming an absorption structure, forming a sacrificial layer on the substrate, forming a cantilever structure having an uneven cross-section in the sacrificial layer, forming a sensor part isolated from the substrate by the cantilever structure, and removing the sacrificial layer.

Abstract: An embedded memory required for a high performance, multifunction SOC, and a method of fabricating the same are provided. The memory includes a bipolar transistor, a phase-change memory device and a MOS transistor, adjacent and electrically connected, on a substrate. The bipolar transistor includes a base composed of SiGe disposed on a collector. The phase-change memory device has a phase-change material layer which is changed from an amorphous state to a crystalline state by a current, and a heating layer composed of SiGe that contacts the lower surface of the phase-change material layer.

Abstract: Provided are a Phase-change Random Access Memory (PRAM) device and a method of manufacturing the same. In particular, a PRAM device including a heating layer, wherein the heating layer comprises first and second heating layers having different physical properties from each other and a method of manufacturing the same are provided. Since the PRAM device according to the present invention includes a heating layer having optimal heating characteristics, a PRAM device having high reliability and excellent operating characteristics can be manufactured.

Abstract: Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.

Abstract: Provided are a Phase-change Random Access Memory (PRAM) device and a method of manufacturing the same. In particular, a PRAM device including a heating layer, wherein the heating layer comprises first and second heating layers having different physical properties from each other and a method of manufacturing the same are provided. Since the PRAM device according to the present invention includes a heating layer having optimal heating characteristics, a PRAM device having high reliability and excellent operating characteristics can be manufactured.

Abstract: An infrared sensor and a method of fabricating the same are provided. The sensor includes a substrate including a reflection layer and a plurality of pad electrodes, an interdigitated sensing electrode connected to the pad electrode and formed to be spaced apart from the reflection layer by a predetermined distance and a sensing layer formed on the sensing electrode and having an opening exposing a portion in which an interdigitated region of the sensing electrode connected to one pad region is separated from the sensing electrode connected to the other pad electrode. Therefore, the sensor has an electrode in a very simple constitution, and a sensing layer divided into rectangular blocks, so that current that non-uniformly flows into the electrode can be removed. Accordingly, the sensor in which current of the sensing layer can be uniformly flown, and noise is lowered can be implemented.

Abstract: Provided are a humidity sensor and a method of manufacturing the same. The humidity sensor has high sensitivity, quick response time, improved temperature characteristics, low hysteresis and excellent durability. Moreover, for the humidity sensor, a humidity sensitive layer may be formed of various materials. The humidity sensor may be manufactured in a small size on a large scale.

Abstract: Provided is a programmable logic block of a field-programmable gate array (FPGA). The programmable logic block includes a pull-up access transistor connected to a power source, an up-phase-change memory device connected to the pull-up access transistor, a down-phase-change memory device connected to the up-phase-change memory device, an output terminal between the up-phase-change memory device and the down-phase-change memory device, and a pull-down access transistor connected to the down-phase-change memory device and a ground. The resistance values of the up-phase-change memory device and the down-phase-change memory device are individually programmed.

Abstract: Provided is a non-volatile programmable device including a first terminal, a first threshold switching layer connected to part of the first terminal, a phase change layer connected to the first threshold switching layer, a second threshold switching layer connected to the phase change layer, a second terminal connected to the second threshold switching layer, and third and fourth terminals respectively connected to a side portion of the phase change layer and the other side portion opposite to the side portion of the phase change layer.

Abstract: Provided are a bolometer structure, an infrared detection pixel employing the bolometer structure, and a method of fabricating the infrared detection pixel.

Abstract: Provided is a high-sensitivity MEMS-type z-axis vibration sensor, which may sense z-axis vibration by differentially shifting an electric capacitance between a doped upper silicon layer and an upper electrode from positive to negative or vice versa when center mass of a doped polysilicon layer is moved due to z-axis vibration. Particularly, since a part of the doped upper silicon layer is additionally connected to the center mass of the doped polysilicon layer, and thus an error made by the center mass of the doped polysilicon layer is minimized, it may sensitively respond to weak vibration of low frequency such as seismic waves. Accordingly, since the high-sensitivity MEMS-type z-axis vibration sensor sensitively responds to a small amount of vibration in a low frequency band, it can be applied to a seismograph sensing seismic waves of low frequency which have a very small amount of vibration and a low vibration speed.