Abstract: A liquid crystal display having electrodes on a single substrate. A transparent planar electrode elongated in the transverse direction is formed on the inner surface of a substrate, and an insulating film is deposited thereon. A plurality of linear electrodes, which are elongated in the longitudinal direction and either transparent or opaque, are formed on the insulating film. Potential difference between the planar and the linear electrodes generated by applying voltages to the electrodes yields an electric field. The electric field is symmetrical with respect to the longitudinal central line of the linear electrodes, and has parabolic or semi-elliptical lines of force having a center on a boundary line between the planar and the linear electrodes. The line of force on the planar and the linear electrodes and on the boundary line between the planar and the linear electrodes has the vertical and the horizontal components, and the liquid crystal molecules are re-arranged to have a twist angle and a tilt angle.

Abstract: In a gate driving circuit and a display apparatus having the gate driving circuit, a pull-up transistor of a present stage among plural stages, which are connected one after another to each other and sequentially output a gate signal, pulls up a present gate signal output through an output terminal to a gate-on voltage. A buffer transistor is connected to a control terminal of the pull-up transistor to receive a previous output signal from a previous stage and to turn on the pull-up transistor. The buffer transistor has a chargeability that is about two times or greater than the chargeability of the pull-up transistor. Thus, the size of the pull-up transistor may be reduced, thereby preventing a malfunction of the gate driving circuit when the gate driving circuit is operated under conditions of high temperature or low temperature.

Abstract: The present invention relates to a thin film transistor array panel including: a substrate; gate lines formed on the substrate; and a gate driver formed on the substrate to apply gate signals to the gate lines. The gate driver includes a first wire and a second wire to transmit different signals, and at least one of the first wire and the second wire includes a static electricity preventing structure to prevent static electricity from accumulating between the first wire and the second wire.

Abstract: A first slit pattern is formed in a display substrate and a display panel of vertical alignment mode having the display substrate. The first slit pattern includes slits, a pair of projections and a pair of notches. A divergence point where the slits meet each other and an incision portion of the slits have the same function as the pair of projections in the generation of a singular point of liquid crystal. A contact hole exposing a part of an output electrode of a switching element is formed at a protective layer of an array substrate. A step recess is formed at a protective layer corresponding to a storage electrode, a divergence point of the slits is arranged to correspond to the storage electrode. The singular point of the liquid crystal is induced to occur at a regular position, and thus afterimages and spots can be prevented.

Abstract: A thin film transistor for driving a gate line and a liquid crystal display having the same are provided. The thin film transistor for driving a gate line includes a gate electrode, a semiconductor layer formed on the gate electrode, a drain electrode formed on the semiconductor layer, a source electrode formed on the semiconductor layer and separated from the drain electrode and being coupled to the gate line, and a ripple-prevention electrode formed on the drain electrode which overlaps at least a part of the drain electrode.

Abstract: Provided are a gate driving apparatus and a display device including the same. The gate driving apparatus includes a plurality of stages arranged sequentially, each stage is adapted to output a gate signal and including first output lines and a second output line, wherein the first output lines are electrically connected to a gate line corresponding to each of the stages and are adapted to transmit the gate signal to a plurality of pixels coupled to the gate line, the second output line is adapted to transmit the gate signal to a preceding stage of each of the stages, and the first output lines and the second output line share one contact pad.

Abstract: A first slit pattern is formed in a display substrate and a display panel of vertical alignment mode having the display substrate. The first slit pattern includes slits, a pair of projections and a pair of notches. A divergence point where the slits meet each other and an incision portion of the slits have the same function as the pair of projections in the generation of a singular point of liquid crystal. A contact hole exposing a part of an output electrode of a switching element is formed at a protective layer of an array substrate. A step recess is formed at a protective layer corresponding to a storage electrode, a divergence point of the slits is arranged to correspond to the storage electrode. The singular point of the liquid crystal is induced to occur at a regular position, and thus afterimages and spots can be prevented.

Abstract: A liquid crystal display device includes: a first substrate having a display region; a second substrate facing the first substrate; and a liquid crystal layer disposed between the first substrate and the second substrate, the first substrate comprising: a gate main line which is disposed in the display region; a gate pad which is disposed out of the display region; and a ballasting resistor which electrically connects the gate main line and the gate pad, and comprises a material having a larger resistivity than that of a predominant conductive material defining the gate main line.

Abstract: A display substrate includes a plurality of gate lines extending in a first direction and arranged in a second direction in a display area of the display substrate, an alignment film formed in the display area and in an end area adjacent to end portions of the gate lines in a peripheral area surrounding the display area, and a plurality of circuit stages formed in the end area to connect to the gate lines and a dummy stage connected to a last circuit stage of the circuit stages. Each of the circuit stages includes a gate driving circuit disposed at the higher portion the gate line corresponding to the circuit stages and a gate connecting line formed in the peripheral area between the display area and the gate driving circuit to connect each of the circuit stages with each of the gate lines.

Abstract: A liquid crystal display (LCD) panel includes: a first base substrate; a plurality of gate lines and a plurality of data lines disposed on the first base substrate and crossing each other; a pixel electrode pattern disposed on the first base substrate; a storage pattern disposed on the first base substrate, the storage pattern being positioned between consecutive gate lines and substantially in parallel with the gate lines; a second base substrate; a common electrode disposed on the second base substrate and alternately positioned with the pixel electrode; and a liquid crystal layer disposed between the first and second base substrates.

Abstract: An exemplary embodiment of a display panel according to the present invention includes; a substrate, a display area including a gate line disposed on the substrate, and a gate driver connected to one end of the gate line, the gate driver including a plurality of stages disposed in a first direction, and integrated on the substrate, wherein the gate driver includes; a plurality of clock signal lines extending in the first direction and a voltage signal line extending in the first direction, and the voltage signal line disposed between the plurality of clock signal lines and the plurality of stages.

Abstract: A liquid crystal display having electrodes on a single substrate. A transparent planar electrode elongated in the transverse direction is formed on the inner surface of a substrate, and an insulating film is deposited thereon. A plurality of linear electrodes, which are elongated in the longitudinal direction and either transparent or opaque, are formed on the insulating film. Potential difference between the planar and the linear electrodes generated by applying voltages to the electrodes yields an electric field. The electric field is symmetrical with respect to the longitudinal central line of the linear electrodes, and has parabolic or semi-elliptical lines of force having a center on a boundary line between the planar and the linear electrodes. The line of force on the planar and the linear electrodes and on the boundary line between the planar and the linear electrodes has the vertical and the horizontal components, and the liquid crystal molecules are re-arranged to have a twist angle and a tilt angle.

Abstract: A display panel includes a first substrate, a second substrate, and a liquid crystal layer. The first substrate includes a switching element connected to a gate line and a data line crossing each other, and a pixel electrode electrically connected to the switching element. The pixel electrode includes a first domain-dividing portion extending in a direction. The second substrate is spaced apart from the first substrate to have a cell gap of about 3.1 ?m to about 3.3 ?m. The second substrate includes a common electrode including a second domain dividing portion formed in a region between the first domain-dividing portions adjacent to each other. The liquid crystal layer is interposed between the first and second substrates. The liquid crystal layer includes a liquid crystal composition having a refractive anisotropy (?n) of about 0.1010 to about 0.1030.

Abstract: A method for manufacturing a thin film transistor array panel is disclosed. A gate wiring pattern is formed on an insulating substrate. A gate insulating layer is formed on the gate wiring pattern. A semiconductor pattern is formed on the gate insulating layer. A transparent conductive layer is formed on the gate insulating layer. The transparent conductive layer is patterned to form a pixel electrode. An opening is formed at a circumference of the pixel electrode. The opening minimizes misalignment during the manufacturing process and prevents shorts between a data line and the pixel electrode.

Abstract: A liquid crystal display according to an embodiment of the invention includes a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate to intersect the gate lines, and a plurality of pixel electrodes formed on the substrate. In the liquid crystal display, the pixel electrode includes a first main side substantially parallel with the gate line, a second main side substantially parallel with the data line, a first oblique side making a first oblique angle with respect to the first and second main sides, and a second oblique side making a second oblique angle with respect to the first and second main sides. The first oblique angle and the second oblique angle are different from each other.

Abstract: A display panel includes first and second data lines and a first pixel column containing pixels that are alternately connected to the first and second data lines. In a method of driving the display panel, a second data voltage having a first polarity is outputted to the second data line during an N-th horizontal period. A first data voltage having a second polarity phase-inverted with respect to the first polarity and a first compensating voltage having the second polarity are respectively outputted to the first data line during first and second intervals of the N-th horizontal period. The first data voltage having the second polarity is outputted to the first data line during an (N+1)-th horizontal period. The second data voltage having the first polarity and a second compensating voltage having the first polarity are respectively outputted to the second data line during first and second intervals of the (N+1)-th horizontal period.

Abstract: Disclosed is a TFT substrate for a display apparatus comprising a gate wiring including a gate electrode, a data wiring including a data line, a source electrode connected to the data line, and a drain electrode connected to a pixel electrode, and a semiconductor layer disposed between the gate wiring and the data wiring, wherein the semiconductor layer under the drain electrode is disposed within an area overlapping the gate electrode and the semiconductor layer under the source electrode extends outward to an area not overlapping the gate electrode. Advantageously, the present disclosure provides a TFT substrate for a display apparatus having a high aperture ratio and causing less afterimaging, and a manufacturing method of the same.

Abstract: A liquid crystal display having electrodes on a single substrate. A transparent planar electrode elongated in the transverse direction is formed on the inner surface of a substrate, and an insulating film is deposited thereon. A plurality of linear electrodes, which are elongated in the longitudinal direction and either transparent or opaque, are formed on the insulating film. Potential difference between the planar and the linear electrodes generated by applying voltages to the electrodes yields an electric field. The electric field is symmetrical with respect to the longitudinal central line of the linear electrodes, and has parabolic or semi-elliptical lines of force having a center on a boundary line between the planar and the linear electrodes. The line of force on the planar and the linear electrodes and on the boundary line between the planar and the linear electrodes has the vertical and the horizontal components, and the liquid crystal molecules are re-arranged to have a twist angle and a tilt angle.

Abstract: A method for manufacturing a thin film transistor array panel is disclosed. A gate wiring pattern is formed on an insulating substrate. A gate insulating layer is formed on the gate wiring pattern. A semiconductor pattern is formed on the gate insulating layer. A transparent conductive layer is formed on the gate insulating layer. The transparent conductive layer is patterned to form a pixel electrode. An opening is formed at a circumference of the pixel electrode. The opening minimizes misalignment during the manufacturing process and prevents shorts between a data line and the pixel electrode.

Abstract: A photomask includes; a source electrode pattern including; a first electrode portion which extends in a first direction, a second electrode portion which extends in the first direction and is substantially parallel to the first electrode portion, and a third electrode portion which extends from a first end of the first electrode portion to a first end of the second electrode portion and is rounded with a first curvature, a drain electrode pattern which extends in the first direction and is disposed between the first electrode portion and the second electrode portion, wherein an end of the drain electrode pattern is rounded to correspond to the third electrode portion; and a channel region pattern which is disposed between the source electrode pattern and the drain electrode pattern, wherein a center location of the first curvature and a center location of the rounded portion of the end of the drain electrode pattern are the same.