Patents by Inventor Byung Hak Lee

Byung Hak Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6531820
    Abstract: A plasma display device includes a first substrate, an address electrode formed on an upper surface of the fist substrate, a first dielectric layer formed on the upper surface of the first substrate and embedding the address electrode, a second substrate which is transparent and forms a discharge space by being coupled to the first substrate, a plurality of maintaining electrodes formed on a lower surface of the second substrate to form a predetermined angle with the address electrode, each of the maintaining electrodes including first and second electrodes, a second dielectric layer formed on the second substrate where the maintaining electrodes are formed and embedding the maintaining electrodes, at least a portion where an electrical field is concentrated formed between the first and second electrodes constituting the maintaining electrodes, and a partition installed between the first and second substrates for sectioning the discharge space.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: March 11, 2003
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Byung-hak Lee, Eun-gi Heo, Min-sun Yoo, Yoshinori Anzai
  • Patent number: 6531394
    Abstract: A method for forming a gate electrode of a semiconductor device, which improves thermal stability of a tungsten/polysilicon structure. The method for forming a gate electrode of a semiconductor device includes: sequentially forming a first insulating film, a polysilicon layer and a tungsten layer on a semiconductor substrate; adding oxygen to the tungsten layer; forming a second insulating film on the tungsten layer to which oxygen is added; and selectively removing the second insulating film, the tungsten layer, the polysilicon layer and the first insulating film to form a gate electrode.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: March 11, 2003
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Byung Hak Lee
  • Patent number: 6432801
    Abstract: The present invention relates to a method for forming a gate electrode in a semiconductor device, which can improve GOI characteristics and allows for an effective suppression of metal silicide spike formation. This method includes the steps of forming a gate insulating film over a semiconductor substrate, forming a first semiconductor layer over the gate insulating film, forming a barrier layer over the first semiconductor layer to prevent formation of metal silicide spikes in the first semiconductor layer, forming a second semiconductor layer over the barrier layer, and forming a metal silicide layer over the second semiconductor layer.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: August 13, 2002
    Assignee: Hyundai Electronics Industries, Co., Ltd.
    Inventor: Byung Hak Lee
  • Patent number: 6335297
    Abstract: Method for forming a conductive line of a semiconductor device which has a high thermal stability and low electrical resistance includes the steps of forming an insulating layer on a semiconductor substrate, sequentially forming a semiconductor layer and a tungsten film on the insulating layer, nitrifying the tungsten film with heat treatment, and selectively etching the tungsten film and the semiconductor layer.
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: January 1, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Chang Hee Han, Byung Hak Lee
  • Patent number: 6306743
    Abstract: A method for forming a gate electrode on a semiconductor substrate that includes forming a gate insulating layer on a semiconductor substrate, forming a polysilicon layer on the semiconductor substrate, forming a tungsten silicide layer on the polysilicon layer, forming a diffusion barrier layer on the tungsten silicide layer, forming a tungsten layer on the diffusion barrier layer, crystallizing the diffusion barrier layer, forming a first insulating layer on the tungsten layer, forming a gate electrode, forming an oxide layer, and forming a second insulating layer.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: October 23, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Byung Hak Lee
  • Publication number: 20010018259
    Abstract: A method for fabricating a conductive line pattern for a semiconductor device including the steps of: forming a gate insulation film on the upper surface of a semiconductor substrate; forming a polysilicon layer on the upper surface of the gate insulation film; forming a WNx film on the upper surface of the polysilicon layer; forming a first insulation film on the upper surface of the WNx film; patterning the first insulation film, the WNx film and the polysilicon layer, to form a conductive line pattern; and selectively oxidizing the polysilicon layer. With the method, in view of forming the conductive line pattern in the WNx/poly-Si structure, the thermal treatment processes are reduced in number, so that the thermal stress applied to the conductive line pattern is diminished, and thus, a reliability of the semiconductor device is improved.
    Type: Application
    Filed: February 27, 2001
    Publication date: August 30, 2001
    Applicant: Hyundai Electronics Industries Co., Ltd.
    Inventor: Byung Hak Lee
  • Patent number: 6270388
    Abstract: A method for fabricating a partition of a plasma display panel includes the steps of spraying and coating a powdered partition material onto a substrate on which address electrodes and a dielectric layer are formed, melting the partition material by a laser beam, and solidifying the melted partition material to complete the partition.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: August 7, 2001
    Assignee: Samsung Display Devices Co., Ltd.
    Inventor: Byung-hak Lee
  • Patent number: 6221762
    Abstract: A method for fabricating a semiconductor device improves step coverage and resistivity. The method includes the steps of forming a doped silicon layer on a substrate, forming a silicide layer containing more metal atoms than silicon atoms on the doped silicon layer, and heat treating in nitrogen to form a second silicide layer having a tetragonal phase crystal structure and a silicon nitride film on the top surface of the second silicide layer.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: April 24, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Jeong Soo Byun, Byung Hak Lee
  • Patent number: 6103609
    Abstract: Method for fabricating a semiconductor device, is disclosed, in which a grain size is made coarse for forming a thin film with a low resistance, including the steps of (1) depositing an insulating film on a substrate, (2) depositing a silicon layer on the insulating film, (3) depositing an amorphous metal nitride film on the silicon layer, and (4) heat treating the amorphous metal nitride film to alter into a crystalline pure metal film.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: August 15, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventors: Kee Sun Lee, Byung Hak Lee
  • Patent number: 6096630
    Abstract: Method for fabricating a semiconductor device, is disclosed, which is suitable for improving a resistivity, including the steps of forming a silicon layer on a substrate, forming a crystalline metal silicide layer on the silicon layer, forming an amorphous metal silicide layer by injecting ions into the crystalline metal silicide layer, and crystallizing the amorphous metal silicide by heat treating the amorphous metal silicide.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: August 1, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventors: Jeong Soo Byun, Byung Hak Lee
  • Patent number: 6039619
    Abstract: A method for manufacturing a partition wall of a plasma display device includes (a) providing a substrate and a block in which partition wall forming grooves having the same pattern as that of partition walls are formed; (b) positioning the substrate on the block; (c) pressing the substrate against the block such that part of the substrate is inserted into the partition wall forming grooves to form the partition walls; and (d) separating the substrate from the block.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: March 21, 2000
    Assignee: Samsung Display Devices Co., Ltd.
    Inventors: Young-Cheol Kang, Byung-Hak Lee, Man-Ho Song
  • Patent number: 5744398
    Abstract: A method of forming an electrode of a semiconductor device includes the steps of forming an insulating layer on a semiconductor substrate, forming a tungsten silicide layer on the insulating layer, implanting impurity ions into the tungsten silicide layer to form an impurity region in a lower portion of the tungsten silicide layer, and carrying out a heat treatment to the substrate on which the tungsten silicide layer is formed.
    Type: Grant
    Filed: January 23, 1997
    Date of Patent: April 28, 1998
    Assignee: IG Semicon Co., Ltd.
    Inventors: Jeong Soo Byun, Byung Hak Lee