Patents by Inventor Byung Moon
Byung Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11112352Abstract: Provided are an optical sensor device using surface acoustic waves and an optical sensor device package. The optical sensor device includes: a substrate including a first light sensing area and a temperature sensing area and including a piezo electric material; a first input electrode and a first output electrode which are disposed in the first light sensing area and are apart from each other with a first delay gap therebetween; a first sensing film overlapping the first delay gap and configured to cover at least some portions of the first input electrode and the first output electrode; and a second input electrode and a second output electrode which are disposed in the temperature sensing area and are apart from each other with a second delay gap therebetween. The second delay gap is exposed to air.Type: GrantFiled: November 7, 2018Date of Patent: September 7, 2021Assignee: HAESUNG DS CO., LTD.Inventors: Jin Woo Lee, Byung Moon Lee, Jin Kee Hong, Jong Woo Kim
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Patent number: 11107773Abstract: A semiconductor device includes a semiconductor substrate having a scribe lane defined therein. A plurality of semiconductor chips is formed on an upper surface of the semiconductor substrate. At least one conductive structure is arranged on an upper surface of the semiconductor substrate, within the scribe lane thereof. A fillet is arranged on at least one side surface of the conductive structure. The fillet is configured to induce a cut line which spreads along the scribe lane, through a central portion of the conductive structure.Type: GrantFiled: June 13, 2019Date of Patent: August 31, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyun-Su Sim, Yoon-Sung Kim, Yun-Hee Kim, Byung-Moon Bae, Jun-Ho Yoon
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Publication number: 20210057278Abstract: Methods of manufacturing a semiconductor chip are provided. The methods may include providing a semiconductor substrate including integrated circuit regions and a cut region. The cut region may be between the integrated circuit regions. The methods may also include forming a modified layer by emitting a laser beam into the semiconductor substrate along the cut region, polishing an inactive surface of the semiconductor substrate to propagate a crack from the modified layer, and separating the integrated circuit regions along the crack. The cut region may include a plurality of multilayer metal patterns on an active surface of the semiconductor substrate, which is opposite to the inactive surface of the semiconductor substrate. The plurality of multilayer metal patterns may form a pyramid structure when viewed in cross section.Type: ApplicationFiled: November 10, 2020Publication date: February 25, 2021Inventors: Byung-moon Bae, Yoon-sung Kim, Yun-hee Kim, Hyun-su Sim, Jun-ho Yoon, Jung-ho Choi
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Patent number: 10886234Abstract: A semiconductor device is provided. The semiconductor device includes: a substrate which includes a semiconductor chip region and a scribe line region surrounding the semiconductor chip region; an insulating film arranged over the semiconductor chip region and the scribe line region on the substrate, and including a first surface, a second surface opposite to the first surface, a third surface connecting the first surface and the second surface, and a fourth surface opposite to the third surface and connecting the first surface and the second surface; and an opening portion formed on the second surface of the insulating film and the fourth surface of the insulating film to expose the substrate, wherein the opening portion is formed in the scribe line region, and the first surface of the insulating film and the third surface of the insulating film do not include an opening portion which expose the substrate.Type: GrantFiled: August 7, 2019Date of Patent: January 5, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun Ho Yoon, Yoon Sung Kim, Yun Hee Kim, Byung Moon Bae, Hyun Su Sim, Jung Ho Choi
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Patent number: 10854517Abstract: Methods of manufacturing a semiconductor chip are provided. The methods may include providing a semiconductor substrate including integrated circuit regions and a cut region. The cut region may be between the integrated circuit regions. The methods may also include forming a modified layer by emitting a laser beam into the semiconductor substrate along the cut region, polishing an inactive surface of the semiconductor substrate to propagate a crack from the modified layer, and separating the integrated circuit regions along the crack. The cut region may include a plurality of multilayer metal patterns on an active surface of the semiconductor substrate, which is opposite to the inactive surface of the semiconductor substrate. The plurality of multilayer metal patterns may form a pyramid structure when viewed in cross section.Type: GrantFiled: March 20, 2019Date of Patent: December 1, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-moon Bae, Yoon-sung Kim, Yun-hee Kim, Hyun-su Sim, Jun-ho Yoon, Jung-ho Choi
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Patent number: 10749066Abstract: A proximity sensor includes a circuit board; a light-emitting element and a light-receiving element on the circuit board; a light barrier; molding portions; and a transparent board disposed on the molding portions and configured to form an air gap with the light-receiving element. The light-receiving element includes: a substrate having a light sensing area and a temperature sensing area; a first input electrode and a first output electrode which are aligned in the light sensing area and apart from each other with a first delay gap therebetween; a sensing film covering at least some portions of the first input electrode and the first output electrode; and a second input electrode and a second output electrode which are aligned in the temperature sensing area and apart from each other with a second delay gap therebetween. The second delay gap is exposed to air.Type: GrantFiled: November 7, 2018Date of Patent: August 18, 2020Assignee: HAESUNG DS CO., LTD.Inventors: Jin Woo Lee, Jin Kee Hong, Byung Moon Lee, Jong Woo Kim
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Publication number: 20200173723Abstract: A cold crucible structure according to an embodiment of the present invention includes a cold crucible structure according to an embodiment of the present invention includes: a cold crucible unit including hollow top and bottom caps, a plurality of segments connecting the top cap and the bottom cap, slits disposed between the segments, and a reaction area surrounded by the segments; and an induction coil unit disposed to cover the outer side of the cold crucible unit and disposed across the longitudinal directions of the segments and the slits, in which the diameter of the reaction area is defined as a crucible diameter, the crucible diameter is 100 to 300 mm, and gaps of the slits are defined by d slit ? 0.3 × ? 50 (mm)(where dslit is the gap between the slits and Ø is the crucible diameter).Type: ApplicationFiled: November 29, 2018Publication date: June 4, 2020Applicant: KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGYInventors: Byung Moon MOON, Hyun Jae Lee, Hyun Do Jung
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Publication number: 20200168556Abstract: A semiconductor device includes a semiconductor substrate having a scribe lane defined therein. A plurality of semiconductor chips is formed on an upper surface of the semiconductor substrate. At least one conductive structure is arranged on an upper surface of the semiconductor substrate, within the scribe lane thereof. A fillet is arranged on at least one side surface of the conductive structure. The fillet is configured to induce a cut line which spreads along the scribe lane, through a central portion of the conductive structure.Type: ApplicationFiled: June 13, 2019Publication date: May 28, 2020Inventors: HYUN-SU SIM, YOON-SUNG KIM, YUN-HEE KIM, BYUNG-MOON BAE, JUN-HO YOON
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Patent number: 10651105Abstract: Provided is a semiconductor chip capable of withstanding damage such as cracks created in the fabrication process. A semiconductor chip according to the inventive concept includes: a semiconductor substrate including a residual scribe lane surrounding a die region and a periphery of a die of the die region, a passivation layer covering a portion above the semiconductor substrate, a cover protection layer covering a portion of the passivation layer and the die region, and a cover protection layer formed integrally with a buffering protection layer covering a portion of the residual scribe lane, wherein the buffering protection layer includes a corner protection layer in contact with a portion of an edge adjacent to a corner of the semiconductor substrate, and an extending protection layer extending along the residual scribe lane from the corner protection layer and in contact with the cover protection layer.Type: GrantFiled: January 21, 2019Date of Patent: May 12, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yun-Hee Kim, Yoon-Sung Kim, Byung-Moon Bae, Hyun-Su Sim
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Publication number: 20200126932Abstract: A semiconductor chip includes a substrate including: a main chip region; and a scribe lane surrounding the main chip region; a lower interlayer insulating layer disposed on the substrate in the scribe lane; a circuit structure disposed on the lower interlayer insulating layer in the scribe lane; and a pad structure disposed on the lower interlayer insulating layer. The circuit structure and the pad structure are disposed to be spaced apart from each other in a longitudinal direction of the scribe lane.Type: ApplicationFiled: April 19, 2019Publication date: April 23, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Yoon Sung KIM, Yun Hee Kim, Byung Moon Bae, Hyun Su Sim, Jun Ho Yoon, Jung Ho Choi
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Publication number: 20200126927Abstract: A semiconductor chip including an alignment patter is provided. The semiconductor ship includes a substrate associated with a main chip region of a semiconductor wafer and including a scribe lane. A lower interlayer insulating layer is disposed on the substrate, a low-K layer including dummy metal patterns is disposed on the lower interlayer insulating layer, an alignment pattern is disposed on the low-K layer, and a passivation layer covers the alignment pattern.Type: ApplicationFiled: June 4, 2019Publication date: April 23, 2020Inventors: YOON SUNG KIM, YUN HEE KIM, BYUNG MOON BAE, HYUN SU SIM, JUN HO YOON, JUNG HO CHOI
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Publication number: 20200066650Abstract: A semiconductor device is provided. The semiconductor device includes: a substrate which includes a semiconductor chip region and a scribe line region surrounding the semiconductor chip region; an insulating film arranged over the semiconductor chip region and the scribe line region on the substrate, and including a first surface, a second surface opposite to the first surface, a third surface connecting the first surface and the second surface, and a fourth surface opposite to the third surface and connecting the first surface and the second surface; and an opening portion formed on the second surface of the insulating film and the fourth surface of the insulating film to expose the substrate, wherein the opening portion is formed in the scribe line region, and the first surface of the insulating film and the third surface of the insulating film do not include an opening portion which expose the substrate.Type: ApplicationFiled: August 7, 2019Publication date: February 27, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun Ho YOON, Yoon Sung KIM, Yun Hee KIM, Byung Moon BAE, Hyun Su SIM, Jung Ho CHOI
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Publication number: 20200058551Abstract: Methods of manufacturing a semiconductor chip are provided. The methods may include providing a semiconductor substrate including integrated circuit regions and a cut region. The cut region may be between the integrated circuit regions. The methods may also include forming a modified layer by emitting a laser beam into the semiconductor substrate along the cut region, polishing an inactive surface of the semiconductor substrate to propagate a crack from the modified layer, and separating the integrated circuit regions along the crack. The cut region may include a plurality of multilayer metal patterns on an active surface of the semiconductor substrate, which is opposite to the inactive surface of the semiconductor substrate. The plurality of multilayer metal patterns may form a pyramid structure when viewed in cross section.Type: ApplicationFiled: March 20, 2019Publication date: February 20, 2020Inventors: Byung-moon Bae, Yoon-sung Kim, Yun-hee Kim, Hyun-su Sim, Jun-ho Yoon, Jung-ho Choi
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Patent number: 10550442Abstract: Provided is a composition for the treatment of pregnancy-associated diseases, and more particularly, to a pharmaceutical composition for the prevention or treatment of premature delivery or breast cancer. The pharmaceutical composition including extracellular vesicles derived from bacteria belonging to the genus Bacillus as an active ingredient may induce pregnancy or prevent premature delivery of pregnant women, may be used to prevent or treat pregnancy-associated diseases such as breast cancer, and may be used to diagnose a risk of premature delivery by measuring the amount of extracellular vesicles derived from bacteria belonging to the genus Bacillus in pregnant women.Type: GrantFiled: February 19, 2016Date of Patent: February 4, 2020Assignee: MD HEALTHCARE INC.Inventors: Yoon-Keun Kim, Young-Ju Kim, Young Koo Jee, Mina Rho, Byung-In Moon, Minhye Kim
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Publication number: 20200028021Abstract: A proximity sensor includes a circuit board; a light-emitting element and a light-receiving element on the circuit board; a light barrier; molding portions; and a transparent board disposed on the molding portions and configured to form an air gap with the light-receiving element. The light-receiving element includes: a substrate having a light sensing area and a temperature sensing area; a first input electrode and a first output electrode which are aligned in the light sensing area and apart from each other with a first delay gap therebetween; a sensing film covering at least some portions of the first input electrode and the first output electrode; and a second input electrode and a second output electrode which are aligned in the temperature sensing area and apart from each other with a second delay gap therebetween. The second delay gap is exposed to air.Type: ApplicationFiled: November 7, 2018Publication date: January 23, 2020Inventors: Jin Woo LEE, Jin Kee HONG, Byung Moon LEE, Jong Woo KIM
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Publication number: 20200020604Abstract: Provided is a semiconductor chip capable of withstanding damage such as cracks created in the fabrication process. A semiconductor chip according to the inventive concept includes: a semiconductor substrate including a residual scribe lane surrounding a die region and a periphery of a die of the die region, a passivation layer covering a portion above the semiconductor substrate, a cover protection layer covering a portion of the passivation layer and the die region, and a cover protection layer formed integrally with a buffering protection layer covering a portion of the residual scribe lane, wherein the buffering protection layer includes a corner protection layer in contact with a portion of an edge adjacent to a corner of the semiconductor substrate, and an extending protection layer extending along the residual scribe lane from the corner protection layer and in contact with the cover protection layer.Type: ApplicationFiled: January 21, 2019Publication date: January 16, 2020Inventors: Yun-Hee Kim, Yoon-Sung Kim, Byung-Moon Bae, Hyun-Su Sim
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Publication number: 20190310183Abstract: Provided are an optical sensor device using surface acoustic waves and an optical sensor device package. The optical sensor device includes: a substrate including a first light sensing area and a temperature sensing area and including a piezo electric material; a first input electrode and a first output electrode which are disposed in the first light sensing area and are apart from each other with a first delay gap therebetween; a first sensing film overlapping the first delay gap and configured to cover at least some portions of the first input electrode and the first output electrode; and a second input electrode and a second output electrode which are disposed in the temperature sensing area and are apart from each other with a second delay gap therebetween. The second delay gap is exposed to air.Type: ApplicationFiled: November 7, 2018Publication date: October 10, 2019Inventors: Jin Woo LEE, Byung Moon LEE, Jin Kee HONG, Jong Woo KIM
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Patent number: 10440330Abstract: Provided is a surveillance camera. The surveillance camera includes a main body casing; a front cover that forms a camera housing by being combined with the main body casing; a first protrusion unit that protrudes frontward of the front cover from a front surface of the front cover; a second protrusion unit that is formed on an outer edge of the first protrusion unit by being separated from the first protrusion unit; and a lens mounting unit that combines with the front cover, wherein the lens mounting unit comprises a first guide unit that protrudes toward the front cover and contacts the first protrusion unit and a second guide unit that contacts the second protrusion unit. Accordingly, tilting of the lens mounting unit is effectively prevented.Type: GrantFiled: February 14, 2013Date of Patent: October 8, 2019Assignee: HANWHA TECHWIN CO., LTD.Inventors: Hyun-Soo Shin, Byung-Moon Jun
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Publication number: 20180256310Abstract: Provided is an artificial blood vessel including a cylindrical inner tube having a hollow part formed therein; an outer tube provided at an outer circumferential surface of the inner tube and surrounding the inner tube so as to form a double tube structure with the inner tube; and a connecting line formed in circumferential directions of the inner tube and the outer tube to connect the inner tube and the outer tube.Type: ApplicationFiled: March 10, 2017Publication date: September 13, 2018Inventor: Byung Moon
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Publication number: 20180057896Abstract: The present invention relates to a composition for the treatment of pregnancy-associated diseases, and more particularly, to a pharmaceutical composition for the prevention or treatment of premature delivery or breast cancer, including extracellular vesicles derived from bacteria belonging to the genus Bacillus as an active ingredient, and a method of diagnosing premature delivery. The pharmaceutical composition including extracellular vesicles derived from bacteria belonging to the genus Bacillus as an active ingredient may induce pregnancy or prevent premature delivery of pregnant women, may be used to prevent or treat pregnancy-associated diseases such as breast cancer, and may be usefully used to diagnose a risk of premature delivery by measuring the amount of extracellular vesicles derived from bacteria belonging to the genus Bacillus in pregnant women.Type: ApplicationFiled: February 19, 2016Publication date: March 1, 2018Applicant: MD HEALTHCARE INC.Inventors: Yoon-Keun KIM, Young-Ju KIM, Young Koo JEE, Mina RHO, Byung-In MOON, Minhye KIM