Patents by Inventor Byung Moon

Byung Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140037856
    Abstract: Disclosed is a method for producing a zinc-aluminum-based alloy-coated steel sheet with superior workability and corrosion resistance by coating a base zinc-aluminum-based alloy-coated steel sheet in a coating bath comprising 35 to 55% by weight of zinc, 0.5 to 3% by weight of silicon, 0.005 to 1.0% by weight of chromium, 0.01 to 3.0% by weight of magnesium, 0.001 to 0.1% by weight of titanium, and the balance of aluminum and inevitable impurities. With the method, it is possible to produce a zinc-aluminum-based alloy-coated steel sheet which exhibits superior workability through control of an intermetallic compound layer (Zn—Al—Si—Cr) and formation of AlCr2 due to Cr component present in the coating layer, reduces detachment of the coating layer and cracks of coating occurring during molding, exhibits superior corrosion resistance even after processing and has considerably superior corrosion resistance due to Mg2Si alloy phase and inhibition of oxide film formation.
    Type: Application
    Filed: July 25, 2013
    Publication date: February 6, 2014
    Applicant: UNION STEEL CO., LTD.
    Inventors: Byung-Sun MOON, Byung-Moon LIM, Young-Keun SONG, Su-Hwan JUNG, Cheol-Ho KWON
  • Publication number: 20130314111
    Abstract: An apparatus for testing a thyristor valve includes: a current source circuit that provides an electric current when a thyristor valve as a test target is turned on; a voltage source circuit that provides a reverse voltage or a forward voltage when the thyristor valve is turned off; and a first auxiliary valve provided between a connection point between the thyristor valve and the voltage source circuit and the current source circuit, and that insulates the current source circuit from the voltage source circuit to protect the current source circuit from a high voltage of the voltage source circuit.
    Type: Application
    Filed: May 8, 2013
    Publication date: November 28, 2013
    Applicants: Myongji University Industry and Academia Cooperation Foundation, Lsis Co., Ltd.
    Inventors: Seung Taek BAEK, Byung Moon HAN, Eui Cheol NHO, Yong Ho CHUNG, Wook Hwa LEE
  • Publication number: 20130243995
    Abstract: Disclosed herein is a carrier for manufacturing a substrate, including: a base plate; adhesive layers formed on one side or both sides of the base plate; auxiliary adhesive layers, each of which is buried in one side of each of the adhesive layers, has a smaller area than each of the adhesive layers and has lower adhesivity than each of the adhesive layers; and metal layers, each of which is formed on one side of each of the auxiliary adhesive layers, whose edges are attached to the adhesive layers, and whose other portions excluding the edges are attached to the auxiliary adhesive layers. The carrier is advantageous in that a metal layer and an auxiliary adhesive layer are attached to each other by the adhesivity of the auxiliary adhesive layer, so that it is not required to use vacuum adsorption, with the result that a process of manufacturing a substrate can be performed more stably.
    Type: Application
    Filed: May 6, 2013
    Publication date: September 19, 2013
    Inventors: Jin Ho KIM, Jin Yong AHN, Ki Hwan KIM, Byung Moon KIM, Seok Kyu LEE
  • Patent number: 8435376
    Abstract: Disclosed herein is a carrier for manufacturing a substrate, including: a base plate; adhesive layers formed on one side or both sides of the base plate; auxiliary adhesive layers, each of which is buried in one side of each of the adhesive layers, has a smaller area than each of the adhesive layers and has lower adhesivity than each of the adhesive layers; and metal layers, each of which is formed on one side of each of the auxiliary adhesive layers, whose edges are attached to the adhesive layers, and whose other portions excluding the edges are attached to the auxiliary adhesive layers. The carrier is advantageous in that a metal layer and an auxiliary adhesive layer are attached to each other by the adhesivity of the auxiliary adhesive layer, so that it is not required to use vacuum adsorption, with the result that a process of manufacturing a substrate can be performed more stably.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: May 7, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin Ho Kim, Jin Yong Ahn, Ki Hwan Kim, Byung Moon Kim, Seok Kyu Lee
  • Publication number: 20120324723
    Abstract: The present invention has been made in an effort to provide a method of manufacturing a coreless substrate that forms an opening by patterning a dry film for forming the opening onto one surface of a carrier, separating the carrier from the substrate, and removing only the dry film for forming the opening. In the present invention, since the pad can be exposed by removing only the dry film for forming the opening, a process time for forming the opening can be reduced and since a process is simple, a cost is saved.
    Type: Application
    Filed: April 17, 2012
    Publication date: December 27, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Myeong Ho Hong, Byung Moon Kim, Hyun Hee Ku, Soon Oh Jung, Jae Joon Lee
  • Publication number: 20120030940
    Abstract: A method of manufacturing an optical component embedded printed circuit board, the method including: stacking a first insulation layer on one side of a metal core; embedding an optical component in a cavity formed in the metal core; stacking a second insulation layer of a transparent material on the other side of the metal core; and forming a circuit pattern on the first insulation layer, the circuit pattern electrically connected with the optical component.
    Type: Application
    Filed: October 5, 2011
    Publication date: February 9, 2012
    Applicants: SAMSUNG LED CO.,LTD., SAMSUNG ELECTRO-MECHANICS CO.,LTD.
    Inventors: Suk-Hyeon Cho, Je-Gwang Yoo, Byung-Moon Kim, Han-Seo Cho
  • Publication number: 20120015886
    Abstract: The present invention relates to a method for producing a recombinant, spider toxin peptide and analgesic compositions containing said peptide. More specifically, the present invention relates to a method in which the gene for GsMTx4 is subcloned into a vector, so that it is linked to a secretion signal sequence of the alpha factor and under the control of methanol-inducible alcohol oxidase (AOX) promoter to construct a recombinant yeast expression plasmid. Yeast cells are transformed with this plasmid to produce the GsMTx4 peptide and analgesic compositions containing said peptide. The recombinant yeast expression system of the present invention affords a more stable method for producing GsMTx4 than its natural route. Thus the GsMTx4 peptide and its derivatives produced by the method of this invention can be used in the cure of related diseases such as heart failure as the peptide specifically inhibits mechanosensitive ion channels.
    Type: Application
    Filed: October 19, 2010
    Publication date: January 19, 2012
    Applicant: SEOUL NATIONAL UNIVERSITY INDUSTRY FOUNDATION
    Inventors: UhTaek OH, Byung Moon Kim, Seung Pyo Park, Heung Sik Na
  • Patent number: 8064217
    Abstract: A method of manufacturing an optical component embedded printed circuit board is disclosed. An optical component embedded printed circuit board that includes a metal core in which at least one cavity is formed, an optical component embedded in the cavity, a first insulation layer stacked on one side of the metal core, a second insulation layer stacked on the other side of the metal core, and a circuit pattern which is formed on the first insulation layer and which is electrically connected with the optical component.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: November 22, 2011
    Assignees: Samsung Electro-Mechanics Co., Ltd., Samsung LED Co., Ltd.
    Inventors: Suk-Hyeon Cho, Je-Gwang Yoo, Byung-Moon Kim, Han-Seo Cho
  • Publication number: 20110159282
    Abstract: Disclosed herein is a carrier for manufacturing a substrate, including: a base plate; adhesive layers formed on one side or both sides of the base plate; auxiliary adhesive layers, each of which is buried in one side of each of the adhesive layers, has a smaller area than each of the adhesive layers and has lower adhesivity than each of the adhesive layers; and metal layers, each of which is formed on one side of each of the auxiliary adhesive layers, whose edges are attached to the adhesive layers, and whose other portions excluding the edges are attached to the auxiliary adhesive layers. The carrier is advantageous in that a metal layer and an auxiliary adhesive layer are attached to each other by the adhesivity of the auxiliary adhesive layer, so that it is not required to use vacuum adsorption, with the result that a process of manufacturing a substrate can be performed more stably.
    Type: Application
    Filed: May 25, 2010
    Publication date: June 30, 2011
    Inventors: Jin Ho KIM, Jin Yong Ahn, Ki Hwan Kim, Byung Moon Kim, Seok Kyu Lee
  • Publication number: 20110142724
    Abstract: Disclosed is a system for refining UMG Si including a vacuum chamber, a cold crucible disposed within the vacuum chamber, a device disposed within the vacuum chamber to supply Si to the cold crucible, a steam plasma torch disposed above the cold crucible to apply steam plasma formed by introducing a reactive gas into plasma flame by an inert gas to the Si supplied to the cold crucible, and an impurity collector disposed above the cold crucible within the vacuum chamber to collect impurity gas generated in the cold crucible and discharge the collected impurity gas to the outside of the vacuum chamber.
    Type: Application
    Filed: November 3, 2010
    Publication date: June 16, 2011
    Inventors: Byung Moon Moon, Je Sik Shin, Tae U. Yu, Hyun Jin Koo, Dong Ho Park, Ho Moon Lee
  • Patent number: 7961971
    Abstract: A method and apparatus for performing parallel box filtering in region based image processing is provided. The method of performing parallel box filtering in region based image processing includes selecting parallel pixel blocks having a size of M×N to be operated in parallel, selecting pixels included in a mask region having a size of K×L that is a parallel pixel operation region and a first region having a size of (M+K?1)×(N+L?1) that corresponds to overlapping masks of M*N, selecting pixels of a second region commonly included in the mask regions of M*N and storing the results of operation with respect to the pixels of the second region as repeated operation values, and operating block operation values with respect to the parallel pixel blocks using the repeated operation values.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: June 14, 2011
    Assignee: Daegu Gyeongbuk Institute of Science and Technology
    Inventors: Soon Kwon, Jong Hun Lee, Kyeong Ryeol Bae, Byung In Moon
  • Publication number: 20110116727
    Abstract: A method and apparatus for performing parallel box filtering in region based image processing is provided. The method of performing parallel box filtering in region based image processing includes selecting parallel pixel blocks having a size of M×N to be operated in parallel, selecting pixels included in a mask region having a size of K×L that is a parallel pixel operation region and a first region having a size of (M+K?1)×(N+L?1) that corresponds to overlapping masks of M*N, selecting pixels of a second region commonly included in the mask regions of M*N and storing the results of operation with respect to the pixels of the second region as repeated operation values, and operating block operation values with respect to the parallel pixel blocks using the repeated operation values.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 19, 2011
    Applicant: Daegu Gyeongbuk Institute of Science and Technolog y
    Inventors: Soon Kwon, Jong Hun Lee, Kyeong Ryeol Bae, Byung In Moon
  • Publication number: 20110079349
    Abstract: The present invention provides a method of manufacturing a printed circuit board including the steps of: preparing a pair of raw materials, each formed by sequentially stacking a release film and a first insulating layer, and an adhesive layer, respectively; embedding the pair of raw materials, which are opposed to each other, in the adhesive layer while disposing the release films toward an inner layer; forming a second insulating layer, which has a via formed therethrough and a circuit pattern formed on an upper surface to be connected to the via, on the first insulating layer; cutting edge portions of the second and first insulating layers, the release film, and the adhesive layer; and removing the release film from the first insulating layer.
    Type: Application
    Filed: December 17, 2009
    Publication date: April 7, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Hyeon Cho, Chang Sup Ryu, Jin Yong An, Soon Oh Jung, Sung Won Jeong, Byung Moon Kim, Dong Ju Jeon, Seok Kyu Lee, Jin Ho Kim
  • Publication number: 20110048786
    Abstract: Disclosed herein is a printed circuit board having a bump and a method of manufacturing the same. The printed circuit board having a bump includes an insulating layer into which an inner circuit layer is impregnated; a protective layer that is formed under the insulating layer and has an opening exposing a pad unit of the inner circuit layer; and a bump that is integrally formed with the pad unit and is protruded from the inner side of the protective layer to the outside of the protective layer through the opening. The bump is integrally formed with the pad unit, thereby improving bonding strength between the bump and the printed circuit board, and the surface area of the bump is formed to be wide, thereby improving bonding strength between a solder ball and the printed circuit board.
    Type: Application
    Filed: August 27, 2010
    Publication date: March 3, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Hyeon Cho, Jin Yong Ahn, Soon Oh Jung, Dong Ju Jeon, Ki Hwan Kim, Byung Moon Kim
  • Publication number: 20100072327
    Abstract: A model railroad track system including first, second and third portions of model railroad track, and a movable portion of track that is movable between a first and a second position. When the movable portion is in the first position the movable portion is configured to guide a model train from the first portion of track to the second portion of track when the train moves across the movable portion in a direction of travel. When the movable portion is in the second position the movable portion is configured to guide a train from the first portion of track to the third portion of track when the train moves across the movable portion generally in the direction of travel. The system further includes an actuator movable between first and second positions, and wherein the distance between the first and second positions of the actuator constitutes a stroke length.
    Type: Application
    Filed: September 24, 2008
    Publication date: March 25, 2010
    Applicant: POLK'S MODEL CRAFT HOBBIES, INC.
    Inventor: Byung Moon Song
  • Patent number: 7499291
    Abstract: A DC power transmission system of a voltage source converter using a pulse-interleaving auxiliary circuit is disclosed. The converter system comprises an IGBT converter for converting an AC power to a DC power or the DC power to the AC power; an open Y-Y transformer and a Y-? transformer for stepping up or stepping down the AC power having a predetermined magnitude; a capacitor for dividing a DC voltage; and a DC Auxiliary circuit composed of a normal transformer and half-bridge for overlapping a pulse type input voltage to increase the number of pulses of an output waveform. In using a DC auxiliary circuit composed of normal transformer and 3-level half-bridge to increase the number of pulses of the output waveform by superposing the voltage in the form of the pulse, a normal transformer may be used instead of the tapped transformer to reduce the size thereof and to obtain an accurate transformer ratio, and a 3-level half-bridge may be used instead of the H-bridge to reduce the switching loss.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: March 3, 2009
    Assignee: Myongji University Industry and Academia Cooperation Foundation
    Inventor: Byung Moon Han
  • Publication number: 20090023183
    Abstract: The present invention relates to a method for producing a recombinant, spider toxin peptide and analgesic compositions containing said peptide. More specifically, the present invention relates to a method in which the gene for GsMTx4 is subcloned into a vector, so that it is linked to a secretion signal sequence of the alpha factor and under the control of methanol-inducible alcohol oxidase (AOX) promoter to construct a recombinant yeast expression plasmid. Yeast cells are transformed with this plasmid to produce the GsMTx4 peptide and analgesic compositions containing said peptide. The recombinant yeast expression system of the present invention affords a more stable method for producing GsMTx4 than its natural route. Thus the GsMTx4 peptide and its derivatives produced by the method of this invention can be used in the cure of related diseases such as heart failure as the peptide specifically inhibits mechanosensitive ion channels.
    Type: Application
    Filed: October 18, 2006
    Publication date: January 22, 2009
    Applicant: Seoul National University Industry Foundation
    Inventors: UhTaek Oh, Byung Moon Kim, Seung Pyo Park, Heung Sik Na
  • Publication number: 20080091348
    Abstract: The present invention relates to a route re-search method of a navigation apparatus, and more particularly, to a route re-search method, wherein when a route is re-searched for, the location at the completion time of the re-search is estimated and a route is re-searched for from the estimated location. A navigation apparatus according to the present invention comprises a GPS receiving unit 10 for receiving GPS satellite signals and calculating current location; a data storage unit 40 for storing map information and information on route search time versus distance; and a main controller 50 for re-searching for a route using the route search time versus distance. At this time, if re-search for a route is requested, the main controller 50 searches for re-search time corresponding to re-search distance from the search information storage portion, estimates location after the re-search time based on current moving velocity, and re-searches for a route that starts from the location.
    Type: Application
    Filed: October 16, 2007
    Publication date: April 17, 2008
    Inventor: Byung Moon Choi
  • Publication number: 20080055863
    Abstract: A method of manufacturing an optical component embedded printed circuit board is disclosed. An optical component embedded printed circuit board that includes a metal core in which at least one cavity is formed, an optical component embedded in the cavity, a first insulation layer stacked on one side of the metal core, a second insulation layer stacked on the other side of the metal core, and a circuit pattern which is formed on the first insulation layer and which is electrically connected with the optical component, provides a thin printed circuit board having a superb heat releasing effect.
    Type: Application
    Filed: September 5, 2007
    Publication date: March 6, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk-Hyeon Cho, Je-Gwang Yoo, Byung-Moon Kim, Han-Seo Cho
  • Publication number: 20080047897
    Abstract: A method of recycling waste water is preferably provided in which hardness and gas are removed from the waste water. Additionally, salt and organic carbon are preferably removed from the waste water using high-efficiency reverse osmosis. The pH of the waste water can be controlled to optimize the processes. The recycled semiconductor waste water can then be made available for use as industrial water for performing a semiconductor fabrication process. As a result, a cost for manufacturing a semiconductor device may be reduced. The principles of the present invention also provide a more environmentally friendly manufacturing method, since it produces less semiconductor waste water when being performed than conventional methods.
    Type: Application
    Filed: August 16, 2007
    Publication date: February 28, 2008
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SAMSUNG ENGINEERING CO., LTD.
    Inventors: In-Ho Jeong, Jae-Dong Hwang, Sung-Kwang Eun, Byung-Moon Choi, Sun-Pil Kim, Deung-Yoon Heo