Patents by Inventor C. Hunter

C. Hunter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8615634
    Abstract: A data processing system includes a processor core and a cache memory hierarchy coupled to the processor core. The cache memory hierarchy includes at least one upper level cache and a lowest level cache. A memory controller is coupled to the lowest level cache and to a system memory and includes a physical write queue from which the memory controller writes data to the system memory. The memory controller initiates accesses to the lowest level cache to place into the physical write queue selected cachelines having spatial locality with data present in the physical write queue.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: December 24, 2013
    Assignee: International Business Machines Corporation
    Inventors: David M. Daly, Benjiman L. Goodman, Hillery C. Hunter, William J. Starke, Jeffrey A. Stuecheli
  • Patent number: 8549268
    Abstract: A computer-implemented method for managing processing resources of a computerized system having at least a first processor and a second processor, each of the processors operatively interconnected to a memory storing a set of data to be processed by a processor, the method comprising: monitoring data accessed by the first processor while executing; and if the second processor is at a shorter distance than the first processor from the monitored data, instructing to interrupt execution at the first processor and resume the execution at the second processor.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: October 1, 2013
    Assignee: International Business Machines Corporation
    Inventors: Hillery C Hunter, Ronald P Luijten, Phillip Stanley-Marbell
  • Patent number: 8490950
    Abstract: A gate valve has a body, the body having a cavity and a flow passage intersecting the cavity. A seat ring is mounted to the body at the intersection of the flow passage and the cavity, the seat ring having an engaging face. A gate in the cavity has an engaging face that slidingly engages the face of the seat ring while being moved between open and closed positions. A friction-resistant coating is on at least one of the faces.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: July 23, 2013
    Assignee: Vetco Gray Inc.
    Inventor: Rick C. Hunter
  • Patent number: 8489807
    Abstract: Techniques for performing refresh operations is disclosed. In response to a completion of a memory operation, a determination is made whether or not a refresh backlog count is greater than a first predetermined value. In a determination that the refresh backlog count is greater than the first predetermined value, a refresh operation is performed as soon as possible. In a determination that the refresh backlog count is not greater than the first predetermined value, a refresh operation is performed after a delay of an idle count value.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: July 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: John S. Dodson, Benjiman L. Goodman, Hillery C. Hunter, Stephen Powell, Jeffrey A. Stuecheli
  • Publication number: 20130161553
    Abstract: A valve includes a stem seal assembly that prevent fluid flow in a first direction and vents in a second direction opposite the first direction. The assembly includes a packing assembly positioned within a valve stem opening of a valve body of the valve to seal a valve stem to the valve body. The packing assembly includes a first seal and a second seal preventing passage of fluid from a body cavity of the valve body to an exterior of the valve body along the valve stem while venting fluid from an exterior of the valve body to the body cavity along the valve stem. The packing assembly isolates the first seal and the second seal so that a load applied to the first seal ring is not transferred to the second seal ring.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Applicant: VETCO GRAY INC.
    Inventor: Rick C. Hunter
  • Patent number: 8473723
    Abstract: A computer-implemented method for a computerized system having at least a first processor and a second processor, where each of the processors are operatively interconnected to a memory storing a set of data to be processed by a processor. The method includes monitoring data accessed by the first processor while executing, and if the second processor is at a shorter distance than the first processor from the monitored data, instructing to interrupt execution at the first processor and resume the execution at the second processor.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: June 25, 2013
    Assignee: International Business Machines Corporation
    Inventors: Hillery C Hunter, Ronald P Luijten, Phillip Stanley-Marbell
  • Patent number: 8452919
    Abstract: An advanced memory having improved performance, reduced power and increased reliability. A memory device includes a memory array, a receiver for receiving a command and associated data, error control coding circuitry for performing error control checking on the received command, and data masking circuitry for preventing the associated data from being written to the memory array in response to the error control coding circuitry detecting an error in the received command. Another memory device includes a programmable preamble. Another memory device includes a fast exit self-refresh mode. Another memory device includes auto refresh function that is controlled by the characteristic device. Another memory device includes an auto refresh function that is controlled by a characteristic of the memory device.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: May 28, 2013
    Assignee: International Business Machines Corporation
    Inventors: Kyu-Hyoun Kim, George L. Chiu, Paul W. Coteus, Daniel M. Dreps, Kevin C. Gower, Hillery C. Hunter, Charles A. Kilmer, Warren E. Maule
  • Publication number: 20130128682
    Abstract: An embodiment provided is a memory system with dynamic refreshing that includes a memory device with memory cells. The system also includes a refresh module in communication with the memory device and with a memory controller, the refresh module configured for receiving a refresh command from the memory controller and for refreshing a number of the memory cells in the memory device in response to receiving the refresh command. The number of memory cells refreshed in response to receiving the refresh command is responsive to at least one of a desired bandwidth characteristic and a desired latency characteristic.
    Type: Application
    Filed: November 17, 2011
    Publication date: May 23, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joab D. Henderson, Hillery C. Hunter, Warren E. Maule, Jeffrey A. Stuecheli
  • Patent number: 8436788
    Abstract: Aspects of the disclosure provide a display system. The display system can include a display module having a configurable optical characteristic that varies from substantially transmissive to substantially reflective, at least one data capturing device configured to capture data to form a display image, and at least a first projector configured to project the display image to the display module. Therefore, the display image can be overlaid with a real image according to an optical configuration of the display module.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: May 7, 2013
    Assignee: Lockheed Martin Corporation
    Inventors: Mathew P. Kier, Michael J. Dailey, Jon C. Hunter, Richard A. Sanoske, Raymond G Roberts
  • Publication number: 20130087977
    Abstract: A seal assembly is inserted within an annulus between inner and outer coaxially disposed annular members having a common axis. The seal assembly includes a seal stack having a compliant element sandwiched between two anti-extrusion elements that contain the flow of the compliant element. The seal assembly also includes a sealing ring and a locking ring coupled to the sealing ring. The seal assembly also includes an energizing ring configured to be moved axially in a first direction by a ring tool to apply an axial force to the locking ring, which in turn acts on the sealing ring to radially deform the sealing ring into sealing engagement with the annular members. Continued axial movement of the locking ring in the first direction radially deforms the locking ring into locking engagement with the annular members.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 11, 2013
    Inventors: Gary L. Galle, Rick C. Hunter
  • Publication number: 20130022578
    Abstract: Provided herein are methods and systems for interfering with viability of bacteria and related compounds and compositions.
    Type: Application
    Filed: April 25, 2012
    Publication date: January 24, 2013
    Inventors: Dianne K. NEWMAN, Ryan C. HUNTER
  • Publication number: 20130020522
    Abstract: A coating for use in protecting surfaces susceptible to environmental degradation. The coating may be applied to metallic surfaces for providing a barrier against elements and/or ambient conditions that would otherwise degrade the surface material. The coating includes multiple layers, where a thermoplastic polymer is included, wholly or partly, within one or more of the layers. Example applications of the coating are for protecting valve seat seals and valve stem seals of a valve assembly used in conjunction with handling of fluids produced from a subterranean formation.
    Type: Application
    Filed: July 22, 2011
    Publication date: January 24, 2013
    Applicant: VETCO GRAY INC.
    Inventors: Rick C. Hunter, Khanh Anh Duong
  • Publication number: 20130018066
    Abstract: Disclosed are compounds of the formula I or a stereoisomer, tautomer, or pharmaceutically acceptable salt or solvate thereof, wherein W is a bond, —C(?S)—, —S(O)—, —S(O)2—, —C(?O)—, —O—, —C(R6)(R7)—, —N(R5)— or —C(?N(R5))—; X is —O—, —N(R5)— or —C(R6)(R7)—; provided that when X is —O—, U is not —O—, —S(O)—, —S(O)2—, —C(?O)— or —C(?NR5)—; U is a bond, —S(O)—, —S(O)2—, —C(O)—, —O—, —P(O)(OR15)—, —C(?NR5)—, —(C(R6)(R7))b— or —N(R5)—; wherein b is 1 or 2; provided that when W is —S(O)—, —S(O)2—, —O—, or —N(R5)—, U is not —S(O)—, —S(O)2—, —O—, or —N(R5)—; provided that when X is —N(R5)— and W is —S(O)—, —S(O)2—, —O—, or —N(R5)—, then U is not a bond; and R1, R2, R3, R4, R5, R6, and R7 are as defined in the specification; and pharmaceutical compositions comprising the compounds of formula I.
    Type: Application
    Filed: July 17, 2012
    Publication date: January 17, 2013
    Applicant: Schering Corporation & Pharmacopeia Drug Discovery Inc.
    Inventors: Zhaoning Zhu, Brian A. McKittrick, Zhong-Yue Sun, Yuanzan C. Ye, Johannes H. Voigt, Corey Strickland, Elizabeth M. Smith, Andrew Stamford, William J. Greenlee, Robert Mazzola, John Caldwell, Jared N. Cumming, Lingyan Wang, Yusheng Wu, Ulrich Iserloh, Tao Guo, Thuy X.H. Le, Kurt W. Saionz, Suresh D. Babu, Rachael C. Hunter, Michelle L. Morris, Huizhong Gu, Gang Qian, Dawit Tadesse
  • Publication number: 20120324166
    Abstract: A computer-implemented method for managing processing resources of a computerized system having at least a first processor and a second processor, each of the processors operatively interconnected to a memory storing a set of data to be processed by a processor, the method comprising: monitoring data accessed by the first processor while executing; and if the second processor is at a shorter distance than the first processor from the monitored data, instructing to interrupt execution at the first processor and resume the execution at the second processor.
    Type: Application
    Filed: August 30, 2012
    Publication date: December 20, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hillery C Hunter, Ronald P. Luijten, Phillip Stanley-Marbell
  • Publication number: 20120300570
    Abstract: An advanced memory having improved performance, reduced power and increased reliability. A memory device includes a memory array, a receiver for receiving a command and associated data, error control coding circuitry for performing error control checking on the received command, and data masking circuitry for preventing the associated data from being written to the memory array in response to the error control coding circuitry detecting an error in the received command. Another memory device includes a programmable preamble. Another memory device includes a fast exit self-refresh mode. Another memory device includes auto refresh function that is controlled by the characteristic device. Another memory device includes an auto refresh function that is controlled by a characteristic of the memory device.
    Type: Application
    Filed: August 6, 2012
    Publication date: November 29, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyu-Hyoun Kim, George L. Chiu, Paul W. Coteus, Daniel M. Dreps, Kevin C. Gower, Hillery C. Hunter, Charles A. Kilmer, Warren E. Maule
  • Publication number: 20120300563
    Abstract: An advanced memory having improved performance, reduced power and increased reliability. A memory device includes a memory array, a receiver for receiving a command and associated data, error control coding circuitry for performing error control checking on the received command, and data masking circuitry for preventing the associated data from being written to the memory array in response to the error control coding circuitry detecting an error in the received command. Another memory device includes a programmable preamble. Another memory device includes a fast exit self-refresh mode. Another memory device includes auto refresh function that is controlled by the characteristic device. Another memory device includes an auto refresh function that is controlled by a characteristic of the memory device.
    Type: Application
    Filed: August 6, 2012
    Publication date: November 29, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyu-Hyoun Kim, George L. Chiu, Paul W. Coteus, Daniel M. Dreps, Kevin C. Gower, Hillery C. Hunter, Charles A. Kilmer, Warren E. Maule
  • Patent number: 8309017
    Abstract: An exhaust stream buffering system is described to temper a temperature profile and reduce a particulate load to permit heat recovery and cleaning. The buffering system may reduce the volatile temperature profile to even the temperature spikes, and produce a more even cyclical temperature profile. When used in steel making facilities, the buffered stream may also be augmented by blast furnace gases to provide additional energy for a heat recovery system.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: November 13, 2012
    Inventor: William C. Hunter
  • Patent number: 8309703
    Abstract: The invention provides short interfering nucleic acids, either single-stranded or double-stranded, that cause RNAi-induced degradation of mRNA from the Nav1.8 sodium channel gene; to pharmaceutical compositions comprising such short interfering nucleic acids; recombinant vectors comprising such short interfering nucleic acids; a method for inhibiting translation of an mRNA; a method for inhibiting expression of a polypeptide; a method for blocking the membrane potential in a cell; a method for blocking the sodium current in a cell; and a method for inhibiting chronic pain.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: November 13, 2012
    Assignee: Merck Sharp & Dohme Corp.
    Inventors: Sameer Goregaoker, John C. Hunter, Tony Priestley
  • Patent number: 8307270
    Abstract: An advanced memory having improved performance, reduced power and increased reliability. A memory device includes a memory array, a receiver for receiving a command and associated data, error control coding circuitry for performing error control checking on the received command, and data masking circuitry for preventing the associated data from being written to the memory array in response to the error control coding circuitry detecting an error in the received command. Another memory device includes a programmable preamble. Another memory device includes a fast exit self-refresh mode. Another memory device includes auto refresh function that is controlled by the characteristic device. Another memory device includes an auto refresh function that is controlled by a characteristic of the memory device.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: November 6, 2012
    Assignee: International Business Machines Corporation
    Inventors: Kyu-Hyoun Kim, George L. Chiu, Paul W. Coteus, Daniel M. Dreps, Kevin C. Gower, Hillery C. Hunter, Charles A. Kilmer, Warren E. Maule
  • Patent number: D685872
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: July 9, 2013
    Assignee: Nature Blinds, LLC
    Inventors: Timothy L. Thomason, Arthur C. Hunter