Abstract: A method for managing an asynchronous transfer mode (ATM) cell includes transmitting an ATM cell from a server system to a broadband modem. The ATM cell is forwarded from the broadband modem to a client system.

Abstract: A storage compartment for a vehicle capable of being coupled to a trailer via a coupling. When in a coupled state, a space is defined between the trailer and the vehicle. The space includes a swing clearance area for the trailer. The swing clearance area is bounded by a front portion of the trailer, and an arc traversed by the front portion of the trailer, about the coupling, within the space when the vehicle and the trailer are combined and in transition between a straight configuration and a turning configuration. The storage compartment is adapted to attach to the vehicle within the space such that at least a portion of the storage compartment extends rearward beyond a forwardmost point on the arc, but without extending into the swing clearance area.

Abstract: A seat assembly (10, 100) is disclosed which utilizes a retractable armrest (16) which can be retracted into a recess (20) in the seat back (12) of the seat assembly to maximize the available space around the seat assembly. The retractable armrest 16 can be moved from the retracted position to the deployed position by a pneumatic cylinder (38), coil spring (106) or other actuator. The retractable armrest (16) is guided in this motion by a guide pin (30) moving within a guide slot (32) in a mount on the seat back.

Abstract: An extendable sleeper for a truck that has a fixed portion and an extension. The extension is slidably connected to the fixed portion for horizontal longitudinal movement with respect thereto. The fixed portion is defined by rigid sleeper sidewalls, and is adapted for attaching to a rear portion of a truck cab. The extension has rigid extension sidewalls and a rigid rear panel. The movement of the extension with respect to the fixed portion causes the extendable sleeper to move between a stored configuration and a deployed configuration. In the stored configuration, at least part of the extension is located inside the fixed portion. In the deployed configuration, at least another part of the extension is extending behind the fixed portion such that the sleeper has a relatively greater enclosed volume.

Abstract: This invention is a clear plastic board used specifically for scoring a straight line when place on top of glass or stained glass. The invention allows the artisan to comfortably move the board so as to score by seeing his pattern through the clear plastic and selecting exactly the color of the stained glass that he wishes to use in his artwork. A slot in the middle of the board allows a more expensive type of cutter as well as the less expensive glass cutter to score and glide easily from bottom to top or top to bottom (as some artisans prefer) and effectively score a straight line on the glass. The slot also prevents slipping to the side as would be true when using a straight edge or T square and allows for a stronger and more rigid scoring. The scoring board also has topside and underside rubber strips to prevent slippage, as would be true when using a straight edge, allowing for the effective scoring of horizontal and vertical lines and to diminish wear and tear to the cutter's carbide wheel.

Abstract: The present invention teaches a new system for transferring data between a network and hosts coupled to the network. The system uses an adapter, that is coupled between the host and the network, to allow segmenting and reassembling cells directly in the host memory. The present invention also teaches a pipelined DMA architecture to overcome the problem of the interruption of the DMA operation when switching from one virtual circuit to the next. This architecture depends on fast access to a local memory used for storing buffer descriptors for each virtual circuit. In this architecture, a two stage pipeline is used with the first stage performing the local memory access while the second stage performs the DMA transfers. When the pipeline is filled, both stages will operate in parallel yielding significant gain in performance due to continuous operation of the DMA.

Abstract: There is described a vehicle door assembly with shear layer control for controlling the airflow in and around an aperture in the vehicle fuselage. The vehicle door assembly consists of an upper door and a lower door, both slidably mounted to the exterior surface of the vehicle fuselage. In addition, an inner door is slidably mounted beneath the upper door. Beneath the inner door is an aperture assembly having an aperture opening positionable to be substantially flush with the exterior surface of the vehicle fuselage. Also provided are means for positioning the aperture assembly in an upward and downward direction in relation to the vehicle fuselage.

Abstract: A data processor is described. The data processor is capable of decoding and executing the first instruction of a first instruction set and the second instruction of a second instruction set wherein the first instruction and the second instruction originate from a single computer program. Alternatively, the data processor can also execute a first instruction of a first instruction set in a first instruction set mode, receive a first interruption indication in the first instruction set mode, service the first interruption indication in a second instruction set mode, return to the first instruction set mode, receive a second interruption indication in the first instruction set mode, and service the second interruption indication in the first instruction set mode.

Abstract: An address translator and a method for translating a linear address into a physical address for memory management in a computer is described herein. Different memory sizes, and different page sizes can be selected. The address translator can translate from a standard 32-bit linear address for compatibility with previous 32-bit architectures, and can also translate to a physical memory size with a larger physical address than linear address; i.e., greater than 32 bits (e.g. 36 bits and up), with no increase in access time. The address translator translates a linear address that includes an offset and a plurality of fields used to select entries in a plurality of tables. The format of the linear address into fields is dependent upon the selected memory size and the selected page size.

Abstract: An interface provides a path to transfer data from a proprietary network to an open system. The proprietary network includes at least one module central processing unit (CPU) and a module memory associated therewith operatively connected to the proprietary network. A shared memory and shared memory logic are interposed between the proprietary network and the open system, thereby forming the data path. The method comprises the steps of accepting requests for data from the open system by a parasitic task function within the module CPU. The data requested of the proprietary network is obtained and placed in a predetermined location of the module memory in a form understandable to the open systems. A pointer value is placed in the shared memory, the pointer value containing the value of the predetermined location of the module memory, the shared memory being mapped in the addressable memory space of the shared memory logic using virtual memory techniques.

Abstract: There is described a vehicle door assembly with shear layer control for controlling the airflow in and around an aperture in the vehicle fuselage. The vehicle door assembly consists of an upper door and a lower door, both slidably mounted to the exterior surface of the vehicle fuselage. In addition, an inner door is slidably mounted beneath the upper door. Beneath the inner door is an aperture assembly having an aperture opening positionable to be substantially flush with the exterior surface of the vehicle fuselage. Also provided are means for positioning the aperture assembly in an upward and downward direction in relation to the vehicle fuselage.

Abstract: A multi-processor programmable interrupt controller system which includes: an I/O interrupt controller for receiving interrupt requests from an I/O subsystem; multiple processor interrupt controllers, each associated with a specific processor for dispensing of accepted interrupts; and an interrupt controller bus primarily for the transmission of interrupt requests between interrupt controller units and for priority arbitration, using a standard message format and arbitration protocol.

Abstract: An input/output processor architecture for providing an interface between peripheral subsystems and a generalized data processor. The interface processor enables data to be transferred between two address spaces (the generalized data processor address space and an external processor I/O address space) by mapping a portion of the I/O address space into a portion of the GDP address space. This mapping facility provides the peripheral subsystem with a "window" into the associated GDP subsystem. It accepts addresses within a certain subrange, or subranges, and translates them into references into one or more GDP data segments.A function-request facility provides a functional capability over certain objects within the GDP address space.