Patents by Inventor Calvin Yi-Ping Chao
Calvin Yi-Ping Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250130036Abstract: A method includes generating light pulses by an illumination source toward an object; collecting the light pulses reflected from the object by an image sensor; generating a first signal-time plot of a sensor signal by the image sensor; generating a second signal-time plot of an index signal, wherein the second signal-time plot of the index signal comprises pulsed signals corresponding to the light pulses, respectively; collecting data from selected time periods of the first signal-time plot of the sensor signal, wherein the selected time periods of the first signal-time plot of the sensor signal are the same as time periods of the light pulses in the second signal-time plot of the index signal; and generating a third signal-time plot of an output signal based on the collected data.Type: ApplicationFiled: October 23, 2023Publication date: April 24, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hung-Yi TU, Meng-Hsiu WU, Shang-Fu YEH, Chiao-Yi HUANG, Calvin Yi-Ping CHAO
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Patent number: 12092767Abstract: A method of a sensing device, comprising steps of emitting, by a light source of the sensing device, a light pulse in each of n cycles; measuring, by a single photon avalanche diodes array of the sensing device, a time-of-flight value with a resolution of m in each of the n cycles to generate n raw data frames based on a reflected light of the light pulse; performing, by a pre-processing circuit of the sensing device, a pre-processing operation to n raw data frames to generate k pre-processed data frames, wherein m, n and k are natural numbers, and k is smaller than n; and generating, by post-processor of the sensing device, a histogram according to the k pre-processed data frames and analyzing the histogram to output a depth result.Type: GrantFiled: April 11, 2023Date of Patent: September 17, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin Yin, Shang-Fu Yeh, Calvin Yi-Ping Chao, Chih-Lin Lee, Meng-Hsiu Wu
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Publication number: 20230375611Abstract: A method for testing semiconductor devices is disclosed, which includes: obtaining a result measured on a semiconductor device in one of a set of tests; comparing the result with a maximum value determined among respective results that were previously measured in one or more of the set of tests and a minimum value determined among respective results that were previously measured in one or more of the set of tests; determining, based on the comparison between the first result and the maximum and minimum values, whether to update the maximum and minimum values to calculate a delta value; comparing the delta value with a noise threshold value; determining based on the comparison between the delta value and the noise threshold value, whether to update a value of a timer; determining that the value of the timer satisfies a timer threshold; and determining that the semiconductor device incurs noise.Type: ApplicationFiled: July 31, 2023Publication date: November 23, 2023Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: Chin-Hao Chang, Meng-Hsiu Wu, Chiao-Yi Huang, Manoj Mhala, Calvin Yi-Ping Chao
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Publication number: 20230299109Abstract: A semiconductor device includes a first chip comprising a plurality of photo-sensitive devices, wherein the plurality of photo-sensitive devices are formed as a first array. The semiconductor device includes a second chip bonded to the first chip and comprising: a plurality of groups of pixel transistors, wherein the plurality of groups of pixel transistors are formed as a second array; and a plurality of input/output transistors, wherein the plurality of input/output transistors are disposed outside the second array. The semiconductor device includes a third chip bonded to the second chip and comprising a plurality of logic transistors.Type: ApplicationFiled: June 27, 2022Publication date: September 21, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Hsien Chung, Tzu-Jui Wang, Chen-Jong Wang, Tzu-Hsuan Hsu, Dun-Nian Yaung, Calvin Yi-Ping Chao
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Patent number: 11754616Abstract: A method for testing semiconductor devices is disclosed, which includes: obtaining a result measured on a semiconductor device in one of a set of tests; comparing the result with a maximum value determined among respective results that were previously measured in one or more of the set of tests and a minimum value determined among respective results that were previously measured in one or more of the set of tests; determining, based on the comparison between the first result and the maximum and minimum values, whether to update the maximum and minimum values to calculate a delta value; comparing the delta value with a noise threshold value; determining based on the comparison between the delta value and the noise threshold value, whether to update a value of a timer; determining that the value of the timer satisfies a timer threshold; and determining that the semiconductor device incurs noise.Type: GrantFiled: May 27, 2020Date of Patent: September 12, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Chin-Hao Chang, Meng-Hsiu Wu, Chiao-Yi Huang, Manoj M. Mhala, Calvin Yi-Ping Chao
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Patent number: 11726187Abstract: An apparatus and method for providing a filtering false photon count events for each pixel in a DTOF sensor array are disclosed herein. In some embodiments, the apparatus includes: a light source configured to emit a modulated signal towards the object; a direct time of flight (DTOF) sensor array configured to receive a reflected signal from the object, wherein the DTOF sensor array comprises a plurality of single-photon avalanche diodes (SPADs); and processing circuitry configured to receive photon event detection signals from a center pixel and a plurality of pixels orthogonally and diagonally adjacent to the center pixel and output a valid photon detection signal, in response to determining whether a sum of the received photon event detection signals is greater than a predetermined threshold.Type: GrantFiled: October 30, 2020Date of Patent: August 15, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin Yin, Meng-Hsiu Wu, Chih-Lin Lee, Calvin Yi-Ping Chao, Shang-Fu Yeh
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Publication number: 20230243939Abstract: A method of a sensing device, comprising steps of emitting, by a light source of the sensing device, a light pulse in each of n cycles; measuring, by a single photon avalanche diodes array of the sensing device, a time-of-flight value with a resolution of m in each of the n cycles to generate n raw data frames based on a reflected light of the light pulse; performing, by a pre-processing circuit of the sensing device, a pre-processing operation to n raw data frames to generate k pre-processed data frames, wherein m, n and k are natural numbers, and k is smaller than n; and generating, by post-processor of the sensing device, a histogram according to the k pre-processed data frames and analyzing the histogram to output a depth result.Type: ApplicationFiled: April 11, 2023Publication date: August 3, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin Yin, Shang-Fu Yeh, Calvin Yi-Ping Chao, Chih-Lin Lee, Meng-Hsiu Wu
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Patent number: 11644547Abstract: A sensing device that is configured to determine a depth result based on time-of-flight value is introduced. The sensing device includes a delay locked loop circuit, a plurality of time-to-digital converters, a multiplexer and a digital integrator. The delay locked loop circuit is configured to output a plurality of delay clock signals through output terminals of the delay locked loop circuit. The plurality of time-to-digital converters include a plurality of latches. The multiplexer is configured to select a sub-group of m latches among the latches of the plurality of time-to-digital converters to be connected to the output terminals of the delay locked loop circuit according to a control signal.Type: GrantFiled: June 27, 2019Date of Patent: May 9, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin Yin, Shang-Fu Yeh, Calvin Yi-Ping Chao, Chih-Lin Lee, Meng-Hsiu Wu
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Patent number: 11579263Abstract: Disclosed is a time-of-flight sensing apparatus and method.Type: GrantFiled: October 17, 2019Date of Patent: February 14, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin Yin, Meng-Hsiu Wu, Chih-Lin Lee, Calvin Yi-Ping Chao, Shang-Fu Yeh
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Patent number: 11569346Abstract: A semiconductor device includes a source/drain diffusion area, a first doped region and a gate. The source/drain diffusion area, defined between a first isolation structure and a second isolation structure, includes a source region, a drain region and a device channel. The first doped region, disposed along a first junction between the device channel and the first isolation structure, is separated from at least one of the source region and the drain region. The first doped region has a dopant concentration higher than that of the device channel. The gate is disposed over the source/drain diffusion area. The first doped region is located within a projected area of the gate onto the source/drain diffusion area, the first isolation structure and the second isolation structure. A length of the first doped region is shorter than a length of the gate in a direction from the source region to the drain region.Type: GrantFiled: July 16, 2021Date of Patent: January 31, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Kuo-Yu Chou, Seiji Takahashi, Shang-Fu Yeh, Chih-Lin Lee, Chin Yin, Calvin Yi-Ping Chao
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Publication number: 20220337206Abstract: A differential amplifier is provided. The differential amplifier includes a first load, a second load, a current source, a differential pair circuit, a first and a second switch circuit. The differential pair circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first switch circuit controls the first and the second transistors, and the second switch circuit controls the third and the fourth transistors. Through the control and selection of the first and second switch circuits, a differential pair is selected in the differential pair circuit to receive and process a first input signal and a second input signal for signal.Type: ApplicationFiled: June 29, 2022Publication date: October 20, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin-Hao Chang, Manoj M. Mhala, Calvin Yi-Ping Chao
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Patent number: 11424726Abstract: A differential amplifier is provided. The differential amplifier includes a first load, a second load, a current source, a differential pair circuit, a first and a second switch circuit. The differential pair circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first switch circuit controls the first and the second transistors, and the second switch circuit controls the third and the fourth transistors. Through the control and selection of the first and second switch circuits, a differential pair is selected in the differential pair circuit to receive and process a first input signal and a second input signal for signal.Type: GrantFiled: April 1, 2020Date of Patent: August 23, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin-Hao Chang, Manoj M. Mhala, Calvin Yi-Ping Chao
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Publication number: 20220137192Abstract: An apparatus and method for providing a filtering false photon count events for each pixel in a DTOF sensor array are disclosed herein. In some embodiments, the apparatus includes: a light source configured to emit a modulated signal towards the object; a direct time of flight (DTOF) sensor array configured to receive a reflected signal from the object, wherein the DTOF sensor array comprises a plurality of single-photon avalanche diodes (SPADs); and processing circuitry configured to receive photon event detection signals from a center pixel and a plurality of pixels orthogonally and diagonally adjacent to the center pixel and output a valid photon detection signal, in response to determining whether a sum of the received photon event detection signals is greater than a predetermined threshold.Type: ApplicationFiled: October 30, 2020Publication date: May 5, 2022Inventors: Chin YIN, Meng-Hsiu WU, Chih-Lin LEE, Calvin Yi-Ping CHAO, Shang-Fu YEH
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Patent number: 11199444Abstract: A self-calibration time-to-digital converter (TDC) integrated circuit for single-photon avalanche diode (SPAD) based depth sensing is disclosed. The circuit includes a SPAD matrix with a plurality of SPAD pixels arranged in m rows and n columns, the SPAD pixels in each column of SPAD pixels are connected by a column bus; a global DLL unit with n buffers and n clock signals; and an image signal processing unit for receiving image signals from the column TDC array. The circuit can also include a row control unit configured to enable one SPAD pixel in each row for a transmitting signal; a circular n-way multiplexer for circularly multiplexing n clock signals in the global DLL unit; a column TDC array with n TDCs, each TDC further comprises a counter and a latch, the latch of each TDC is connected to the circular n-way multiplexer for circular multiplexing.Type: GrantFiled: June 27, 2019Date of Patent: December 14, 2021Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Chin Yin, Chih-Lin Lee, Shang-Fu Yeh, Kuo-Yu Chou, Calvin Yi-Ping Chao
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Publication number: 20210373068Abstract: A method for testing semiconductor devices is disclosed, which includes: obtaining a result measured on a semiconductor device in one of a set of tests; comparing the result with a maximum value determined among respective results that were previously measured in one or more of the set of tests and a minimum value determined among respective results that were previously measured in one or more of the set of tests; determining, based on the comparison between the first result and the maximum and minimum values, whether to update the maximum and minimum values to calculate a delta value; comparing the delta value with a noise threshold value; determining based on the comparison between the delta value and the noise threshold value, whether to update a value of a timer; determining that the value of the timer satisfies a timer threshold; and determining that the semiconductor device incurs noise.Type: ApplicationFiled: May 27, 2020Publication date: December 2, 2021Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: Chin-Hao Chang, Meng-Hsiu Wu, Chiao-Yi Huang, Manoj M. Mhala, Calvin Yi-Ping Chao
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Publication number: 20210343838Abstract: A semiconductor device includes a source/drain diffusion area, a first doped region and a gate. The source/drain diffusion area, defined between a first isolation structure and a second isolation structure, includes a source region, a drain region and a device channel. The first doped region, disposed along a first junction between the device channel and the first isolation structure, is separated from at least one of the source region and the drain region. The first doped region has a dopant concentration higher than that of the device channel. The gate is disposed over the source/drain diffusion area. The first doped region is located within a projected area of the gate onto the source/drain diffusion area, the first isolation structure and the second isolation structure. A length of the first doped region is shorter than a length of the gate in a direction from the source region to the drain region.Type: ApplicationFiled: July 16, 2021Publication date: November 4, 2021Inventors: KUO-YU CHOU, SEIJI TAKAHASHI, SHANG-FU YEH, CHIH-LIN LEE, CHIN YIN, CALVIN YI-PING CHAO
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Publication number: 20210313940Abstract: A differential amplifier is provided. The differential amplifier includes a first load, a second load, a current source, a differential pair circuit, a first and a second switch circuit. The differential pair circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first switch circuit controls the first and the second transistors, and the second switch circuit controls the third and the fourth transistors. Through the control and selection of the first and second switch circuits, a differential pair is selected in the differential pair circuit to receive and process a first input signal and a second input signal for signal.Type: ApplicationFiled: April 1, 2020Publication date: October 7, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Hao Chang, Manoj M. Mhala, Calvin Yi-Ping Chao
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Patent number: 11075267Abstract: A semiconductor device comprises a source/drain diffusion area, and a first doped region. The source/drain diffusion area is defined between a first isolation structure and a second isolation structure. The source/drain diffusion area includes a source region, a drain region, and a device channel. The device channel is between the source region and the drain region. The first doped region is disposed along a first junction between the device channel and the first isolation structure in a direction from the source region to the drain region. The first doped region is separated from at least one of the source region and the drain region, and has a dopant concentration higher than that of the device channel. The semiconductor device of the present disclosure has low random telegraph signal noise and fewer defects.Type: GrantFiled: December 16, 2019Date of Patent: July 27, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Kuo-Yu Chou, Seiji Takahashi, Shang-Fu Yeh, Chih-Lin Lee, Chin Yin, Calvin Yi-Ping Chao
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Patent number: 11006064Abstract: A CMOS image sensor, and a method of operating a pixel array by a CMOS image sensor is provided. The CMOS image sensor includes a sensor, and a readout circuit. The sensor is configured to generate a first voltage signal and a first reset signal. The readout circuit is configured to perform a first readout operation by reading out the first reset signal and the first voltage signal simultaneously at a first predetermined time. After the first readout operation, the readout circuit turns on a plurality of switches to obtain a common-mode signal by making the first reset signal equal to the first voltage signal and re-perform a second readout operation by reading out the common-mode signal at a second predetermined time. The first predetermined time and the second predetermined time do not overlap each other.Type: GrantFiled: September 16, 2019Date of Patent: May 11, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin Yin, Po-Sheng Chou, Shang-Fu Yeh, Calvin Yi-Ping Chao, Chih-Lin Lee
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Publication number: 20210084247Abstract: A CMOS image sensor, and a method of operating a pixel array by a CMOS image sensor is provided. The CMOS image sensor includes a sensor, and a readout circuit. The sensor is configured to generate a first voltage signal and a first reset signal. The readout circuit is configured to perform a first readout operation by reading out the first reset signal and the first voltage signal simultaneously at a first predetermined time. After the first readout operation, the readout circuit turns on a plurality of switches to obtain a common-mode signal by making the first reset signal equal to the first voltage signal and re-perform a second readout operation by reading out the common-mode signal at a second predetermined time. The first predetermined time and the second predetermined time do not overlap each other.Type: ApplicationFiled: September 16, 2019Publication date: March 18, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin Yin, Po-Sheng Chou, Shang-Fu Yeh, Calvin Yi-Ping Chao, Chih-Lin Lee