Abstract: An infrared emitter with a glass lid for emitting infrared radiation comprises a package enclosing a cavity, wherein a first part is transparent for infrared radiation and a second part comprises a glass material and a heating structure configured for emitting the infrared radiation, wherein the heating structure is arranged in the cavity between the first part and the second part of the package.

Abstract: A method of fabricating a semiconductor device includes: epitaxially growing a multilayer Group-III nitride structure on a first surface of a substrate; removing portions of the multilayer structure to form a mesa arranged on the first surface; applying insulating material to the first surface of the substrate so that side faces of the mesa are embedded in the insulating material; forming an electrode on a top surface of the mesa; forming a via in the insulating material that extends from the top surface of the insulating material to the first surface of the substrate; inserting conductive material into the via to form a conductive via; applying an electrically conductive redistribution structure to the upper surface and electrically connecting the conductive via to the electrode; and successively removing portions of a second surface of the substrate, to expose the insulating material and form a worked second surface including the insulating material.

Abstract: A semiconductor device includes a composite layer having a first and second opposing surfaces. The composite layer includes a mesa and a first insulating layer. The mesa has top and bottom surfaces and side faces. The side faces are embedded in the first insulating layer. The mesa includes a Group III nitride-based multilayer structure providing a Group III nitride based device having first and second electrodes arranged on the mesa top surface. First and second outer contacts are positioned on the second surface of the composite layer. A first conductive via extends through the first insulating layer and is electrically coupled to the first electrode on the mesa top surface and to the first outer contact. A second conductive via extends through the first insulating layer and is electrically coupled to the second electrode on the mesa top surface and to the second outer contact.

Abstract: A method for providing a semiconductor layer arrangement on a substrate which comprises providing a semiconductor layer arrangement having a functional layer and a semiconductor substrate layer, attaching the semiconductor layer arrangement to a glass substrate layer such that the functional layer is arranged between the glass substrate layer and the semiconductor substrate layer, and removing the semiconductor substrate layer at least partially such that the glass substrate layer substitutes the semiconductor substrate layer as the substrate of the semiconductor layer arrangement.

Abstract: Methods for manufacturing resonator structures and corresponding resonator structures are described. A first wafer including a first piezoelectric material is singulated and bonded to a second wafer.

Abstract: A method for providing a semiconductor layer arrangement on a substrate which comprises providing a semiconductor layer arrangement having a functional layer and a semiconductor substrate layer, attaching the semiconductor layer arrangement to a glass substrate layer such that the functional layer is arranged between the glass substrate layer and the semiconductor substrate layer, and removing the semiconductor substrate layer at least partially such that the glass substrate layer substitutes the semiconductor substrate layer as the substrate of the semiconductor layer arrangement.

Abstract: An infrared emitter with a glass lid for emitting infrared radiation comprises a package enclosing a cavity, wherein a first part is transparent for infrared radiation and a second part comprises a glass material and a heating structure configured for emitting the infrared radiation, wherein the heating structure is arranged in the cavity between the first part and the second part of the package.

Abstract: A semiconductor device includes a composite layer having a first and second opposing surfaces. The composite layer includes a mesa and a first insulating layer. The mesa has top and bottom surfaces and side faces. The side faces are embedded in the first insulating layer. The mesa includes a Group III nitride-based multilayer structure providing a Group III nitride based device having first and second electrodes arranged on the mesa top surface. First and second outer contacts are positioned on the second surface of the composite layer. A first conductive via extends through the first insulating layer and is electrically coupled to the first electrode on the mesa top surface and to the first outer contact. A second conductive via extends through the first insulating layer and is electrically coupled to the second electrode on the mesa top surface and to the second outer contact.

Abstract: A device is disclosed that includes a wafer/chip, a first layer, a first device, an isolation mold and a second device. The first layer is formed over the chip and has non-isolating characteristics. The first device is formed over the first layer. In one example, it is formed only over the first layer. The isolation mold is formed over the chip. The isolation mold has isolating characteristics. The second device is formed substantially over the isolation mold.

Abstract: A method for manufacturing a MEMS device is disclosed. Moreover a MEMS device and a module including a MEMS device are disclosed. An embodiment includes a method for manufacturing MEMS devices includes forming a MEMS stack over a first main surface of a substrate, forming a polymer layer over a second main surface of the substrate and forming a first opening in the polymer layer and the substrate such that the first opening abuts the MEMS stack.

Abstract: A radio frequency, RF, switch device includes a plurality of switch units, wherein the switch units are coupled in series between a first series terminal and a second series terminal to establish a switchable RF path; and a plurality of ballasting capacitor units, wherein each ballasting capacitor unit is coupled in parallel to a respective switch unit, to provide a selectable capacitance in parallel to a signal path of the respective switch unit, wherein each ballasting capacitor unit includes at least one ballasting capacitor switch element to switch the capacitance of the ballasting capacitor unit between a first capacitance value and a second capacitance value, wherein the second capacitance value is larger than the first capacitance value.

Abstract: A semiconductor chip assembly includes first and second semiconductor dies that each include opposite facing upper and lower sides and an outer edge side, and an electrical interposer having opposite facing first and second conductive surfaces and a conductive connection between the conductive surfaces. The second semiconductor die is mounted on top of the first semiconductor die and the interposer such that the lower side of the second semiconductor die faces the first semiconductor die and the interposer, a first lateral section of the second semiconductor die at least partially covers the upper side of the first semiconductor die, and a second lateral section of the second semiconductor die extends past the outer edge side of the first semiconductor die. The first conductive surface is electrically connected to a first terminal that is disposed on a lower side of the second semiconductor die.

Abstract: A microelectromechanical microphone includes a reference electrode, a first membrane arranged on a first side of the reference electrode and displaceable by sound to be detected, and a second membrane arranged on a second side of the reference electrode, said second side being situated opposite the first side of the reference electrode, and displaceable by sound to be detected. A region of one from the first and second membranes that is displaceable by sound relative to the reference electrode, independently of said region's position relative to the reference electrode, can comprise a planar section and also an undulatory section adjoining the planar section and arranged in a region of overlap one of the first membrane or the second membrane with the other one of the first membrane and or the second membrane.

Abstract: A radio frequency, RF, switch device includes a plurality of switch units, wherein the switch units are coupled in series between a first series terminal and a second series terminal to establish a switchable RF path; and a plurality of ballasting capacitor units, wherein each ballasting capacitor unit is coupled in parallel to a respective switch unit, to provide a selectable capacitance in parallel to a signal path of the respective switch unit, wherein each ballasting capacitor unit includes at least one ballasting capacitor switch element to switch the capacitance of the ballasting capacitor unit between a first capacitance value and a second capacitance value, wherein the second capacitance value is larger than the first capacitance value.

Abstract: A device is disclosed that includes a wafer/chip, a first layer, a first device, an isolation mold and a second device. The first layer is formed over the chip and has non-isolating characteristics. The first device is formed over the first layer. In one example, it is formed only over the first layer. The isolation mold is formed over the chip. The isolation mold has isolating characteristics. The second device is formed substantially over the isolation mold.

Abstract: In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.

Abstract: A method for manufacturing a MEMS device is disclosed. Moreover a MEMS device and a module including a MEMS device are disclosed. An embodiment includes a method for manufacturing MEMS devices includes forming a MEMS stack over a first main surface of a substrate, forming a polymer layer over a second main surface of the substrate and forming a first opening in the polymer layer and the substrate such that the first opening abuts the MEMS stack.

Abstract: A method for manufacturing a MEMS device is disclosed. Moreover a MEMS device and a module including a MEMS device are disclosed. An embodiment includes a method for manufacturing MEMS devices includes forming a MEMS stack over a first main surface of a substrate, forming a polymer layer over a second main surface of the substrate and forming a first opening in the polymer layer and the substrate such that the first opening abuts the MEMS stack.

Abstract: According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.

Abstract: In accordance with an embodiment, an RF module includes a bulk semiconductor substrate with at least one integrated RF component integrated in a first main surface region of the bulk semiconductor substrate; an insulator structure surrounding a side surface region of the bulk semiconductor substrate; a wiring layer stack including at least one structured metallization layer embedded into an insulation material, the wiring layer stack being arranged on the first main surface region of the bulk semiconductor substrate and a first main surface region of the insulator structure; and a carrier structure at a second main surface region of the insulator structure, wherein the carrier structure and the insulator structure include different materials.