Abstract: A voltage reference generation circuit having switch pairs coupled to systematically commutate a flying capacitor among adjacent pairs of voltage rail outputs. The circuit requires only a single flying capacitor, N+1 switch pairs, and N storage capacitors, to generate N intermediate voltage references between VDD and GND. A signal generator produces N+1 non-overlapping switch enable signals to systematically enable the switch pairs and commutate the single flying capacitor between the rail pairs. The flying capacitor remains charged to VDD/(N+1). The N storage capacitors hold their respective reference outputs at VDD*N/(N+1), VDD*(N?1)/(N+1), VDD*(N?2)/(N+1), and so forth.

Abstract: An amplifier system having one or more signal paths. Each path includes a phase amplifier and a Class G Type amplifier. The phase amplifier receives an input signal bearing phase information. The Class G Type amplifier receives an envelope signal bearing amplitude information. The output of the Class G Type amplifier is coupled to provide the VCC reference for the phase amplifier. Thus, the output signal of the phase amplifier bears both phase and amplitude information. High frequency performance and high efficiency are obtained.

Abstract: An amplifier system having one or more signal paths. Each path includes a linear amplifier and a Class G Type amplifier. The linear amplifier receives an input signal bearing phase and amplitude information. The Class G Type amplifier receives an envelope signal which tracks the anticipated output signal, plus a DC offset. The output of the Class G Type amplifier is coupled to provide the VCC reference for the linear amplifier. High frequency performance and high efficiency are obtained.

Abstract: A bandpass amplifier for use in a communication system is described. The amplifier includes a frequency selective network having a feedback path. The frequency selective network has first filtering circuitry for selectively passing the transmit band, and second filtering circuitry for selectively passing the receive band. The first filtering circuitry and the second filtering circuitry pass frequencies in the transmit band and reject frequencies in the receive band. A sampling analog-to-digital converter is coupled to the frequency selective network. A switching device is coupled to the sampling analog-to-digital converter for producing a continuous-time output signal. A feedback path is provided for continuously sensing and feeding back the continuous-time output signal to the frequency selective network.

Abstract: A control circuit for controlling a level of an audio signal and transmitting the signal to an amplifier is described. The control circuit is based on an R-2R resistor network having a first plurality of resistor nodes and a parallel resistor network having a second plurality of resistor nodes. Each of the resistors in the parallel network has a value equal to one-half of the value of the preceding resistor. A plurality of switches alternately connects each of the plurality of resistor nodes to one of a plurality of low impedance nodes and a low impedance input node associated with the amplifier. Switch control circuitry selectively controls the plurality of switches to transmit the audio signal to the low impedance input node.

Abstract: A noise shaped differential amplifier having a reduced common mode signal in accordance with an embodiment of the invention is described. In the described embodiment, the noise shaped differential amplifier includes a noise shaper having a common mode signal controlled by an attenuation operational amplifier that is coupled to a voltage divider circuit and a sense resistor divider. In this arrangement, the attenuation operational amplifier controls a virtual ground applied to the sense resistor divider.

Abstract: A switching amplifier is described which includes an input stage having a first node associated therewith and a power stage having a second node associated therewith. An actual loop delay is defined with reference to the first and second nodes. Delay detection circuitry compares the actual loop delay to a reference loop delay. A dynamic delay line controlled by the delay detection circuitry controls the actual loop delay to correspond to the reference loop delay.

Abstract: A bandpass amplifier for use in a communication system is described. The amplifier includes first and second first-order filters, first and second multipliers, a quantizer, and a driver. In one embodiment, the first and second first-order filters are coupled in series. The first multiplier multiplies a signal from the first first-order filter by a coefficient k1, and the second multiplier multiplies a signal from the second first-order filter by a coefficient k2. The quantizer quantizes a summation of the signals from the first and second multipliers into one of two values, thereby generating a quantized signal. The driver amplifies the quantized signal, and generating an output signal. At least one of the coefficients k1 and k2 is adjusted based on a level of the output signal.

Abstract: Methods and apparatus are described for switching a switch from a first logic state to a second logic state. The switch has a gate terminal having a gate capacitance and a resistance associated therewith. The gate terminal also has a series inductance coupled thereto. While the switch is in the first logic state, a pulse corresponding to the second logic state is applied to the inductance. The pulse has a first level of energy associated therewith which is sufficiently high to overcome damping by the resistance (thus allowing the gate terminal to reach a signal level corresponding to the second logic state thereby switching the switch to the second logic state), and sufficiently low to mitigate oscillation due to the inductance and the gate capacitance (such that the gate terminal settles at the signal level before a subsequent transition of the switch to the first logic state).

Abstract: An electronic device includes sampling circuitry and at least one switching device. Each switching device has resonance circuitry associated with the output terminal thereof. The resonance circuitry and the at least one switching device have at least one resonance oscillation associated therewith. The electronic device further comprises clock generation circuitry which generates a clock signal for the sampling circuitry at least in part from the at least one resonance oscillation.

Abstract: The present invention monitors the average switching frequency at the output of the comparator and adjusts the delay compensation accordingly. That is, the switching frequency monitoring circuit looks at the average switching frequency and maintains the average switching frequency in a “frequency zone” which corresponds to a high elbow and a low noise floor.

Abstract: A mixed signal processing unit with non-linear feedforward paths to improve total harmonic distortion (THD) and noise characteristics of the processor. Specifically the signal processing unit includes a first integrator stage configured to receive an input signal and configured to generate a first integrated signal in response thereto, a second integrator stage coupled to the first integrator stage and configured to generate a second integrated signal from the first integrated signal, a sampling stage coupled to the second integrator stage and configured to sample the second integrated signal received from the second integrator stage at a sample frequency and to generated a logic signal, and a non-linear feed-forward signal path coupled between the first integrator stage and the sampling stage.

Abstract: A noise shaped differential amplifier having a reduced common mode signal in accordance with an embodiment of the invention is described. In the described embodiment, the noise shaped differential amplifier includes a noise shaper having a common mode signal controlled by an attenuation operational amplifier that is coupled to a voltage divider circuit and a sense resistor divider. In this arrangement, the attenuation operational amplifier controls a virtual ground applied to the sense resistor divider.

Abstract: A mixed signal processing unit with non-linear feedforward paths to improve total harmonic distortion (THD) and noise characteristics of the processor. Specifically the signal processing unit includes a first integrator stage configured to receive an input signal and configured to generate a first integrated signal in response thereto, a second integrator stage coupled to the first integrator stage and configured to generate a second integrated signal from the first integrated signal, a sampling stage coupled to the second integrator stage and configured to sample the second integrated signal received from the second integrator stage at a sample frequency and to generated a logic signal, and a non-linear feed-forward signal path coupled between the first integrator stage and the sampling stage.

Abstract: A switching amplifier is described which includes an input stage having a first node associated therewith and a power stage having a second node associated therewith. An actual loop delay is defined with reference to the first and second nodes. Delay detection circuitry compares the actual loop delay to a reference loop delay. A dynamic delay line controlled by the delay detection circuitry controls the actual loop delay to correspond to the reference loop delay.

Abstract: A modulator loop is described having an associated band pass frequency range and including a switching stage having a first delay associated therewith. The modulator loop also includes a modulator stage having a feedback input. The output of the modulator stage is coupled to the input of the switching stage. A first feedback path is coupled between the output of the switching stage and the modulator stage. A notch filter corresponding to the band pass frequency range is coupled between the output of the modulator stage and the feedback input of the modulator stage for compensating for the first delay.

Abstract: A noise shaped differential amplifier having a reduced common mode signal in accordance with an embodiment of the invention is described. In the described embodiment, the noise shaped differential amplifier includes a noise shaper having a common mode signal controlled by an attenuation operational amplifier that is coupled to a voltage divider circuit and a sense resistor divider. In this arrangement, the attenuation operational amplifier controls a virtual ground applied to the sense resistor divider.

Abstract: A bandpass amplifier for use in a communication system is described. The amplifier includes first and second first-order filters, first and second multipliers, a quantizer, and a driver. In one embodiment, the first and second first-order filters are coupled in series. The first multiplier multiplies a signal from the first first-order filter by a coefficient k1, and the second multiplier multiplies a signal from the second first-order filter by a coefficient k2. The quantizer quantizes a summation of the signals from the first and second multipliers into one of two values, thereby generating a quantized signal. The driver amplifies the quantized signal, and generating an output signal. At least one of the coefficients k1 and k2 is adjusted based on a level of the output signal.

Abstract: Methods and apparatus are described for reducing or eliminating break-before-make distortion in switching amplifiers. A switching amplifier has an input stage for generating a switching signal. Break-before-make distortion compensation circuitry alters the switching signal. Break-before-make generator circuitry generates two drive signals from the altered switching signal. A power stage includes two switches which are alternately driven by the two drive signals. Break-before-make distortion detection circuitry detects a distortion pattern at the power stage output node and controls the break-before-make distortion compensation circuitry to alter the switching signal in response to the distortion pattern detected to thereby eliminate at least some break-before-make distortion.

Abstract: A switching amplifier is described which includes an input stage having a first node associated therewith and a power stage having a second node associated therewith. An actual loop delay is defined with reference to the first and second nodes. Delay detection circuitry compares the actual loop delay to a reference loop delay. A dynamic delay line controlled by the delay detection circuitry controls the actual loop delay to correspond to the reference loop delay.