Patents by Inventor Caspar Leendertz

Caspar Leendertz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11552172
    Abstract: First dopants are implanted through a larger opening of a first process mask into a silicon carbide body, wherein the larger opening exposes a first surface section of the silicon carbide body. A trench is formed in the silicon carbide body in a second surface section exposed by a smaller opening in a second process mask. The second surface section is a sub-section of the first surface section. The larger opening and the smaller opening are formed self-aligned to each other. At least part of the implanted first dopants form at least one compensation layer portion extending parallel to a trench sidewall.
    Type: Grant
    Filed: July 11, 2020
    Date of Patent: January 10, 2023
    Assignee: Infineon Technologies AG
    Inventors: Caspar Leendertz, Romain Esteve, Moriz Jelinek, Anton Mauder, Hans-Joachim Schulze, Werner Schustereder
  • Patent number: 11552173
    Abstract: A silicon carbide device includes a stripe-shaped trench gate structure extending from a first surface into a silicon carbide body. The gate structure has a gate length along a lateral first direction. A bottom surface and an active first gate sidewall of the gate structure are connected via a first bottom edge of the gate structure. The silicon carbide device further includes at least one source region of a first conductivity type. A shielding region of a second conductivity type is in contact with the first bottom edge of the gate structure across at least 20% of the gate length.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: January 10, 2023
    Assignee: Infineon Technologies AG
    Inventors: Caspar Leendertz, Thomas Basler, Paul Ellinghaus, Rudolf Elpelt, Michael Hell, Jens Peter Konrath, Shiqin Niu, Dethard Peters, Konrad Schraml, Bernd Leonhard Zippelius
  • Patent number: 11552170
    Abstract: A semiconductor device includes a silicon carbide semiconductor body. A first shielding region of a first conductivity type is connected to a first contact at a first surface of the silicon carbide semiconductor body. A current spread region of a second conductivity type is connected to a second contact at a second surface of the silicon carbide semiconductor body. A doping concentration profile of the current spread region includes peaks along a vertical direction perpendicular to the first surface. A doping concentration of one peak or one peak-group of the peaks is at least 50% higher than a doping concentration of any other peak of the current spread region. A vertical distance between the one peak or the one peak-group of the current spread region and the first surface is larger than a second vertical distance between the first surface and a maximum doping peak of the first shielding region.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: January 10, 2023
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Michael Hell, Rudolf Elpelt, Thomas Ganner, Caspar Leendertz
  • Patent number: 11462611
    Abstract: A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: October 4, 2022
    Assignee: Infineon Technologies AG
    Inventors: Thomas Aichinger, Wolfgang Bergner, Paul Ellinghaus, Rudolf Elpelt, Romain Esteve, Florian Grasse, Caspar Leendertz, Shiqin Niu, Dethard Peters, Ralf Siemieniec, Bernd Zippelius
  • Patent number: 11404370
    Abstract: A semiconductor device is provided. In an embodiment, the semiconductor device comprises a control region, a first power region, a second power region, an isolation region and/or a short circuit structure. The control region comprises a control terminal. The first power region comprises a first power terminal. The second power region comprises a second power terminal. The isolation region is between the control region and the first power region. The short circuit structure extends from the first power region, through the isolation region, to the control region. The short circuit structure is configured to form a low-resistive connection between the control region and the first power region during a failure state of the semiconductor device.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: August 2, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Basler, Andreas Huerner, Caspar Leendertz, Dethard Peters
  • Patent number: 11380756
    Abstract: A silicon carbide device includes a silicon carbide body including a source region of a first conductivity type, a cathode region of the first conductivity type and separation regions of a second conductivity type. A stripe-shaped gate structure extends along a first direction and adjoins the source region and the separation regions. The silicon carbide device includes a first load electrode. Along the first direction, the cathode region is between two separation regions of the separation regions and at least one separation region of the separation regions is between the cathode region and the source region. The source region and the first load electrode form an ohmic contact. The first load electrode and the cathode region form a Schottky contact.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: July 5, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Caspar Leendertz, Rudolf Elpelt, Romain Esteve, Thomas Ganner, Jens Peter Konrath, Larissa Wehrhahn-Kilian
  • Publication number: 20220199765
    Abstract: A semiconductor device includes: a SiC substrate; a device structure in or on the SiC substrate and subject to an electric field during operation of the semiconductor device; a current-conduction region of a first conductivity type in the SiC substrate below and adjoining the device structure; and a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field. The shielding region has a higher net doping concentration than the current-conduction region, and has a length (L) measured from a first position which corresponds to a bottom of the device structure to a second position which corresponds to a bottom of the shielding region. The current-conduction region has a width (d) measured between opposing lateral sides of the current-conduction region, and L/d is in a range of 1 to 10.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Inventors: Michael Hell, Rudolf Elpelt, Caspar Leendertz
  • Publication number: 20220199766
    Abstract: A semiconductor device includes: a SiC substrate; a device structure in or on the SiC substrate and subject to an electric field during operation of the semiconductor device; a current-conduction region of a first conductivity type in the SiC substrate adjoining the device structure; and a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field. The shielding region has a higher net doping concentration than the current-conduction region, and has a length (L) measured from a first position which corresponds to a bottom of the device structure to a second position which corresponds to a bottom of the shielding region. The current-conduction region has a width (d) measured between opposing lateral sides of the current-conduction region, and L/d is in a range of 1 to 10.
    Type: Application
    Filed: October 20, 2021
    Publication date: June 23, 2022
    Inventors: Michael Hell, Rudolf Elpelt, Caspar Leendertz
  • Patent number: 11367775
    Abstract: A semiconductor device includes: a SiC substrate; a device structure in or on the SiC substrate and subject to an electric field during operation of the semiconductor device; a current-conduction region of a first conductivity type in the SiC substrate below and adjoining the device structure; and a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field. The shielding region has a higher net doping concentration than the current-conduction region, and has a length (L) measured from a first position which corresponds to a bottom of the device structure to a second position which corresponds to a bottom of the shielding region. The current-conduction region has a width (d) measured between opposing lateral sides of the current-conduction region, and L/d is in a range of 1 to 10.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: June 21, 2022
    Assignee: Infineon Technologies AG
    Inventors: Michael Hell, Rudolf Elpelt, Caspar Leendertz
  • Publication number: 20220149156
    Abstract: A semiconductor device includes: a silicon carbide semiconductor body having a source region of a first conductivity type and a body region of a second conductivity type; and a trench structure extending from a first surface into the silicon carbide semiconductor body along a vertical direction, the trench structure having a gate electrode and a gate dielectric. The trench structure is stripe-shaped and runs along a longitudinal direction that is perpendicular to the vertical direction. The source region includes a first source sub-region and a second source sub-region alternately arranged along the longitudinal direction. A doping concentration profile of the first source sub-region along the vertical direction differs from a doping concentration profile of the second source sub-region along the vertical direction. A corresponding method of manufacturing the semiconductor device is also described.
    Type: Application
    Filed: January 25, 2022
    Publication date: May 12, 2022
    Inventors: Thomas Basler, Caspar Leendertz, Hans-Joachim Schulze
  • Patent number: 11322596
    Abstract: An embodiment of a semiconductor device comprises a SiC semiconductor body, a gate dielectric and a gate electrode. A first trench extends from a first surface of the SiC semiconductor body into the SiC semiconductor body. A junction material is in the first trench, wherein the junction material and the SiC semiconductor body form a diode.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: May 3, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Jens Peter Konrath, Caspar Leendertz, Larissa Wehrhahn-Kilian
  • Patent number: 11276754
    Abstract: An embodiment of a semiconductor device includes a silicon carbide semiconductor body including source and body regions of opposite conductivity types. A trench structure extends from a first surface into the silicon carbide semiconductor body along a vertical direction, and includes a gate electrode and a gate dielectric. A contact is electrically connected to the source region at the first surface. The source region includes a first source sub-region directly adjoining the contact at a source contact area of the first surface, a second source sub-region, and a third source sub-region. The second sub-region is arranged between the first and third sub-regions along the vertical direction. A doping concentration profile along the vertical direction of the source region includes a doping concentration minimum in the second sub-region and a doping concentration maximum in the third sub-region. Each of the second and third sub-regions overlaps with the source contact area.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: March 15, 2022
    Assignee: Infineon Technologies AG
    Inventors: Thomas Basler, Caspar Leendertz, Hans-Joachim Schulze
  • Publication number: 20220059687
    Abstract: According to an embodiment of a semiconductor device, the device includes: a plurality of device cells formed in a semiconductor substrate, each device cell including a transistor structure and a Schottky diode structure; and a superjunction structure that includes alternating regions of a first conductivity type and of a second conductivity type formed in the semiconductor substrate. For each transistor structure, a channel region of the transistor structure and a Schottky metal region of an adjacent one of the Schottky diode structures are interconnected by semiconductor material of the first conductivity type without interruption by any of the regions of the second conductivity type of the superjunction structure, the semiconductor material of the first conductivity type including one or more of the regions of the first conductivity type of the superjunction structure.
    Type: Application
    Filed: August 20, 2020
    Publication date: February 24, 2022
    Inventors: Michael Hell, Rudolf Elpelt, Caspar Leendertz
  • Publication number: 20220028980
    Abstract: A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body, the trench structure having a gate electrode that is dielectrically insulated from the semiconductor body, a shielding region adjoining a bottom of the trench structure and forming a first pn junction with a drift structure of the semiconductor body, a body region forming a second pn junction with the drift structure, a source zone arranged between the first surface and the body region and forming a third pn junction with the source zone, wherein a contact portion of the body region extends to the first surface, wherein the source zone surrounds the contact portion of the body region at the first surface, and wherein the trench structure forms an enclosed loop at the first surface that surrounds the source zone and the contact portion of the body region at the first surface.
    Type: Application
    Filed: October 7, 2021
    Publication date: January 27, 2022
    Inventors: Andreas Meiser, Caspar Leendertz, Anton Mauder, Roland Rupp
  • Patent number: 11177354
    Abstract: A method of manufacturing a silicon carbide device includes: forming a trench in a process surface of a silicon carbide substrate that has a body layer forming second pn junctions with a drift layer structure, wherein the body layer is between the process surface and the drift layer structure and wherein the trench exposes the drift layer structure; implanting dopants through a bottom of the trench to form a shielding region that forms a first pn junction with the drift layer structure; forming dielectric spacers on sidewalls of the trench; and forming a buried portion of an auxiliary electrode in a bottom section of the trench, the buried portion adjoining the shielding region.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: November 16, 2021
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Caspar Leendertz, Anton Mauder, Roland Rupp
  • Publication number: 20210343835
    Abstract: A semiconductor component includes: gate structures extending from a first surface into an SiC semiconductor body; a drift zone of a first conductivity type formed in the SiC semiconductor body; first mesas and second mesas arranged between the gate structures in the SiC semiconductor body; body areas of a second conductivity type arranged in the first mesas and the second mesas, the body areas each adjoining a first side wall of one of the gate structures; first shielding areas of the second conductivity type adjoining a second side wall of one of the gate structures; second shielding areas of the second conductivity type adjoining the body areas in the second mesas; and diode areas of the conductivity type of the drift zone, the diode areas forming Schottky contacts with a load electrode between the first shielding areas and the second shielding areas.
    Type: Application
    Filed: July 14, 2021
    Publication date: November 4, 2021
    Inventors: Ralf Siemieniec, Thomas Aichinger, Thomas Basler, Wolfgang Bergner, Rudolf Elpelt, Romain Esteve, Michael Hell, Daniel Kueck, Caspar Leendertz, Dethard Peters, Hans-Joachim Schulze
  • Publication number: 20210313460
    Abstract: A power semiconductor switch includes an active cell region with a drift region, an edge termination region, and IGBT cells within the active cell region. Each IGBT cell includes trenches that extend into the drift region and laterally confine mesas. At least one control trench has a control electrode for controlling the load current. At least one dummy trench has a dummy electrode electrically coupled to the control electrode. At least one further trench has a further trench electrode. At least one active mesa is electrically connected to a first load terminal within the active cell region. Each control trench is arranged adjacent to no more than one active mesa. At least one inactive mesa is adjacent to the dummy trench. A cross-trench structure merges each control trench, dummy trench and further trench to each other. The cross-trench structure overlaps at least partially along a vertical direction with the trenches.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Matteo Dainese, Alexander Philippou, Markus Beninger-Bina, Ingo Dirnstorfer, Erich Griebl, Christian Jaeger, Johannes Georg Laven, Caspar Leendertz, Frank Dieter Pfirsch
  • Patent number: 11121220
    Abstract: A semiconductor device includes a silicon carbide semiconductor body including a source region of a first conductivity type, a body region of a second conductivity type, shielding regions of the second conductivity type and compensation regions of the second conductivity type. Trench structures extend from a first surface into the silicon carbide semiconductor body along a vertical direction. Each of the trench structures includes an auxiliary electrode at a bottom of the trench structure and a gate electrode between the auxiliary electrode and the first surface. The auxiliary electrode is electrically insulated from the gate electrode. The auxiliary electrode of each of the trench structures is adjoined by at least one of the shielding regions at the bottom of the trench structure. Each of the shielding regions is adjoined by at least one of the compensation regions at the bottom of the shielding region.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: September 14, 2021
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Caspar Leendertz, Anton Mauder, Roland Rupp
  • Patent number: 11101343
    Abstract: A semiconductor component has a gate structure that extends from a first surface into an SiC semiconductor body. A body area in the SiC semiconductor body adjoins a first side wall of the gate structure. A first shielding area and a second shielding area of the conductivity type of the body area have at least twice as high a level of doping as the body area. A diode area forms a Schottky contact with a load electrode between the first shielding area and the second shielding area.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: August 24, 2021
    Assignee: Infineon Technologies AG
    Inventors: Ralf Siemieniec, Thomas Aichinger, Thomas Basler, Wolfgang Bergner, Rudolf Elpelt, Romain Esteve, Michael Hell, Daniel Kueck, Caspar Leendertz, Dethard Peters, Hans-Joachim Schulze
  • Patent number: 11075290
    Abstract: A power semiconductor device includes an active region surrounded by an inactive termination region each formed by part of a semiconductor body. The active region conducts load current between first and second load terminals. At least one power cell has trenches extending into the semiconductor body adjacent to each other along a first lateral direction and having a stripe configuration that extends along a second lateral direction into the active region. The trenches spatially confine a plurality of mesas each having at least one first type mesa electrically connected to the first load terminal and configured to conduct at least a part of the load current, and at least one second type mesa configured to not conduct the load current. A decoupling structure separates at least one of the second type mesas into a first section in the active region and a second section in the termination region.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: July 27, 2021
    Assignees: Infineon Technologies AG, Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Matteo Dainese, Alexander Philippou, Markus Bina, Ingo Dirnstorfer, Erich Griebl, Christian Jaeger, Johannes Georg Laven, Caspar Leendertz, Frank Dieter Pfirsch