Abstract: A silicon carbide device includes a silicon carbide body including a source region of a first conductivity type, a cathode region of the first conductivity type and separation regions of a second conductivity type. A stripe-shaped gate structure extends along a first direction and adjoins the source region and the separation regions. The silicon carbide device includes a first load electrode. Along the first direction, the cathode region is between two separation regions of the separation regions and at least one separation region of the separation regions is between the cathode region and the source region. The source region and the first load electrode form an ohmic contact. The first load electrode and the cathode region form a Schottky contact.

Abstract: A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.

Abstract: A semiconductor device includes a silicon carbide semiconductor body including a source region of a first conductivity type, a body region of a second conductivity type, shielding regions of the second conductivity type and compensation regions of the second conductivity type. Trench structures extend from a first surface into the silicon carbide semiconductor body along a vertical direction. Each of the trench structures includes an auxiliary electrode at a bottom of the trench structure and a gate electrode between the auxiliary electrode and the first surface. The auxiliary electrode is electrically insulated from the gate electrode. The auxiliary electrode of each of the trench structures is adjoined by at least one of the shielding regions at the bottom of the trench structure. Each of the shielding regions is adjoined by at least one of the compensation regions at the bottom of the shielding region.

Abstract: A power semiconductor switch includes a cross-trench structure associated with at least one IGBT cell. The cross-trench structure merge at least one control trench, at least one dummy trench and at least one further trench of at least one IGBT cell to each other. The cross-trench structure overlaps at least partially along a vertical direction with trenches of the at least one IGBT-cell.

Abstract: Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.

Abstract: Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.

Abstract: A method of manufacturing a silicon carbide device includes: forming a trench in a process surface of a silicon carbide substrate that has a body layer forming second pn junctions with a drift layer structure, wherein the body layer is between the process surface and the drift layer structure and wherein the trench exposes the drift layer structure; implanting dopants through a bottom of the trench to form a shielding region that forms a first pn junction with the drift layer structure; forming dielectric spacers on sidewalls of the trench; and forming a buried portion of an auxiliary electrode in a bottom section of the trench, the buried portion adjoining the shielding region.

Abstract: A power semiconductor device having an IGBT-configuration includes at least one power cell. Each power cell includes at least three trenches arranged laterally adjacent to each other. Each trench extends into a semiconductor body along a vertical direction and includes an insulator that insulates a respective electrode from the semiconductor body. The at least three trenches include at least one control trench whose electrode is electrically coupled to a control terminal, and a source trench whose electrode is electrically coupled to a first load terminal. An active mesa for conduction of at least a part of the load current is laterally confined at least by one of the at least one control trench and includes at least a respective section of each of a source region and a channel region. An auxiliary mesa is laterally confined by the source trench and one of the at least one control trench.

Abstract: A silicon carbide substrate has a trench extending from a main surface of the silicon carbide substrate into the silicon carbide substrate. The trench has a trench width at a trench bottom. A shielding region is formed in the silicon carbide substrate. The shielding region extends along the trench bottom. In at least one doping plane extending approximately parallel to the trench bottom, a dopant concentration in the shielding region over a lateral first width deviates by not more than 10% from a maximum value of the dopant concentration. The first width is less than the trench width and is at least 30% of the trench width.

Abstract: A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body. The trench structure includes an auxiliary electrode at a bottom of the trench structure and a gate electrode arranged between the auxiliary electrode and the first surface. A shielding region adjoins the auxiliary electrode at the bottom of the trench structure and forms a first pn junction with a drift structure. A corresponding method of manufacturing the semiconductor device is also described.

Abstract: According to an embodiment of a semiconductor device, the device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. Rows of source regions of a first conductivity type are formed in the SiC substrate and extend lengthwise in parallel in a second direction which is transverse to the first direction. Rows of body regions of a second conductivity type opposite the first conductivity type are formed in the SiC substrate below the rows of source regions. Rows of body contact regions of the second conductivity type are formed in the SiC substrate. The rows of body contact regions extend lengthwise in parallel in the second direction. First shielding regions of the second conductivity type are formed deeper in the SiC substrate than the rows of body regions.

Abstract: An embodiment of a semiconductor device comprises a SiC semiconductor body, a gate dielectric and a gate electrode. A first trench extends from a first surface of the SiC semiconductor body into the SiC semiconductor body. A junction material is in the first trench, wherein the junction material and the SiC semiconductor body form a diode.

Abstract: A semiconductor component has a gate structure that extends from a first surface into an SiC semiconductor body. A body area in the SiC semiconductor body adjoins a first side wall of the gate structure. A first shielding area and a second shielding area of the conductivity type of the body area have at least twice as high a level of doping as the body area. A diode area forms a Schottky contact with a load electrode between the first shielding area and the second shielding area.

Abstract: A power semiconductor device includes an active region surrounded by an inactive termination region each formed by part of a semiconductor body. The active region conducts load current between first and second load terminals. At least one power cell has trenches extending into the semiconductor body adjacent to each other along a first lateral direction and having a stripe configuration that extends along a second lateral direction into the active region. The trenches spatially confine a plurality of mesas each having at least one first type mesa electrically connected to the first load terminal and configured to conduct at least a part of the load current, and at least one second type mesa configured to not conduct the load current. A decoupling structure separates at least one of the second type mesas into a first section in the active region and a second section in the termination region.

Abstract: A power semiconductor device having an IGBT-configuration includes at least one power cell. Each power cell includes at least three trenches arranged laterally adjacent to each other. Each trench extends into a semiconductor body along a vertical direction and includes an insulator that insulates a respective electrode from the semiconductor body. The at least three trenches include at least one control trench whose electrode is electrically coupled to a control terminal, and a source trench whose electrode is electrically coupled to a first load terminal. An active mesa for conduction of at least a part of the load current is laterally confined at least by one of the at least one control trench and includes at least a respective section of each of a source region and a channel region. An auxiliary mesa is laterally confined by the source trench and one of the at least one control trench.

Abstract: A semiconductor device includes a transistor. The transistor includes a drift region of a first conductivity type in a semiconductor substrate having a first main surface, a body region of a second conductivity type between the drift region and the first main surface, and a plurality of trenches in the first main surface and patterning the semiconductor substrate into a plurality of mesas including a first mesa and a dummy mesa. The plurality of trenches includes at least one active trench. The first mesa is arranged at a first side of the active trench, and the dummy mesa is arranged at a second side of the active trench. A gate electrode is arranged in the active trench, and a source region of the first conductivity type is in the first mesa. A one-sided channel of the transistor is configured to be formed in the first mesa.

Abstract: A power semiconductor device includes an active region surrounded by an inactive termination region each formed by part of a semiconductor body. The active region conducts load current between first and second load terminals. At least one power cell has trenches extending into the semiconductor body adjacent to each other along a first lateral direction and having a stripe configuration that extends along a second lateral direction into the active region. The trenches spatially confine a plurality of mesas each having at least one first type mesa electrically connected to the first load terminal and configured to conduct at least a part of the load current, and at least one second type mesa configured to not conduct the load current. A decoupling structure separates at least one of the second type mesas into a first section in the active region and a second section in the termination region.

Abstract: A power semiconductor device includes an active cell region with a drift region, and IGBT cells at least partially arranged within the active cell region. Each IGBT cell includes at least one trench extending into the drift region along a vertical direction, an edge termination region surrounding the active cell region, and a transition region arranged between the active cell region and the edge termination region. The transition region has a width along a lateral direction from the active cell region towards the edge termination region. At least some of the IGBT cells are arranged within, or, respectively, extend into the transition region. An electrically floating barrier region of each IGBT cell is arranged within the active cell region and in contact with at least some of the trenches of the IGBT cells. The electrically floating barrier region does not extend into the transition region.

Abstract: A power semiconductor device includes an active region surrounded by an inactive termination region each formed by part of a semiconductor body. The active region conducts load current between first and second load terminals. At least one power cell has trenches extending into the semiconductor body adjacent to each other along a first lateral direction and having a stripe configuration that extends along a second lateral direction into the active region. The trenches spatially confine a plurality of mesas each having at least one first type mesa electrically connected to the first load terminal and configured to conduct at least a part of the load current, and at least one second type mesa configured to not conduct the load current. A decoupling structure separates at least one of the second type mesas into a first section in the active region and a second section in the termination region.

Abstract: A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body. The trench structure includes an auxiliary electrode at a bottom of the trench structure and a gate electrode arranged between the auxiliary electrode and the first surface. A shielding region adjoins the auxiliary electrode at the bottom of the trench structure and forms a first pn junction with a drift structure. A corresponding method of manufacturing the semiconductor device is also described.