Abstract: Methods, systems, and apparatus to facilitate high side control of a switching power converter are disclosed. An example apparatus includes a latch including a first node coupled to a first source of a first switch and an output coupled to a first gate of the first switch; a first diode coupled to the first node and a second node; a second diode coupled to the second node and ground; a second switch coupled to a voltage source and the second node; and a third switch including a third gate coupled to the second switch, a third source coupled to the second node, and a third drain coupled to the latch.

Abstract: In described examples, a first power switching circuit receives a power switching control signal and activates a first power switch in response to the power switching control signal. A second power switching circuit receives the power switching control, activates a second power switch in response to the power switching control signal, and determines a first power switching delay in response to temperature indications of the first and second power switches. The second power switching circuit activates the second power switch at a first delayed time after the activation of the first power switch, where the first delayed time follows the activation of the first power switch by the determined first power switching delay.

Abstract: Methods, systems, and apparatus to facilitate high side control of a switching power converter are disclosed. An example apparatus includes a latch including a first node coupled to a first source of a first switch and an output coupled to a first gate of the first switch; a first diode coupled to the first node and a second node; a second diode coupled to the second node and ground; a second switch coupled to a voltage source and the second node; and a third switch including a third gate coupled to the second switch, a third source coupled to the second node, and a third drain coupled to the latch.

Abstract: A current sensor includes a die and a shunt resistor having a first temperature coefficient and having a first node and a second node fabricated onto the die, wherein the shunt resistor is for passing the current that is to be sensed. A first compensation resistor is fabricated onto the die and is coupled to the first node of the shunt resistor, wherein the first compensation resistor is proximate the shunt resistor and has a temperature coefficient that is similar to the temperature coefficient of the shunt resistor. A second compensation resistor is fabricated onto the die and is coupled to the second node of the shunt resistor, wherein the second compensation resistor is proximate the shunt resistor and has a temperature coefficient that is the close to the temperature coefficient of the shunt resistor.

Abstract: In various embodiments, transactions initiated by or on behalf of users between client systems and transaction systems are sent to authorization systems for approval. An authorization system contacts one or more registered devices for approval from a user of the registered devices for the transactions initiated by or on behalf of the users that are being handled by the transaction systems. A registered device sends an approval or denial based on user input. The authorization server then sends the approval or denial to a transaction system to complete a transaction.

Abstract: A current sensor includes a die and a shunt resistor having a first temperature coefficient and having a first node and a second node fabricated onto the die, wherein the shunt resistor is for passing the current that is to be sensed. A first compensation resistor is fabricated onto the die and is coupled to the first node of the shunt resistor, wherein the first compensation resistor is proximate the shunt resistor and has a temperature coefficient that is similar to the temperature coefficient of the shunt resistor. A second compensation resistor is fabricated onto the die and is coupled to the second node of the shunt resistor, wherein the second compensation resistor is proximate the shunt resistor and has a temperature coefficient that is the close to the temperature coefficient of the shunt resistor.

Abstract: Current sensing through a power semiconductor device with reduced sensitivity to temperature and process variations. An example arrangement includes a power switch coupled between a voltage input and an output voltage terminal supplying current to a load; a first isolation switch coupled between the voltage input and a first node; a comparator amplifier having a pair of differential inputs coupled to the first node and a second node outputting a voltage in response to the difference at the differential inputs; and a first current source coupled between a positive supply voltage and the first node to output a first current responsive to the voltage output from the comparator amplifier; wherein the first current is proportional to the current through the power switch and a ratio of the on resistance of the power switch and the on resistance of the first isolation switch. Methods and additional arrangements are also disclosed.

Abstract: Current sensing through a power semiconductor device with reduced sensitivity to temperature and process variations. An example arrangement includes a power switch coupled between a voltage input and an output voltage terminal supplying current to a load; a first isolation switch coupled between the voltage input and a first node; a comparator amplifier having a pair of differential inputs coupled to the first node and a second node outputting a voltage in response to the difference at the differential inputs; and a first current source coupled between a positive supply voltage and the first node to output a first current responsive to the voltage output from the comparator amplifier; wherein the first current is proportional to the current through the power switch and a ratio of the on resistance of the power switch and the on resistance of the first isolation switch. Methods and additional arrangements are also disclosed.

Abstract: A circuit includes an amplifier output stage that includes a high switch and a low switch that generates a pulse width modulated (PWM) output signal to provide a load current to a load in response to a PWM input signal. The circuit includes a high gate drive that drives the high switch with a PWM high drive signal derived from the PWM input signal. This includes a low gate drive that drives the low switch with a PWM low drive signal derived from the PWM input signal. The circuit includes an edge corrector that adjusts at least one of a leading edge and a trailing edge of the PWM input signal to compensate for response time differences with respect to a direction of the load current to the load.

Abstract: A circuit includes an amplifier output stage that includes a high switch and a low switch that generates a pulse width modulated (PWM) output signal to provide a load current to a load in response to a PWM input signal. The circuit includes a high gate drive that drives the high switch with a PWM high drive signal derived from the PWM input signal. This includes a low gate drive that drives the low switch with a PWM low drive signal derived from the PWM input signal. The circuit includes an edge corrector that adjusts at least one of a leading edge and a trailing edge of the PWM input signal to compensate for response time differences with respect to a direction of the load current to the load.

Abstract: A current sensor includes a die and a shunt resistor having a first temperature coefficient and having a first node and a second node fabricated onto the die, wherein the shunt resistor is for passing the current that is to be sensed. A first compensation resistor is fabricated onto the die and is coupled to the first node of the shunt resistor, wherein the first compensation resistor is proximate the shunt resistor and has a temperature coefficient that is similar to the temperature coefficient of the shunt resistor. A second compensation resistor is fabricated onto the die and is coupled to the second node of the shunt resistor, wherein the second compensation resistor is proximate the shunt resistor and has a temperature coefficient that is the close to the temperature coefficient of the shunt resistor.

Abstract: The present system and method uses multiple digital devices with possibly different users operating in concert, for performing authentication and other cryptographic operations. The multiple digital devices include, for example, a mobile device such as a cellular phone, as a central building block.

Abstract: A system for generating a computing system specific value comprising, a computing system not comprising any specialized hardware to generate a device specific value, a software product tangibly embodied in a machine-readable medium, comprising instructions operable to cause computing system to perform operations comprising: generating a digital value which is substantially dependent on manufacturing variation among like devices of computing system.

Abstract: A system for generating a computing system specific value comprising, a computing system not comprising any specialized hardware to generate a device specific value, a software product tangibly embodied in a machine-readable medium, comprising instructions operable to cause computing system to perform operations comprising: generating a digital value which is substantially dependent on manufacturing variation among like devices of computing system.

Abstract: The present system and method uses multiple digital devices with possibly different users operating in concert, for performing authentication and other cryptographic operations. The multiple digital devices include, for example, a mobile device such as a cellular phone, as a central building block.

Abstract: Hardware and/or software countermeasures are provided to reduce or eliminate vulnerabilities due to the observable and/or predictable states and state transitions of microprocessor components such as instruction cache, data cache, branch prediction unit(s), branch target buffer(s) and other components. For example, for branch prediction units, various hardware and/or software countermeasures are provided to reduce vulnerabilities in the branch prediction unit (BPU) and to protect against the security vulnerabilities due the observable and/or predictable states and state transitions during BPU operations.

Abstract: One-sided pulse width modulated (PWM) amplifiers are disclosed.

Abstract: These various embodiments pertain to an FET having a plurality of fingers as correspond to the FET's source and drain. A first conductive lead electrically couples to a given one of this plurality of fingers while a second conductive lead electrically couples as well to this same given finger. A measurement component connects to these first and second conductive leads to measure at least one electrical parameter (such as voltage). By one approach, the first and second conductive leads physically connect to opposing ends of the given finger. These teachings will also accommodate providing a control component that is responsive to the measurement component to facilitate automatically controlling at least one operating state of the FET as a function, at least in part, of the measured electrical parameter.

Abstract: One-sided pulse width modulated (PWM) amplifiers are disclosed.

Abstract: Methods and apparatus to reduce voltage bounces and spike voltages in switching amplifiers are disclosed. An example method of removing a substrate current from a substrate disclosed herein comprises injecting the substrate current via turning on an active device, forming a low impedance path to ground via a substrate clamp based on the substrate current, and removing the substrate current from the substrate via the substrate clamp.