Abstract: The present invention relates to a method for forming an isolation film in a semiconductor device. After a trench for isolation is formed, a polymer film is stripped by a post cleaning process using BFN. A pre-treatment cleaning process using only SC-1 is performed and a sidewall oxidization process is then carried out. It is therefore possible to improve fail of the roughness of the trench sidewall and to easily strip polymer. Furthermore, since a conventional PET process is omitted, an isolation film manufacturing process is simplified. It is also possible to prohibit out-diffusion of dopants injected into a semiconductor substrate through a pre-treatment cleaning process using CLN N before the sidewall oxidization process. Incidentally, by forming a slope at the top corner of the trench, it is possible to prevent a gate oxide film thinning phenomenon that the gate oxide film thinner than a desired thickness is deposited at the trench corner.

Abstract: A method of fabricating a flash memory devices disclosed wherein, upon formation of sidewall oxide films, a regrown thickness of a screen oxide film is controlled. The width of an element isolation film is reduced by means of an etch process for removing the re-growth oxide film. This allows a floating gate space to be easily secured, and a thickness of the sidewall oxide films is reduced by means of a liner nitride film pre-treatment cleaning process. It is thus possible to secure the trench space, which facilitates gap-filling.

Abstract: A method of fabricating a flash memory devices disclosed wherein, upon formation of sidewall oxide films, a regrown thickness of a screen oxide film is controlled. The width of an element isolation film is reduced by means of an etch process for removing the re-growth oxide film. This allows a floating gate space to be easily secured, and a thickness of the sidewall oxide films is reduced by means of a liner nitride film pre-treatment cleaning process. It is thus possible to secure the trench space, which facilitates gap-filling.

Abstract: Disclosed is a method for manufacturing a capacitor of a semiconductor device. The method includes the steps of providing a substrate having a storage node plug, forming a PE-TEOS layer and a hard mask exposing a storage node contact area on the substrate, forming a storage node contact having a side profile of a positive and negative pattern through etching the PE-TEOS layer, removing the hard mask by etching-back the hard mask, performing an annealing process with respect to a resultant structure, forming a silicon layer on the silicon substrate, which passes through the annealing process, coating a photoresist film on an entire surface of the substrate, forming a storage node electrode by etching-back the photoresist film and the silicon layer, removing a remaining photoresist film, and forming a dielectric layer and a silicon layer on a storage node electrode structure.

Abstract: Disclosed is a method of manufacturing the flash memory device.

Abstract: Disclosed is a method of manufacturing a semiconductor device. A floating gate is formed and a nitrification process is then implemented. With the disclosed process, it is possible to improve the roughness of the top surface of the floating gate electrode. Furthermore, a nitrification process and a dielectric film formation process are implemented in-situ, which simplifies the manufacturing process.

Abstract: Disclosed herein is a method of forming a polysilicon film of a semiconductor device. Upon deposition process of a polysilicon film, the inflow of a gas is reduced to 150 sccm to 250 sccm to control abnormal deposition depending upon excessive inflow of the gas. Accordingly, the interfacial properties of the polysilicon film can be improved. It is thus possible to improve an operating characteristic of a device by prohibiting concentration of an electric field at the portion.

Abstract: The present invention is provided to form a floating gate of a flash memory device capable of restricting a thickness of a buffer oxide film to a thickness less than 50 ? to minimize increment in a thickness due to a wall oxidation process in the case of depositing the buffer oxide film prior to depositing the first polysilicon film and the pad nitride film, and reducing a thickness of the first polysilicon film with an HF dip time minimized in a pre-treatment cleaning process prior to depositing the second polysilicon film, and protecting the first polysilicon film from being attacked in a pad nitride film strip process, by removing at least 50% of the buffer oxide film in the pad nitride film strip process.

Abstract: The present invention relates to a method of manufacturing a flash memory cell capable of preventing an oxidation of a dielectric film between a floating gate and a control gate, in a manner that a polysilicon film for floating gate is deposited, nitrogen ions are injected to make amorphous and contaminate the surface of the polysilicon film.

Abstract: The present invention relates to a flash memory cell and method of manufacturing the same. The flash memory cell comprises a trench for defining a semiconductor substrate to be an active region and an inactive region, a trench insulating film burying the trench and having a given protrusion, an impurity region formed in the active region, a floating gate isolated by the protrusion and having rugged portions, and a dielectric film and a control gate formed on the floating gate. Therefore, the present invention can significantly simplify the process, improve the yield of a product and reduce the manufacturing cost.

Abstract: A method of forming an isolation layer in semiconductor devices is disclosed. The method includes forming the isolating film by means of a method in which a method of forming a V-type trench at the isolation region, implanting ions capable of accelerating oxidization action into the center portion of the V-type trench, implementing an oxidization process to form an insulating film consisting of an oxide film at the isolation region, and then completely burying the trench with an insulating material, using the LOCOS method, and a method of forming a trench type isolation layer, are applied together. Therefore, as the top corner of the trench is formed with an inclination, and a concentration of the electric field and a formation of a moat can be simultaneously prevented.

Abstract: The present invention is provided to form a floating gate of a flash memory device capable of restricting a thickness of a buffer oxide film to a thickness less than 50 Å to minimize increment in a thickness due to a wall oxidation process in the case of depositing the buffer oxide film prior to depositing the first polysilicon film and the pad nitride film, and reducing a thickness of the first polysilicon film with an HF dip time minimized in a pre-treatment cleaning process prior to depositing the second polysilicon film, and protecting the first polysilicon film from being attacked in a pad nitride film strip process, by removing at least 50% of the buffer oxide film in the pad nitride film strip process.

Abstract: The present invention relates to a method of forming a device isolation film in a semiconductor device. The present invention comprises the steps of; performing an ion implantation for controlling a threshold voltage on a surface of a semiconductor substrate; forming a trench to define an active region and a device isolation region by performing a photolithography process on the semiconductor substrate; performing an oxidation process for extremely prohibiting ions, which are implanted to control the threshold voltage, from diffusing to the device isolation region and forming a side wall oxidation film at the side wall of the trench; performing an ion implantation on the active region to compensate for ions for controlling the threshold voltage, which are diffused from the active region to the side wall oxidation film by the oxidation process; and forming a device isolation film by burying the oxidation film inside the trench.

Abstract: A method for forming a gate electrode in the semiconductor device is disclosed. The disclosed methods for forming a gate electrode in a semiconductor includes forming a polysilicon film and a metal silicide film sequentially on an upper portion of a semiconductor substrate; performing an annealing process to crystallize the metal silicide film, so that etch rate of the crystallized metal silicide film is similar to that of the polysilicon film; and forming a gate electrode by performing an etching process at one time on the metal silicide film and the polysilicon film using the similar etch rates of the crystallized metal silicide film and the polysilicon film. According to the disclosed methods, the tungsten silicide film is crystallized by an annealing process and the polysilicon film and the crystallized tungsten suicide film are etched at one time to prevent any formation of recesses of the polysilicon film, so that it is possible to form the gate electrode pattern having the vertical profile.

Abstract: The present invention relates to a method of forming a gate electrode in a semiconductor device. Upon deposition processes for forming doped and undoped polysilicon films constituting a gate electrode, the deposition processes are performed at different temperatures. Thus, generation of an alien substance on the surface of the doped polysilicon film can be prohibited. As a result, the gate electrode having no defect can be implemented.

Abstract: Provided is a method of forming a gate electrode in a flash memory device including the steps of sequentially forming a tunnel oxide film and an undoped first polysilicon film on a semiconductor substrate, forming a doped second polysilicon film having a given doping concentration on the undoped first polysilicon film, sequentially forming a dielectric film and a third polysilicon film on the results, patterning the results to form a floating gate electrode pattern, a dielectric film and a control gate electrode pattern, and performing an oxidization process for the results to form a sidewall oxide film in the floating gate electrode pattern and the sidewall of the control gate electrode pattern. As such, by using the second polysilicon film having the given doping concentration, a thickness of the sidewall oxide film formed at the gate electrode sidewall can be uniformly controlled. It is therefore possible to secure the CD of a gate electrode.

Abstract: Disclosed is a method of manufacturing a flash memory device. A sidewall oxidization process using a mixed gas of O2 and TCA is implemented to reinforce isolation of the floating gate, and prevent a phenomenon that the thickness of the sidewall of the oxide film included within the dielectric film is thickness and a phenomenon that the thickness of the sidewall of the tunnel oxide film is thickened.

Abstract: Disclosed is a method of forming an oxynitride film. The method comprises the steps of loading a silicon substrate into an oxidization furnace, implanting an oxygen based source gas into the oxidization furnace to grow a pure silicon oxide film on the silicon substrate, blocking implantation of the oxygen based source gas and implanting an inert gas to exhaust the oxygen based source gas remaining within the oxidization furnace, raising a temperature within the oxidization furnace to a nitrification process temperature, stabilizing the temperature within the oxidization furnace, implementing a nitrification process for the pure silicon oxide film by implanting a nitrogen based source gas, and stopping implantation of the nitrogen based source gas and rapidly cooling the oxidization furnace while implanting the inert gas into the oxidization furnace.

Abstract: Disclosed is a method of forming an isolation film in semiconductor devices using a shallow trench. Trenches are formed in silicon substrates of a memory cell region and a peripheral circuit region. The inert ion is then injected into the surface of the trench in the peripheral circuit region, thus forming an amorphous layer. Thereafter, an oxidization process is implemented so that a thick oxide film is grown due to excessive oxidization at the amorphous layer, thus making thicker the trench in the peripheral circuit region than the trench in the memory cell region by a thickness of the oxide film.

Abstract: Disclosed is a method of manufacturing the flash memory device.