Abstract: Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dice coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.

Abstract: A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.

Abstract: A stiffener molded to a semiconductor substrate, such as a lead frame, and methods of molding the stiffener to the substrate are provided. The stiffener is molded to the substrate to provide rigidity and support to the substrate. A stiffener material can comprise a polymeric material molded to the substrate by a molding technique such as transfer molding, injection molding, and spray molding, or using an encapsulating material. One or more dies, chips, or other semiconductor or microelectronic devices can be disposed on the substrate to form a die assembly. The stiffener can be molded to a substrate comprising one or more dies, over which an encapsulating material can be applied to produce a semiconductor die package.

Abstract: Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dice coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.

Abstract: Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dice coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.

Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.

Abstract: Memory devices, connectors and methods for terminating an operation are provided, including a memory device configured to terminate an internal operation such as a programming or erase operation responsive to receiving a signal during removal of the memory device from a connector, such as a socket. The memory device may be configured to generate the removal signal, such as by including a dedicated removal terminal. The memory card may respond to the signal by terminating a programming or erase operation before power is lost. The removal terminal may have a dimension that is different from a dimension of a power terminal. Alternatively, the connector may be configured to generate a signal that causes a host to terminate programming or erase operations prior to memory card removal, such as by including a switch that is actuated when the memory device moves to a pre-power loss position.

Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.

Abstract: Various embodiments for molding tools for moisture-resistant image sensor packaging structures and methods of assembly are disclosed. Image sensor packages of the present invention include an interposer, a housing structure formed on the interposer for surrounding an image sensor chip, and a transparent cover. The housing structure may cover substantially all of the interposer chip surface. In another embodiment, the housing structure also covers substantially all of the interposer edge surfaces. The housing structure may also cover substantially all of the interposer attachment surface. An image sensor chip is electrically connected to the interposer with sealed wire bond connections or with sealed flip-chip connections. The housing structure may include runners that enable simultaneous sealing of the interior of the image sensor package and of the transparent cover.

Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.

Abstract: A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.

Abstract: Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dice coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.

Abstract: Memory devices, connectors and methods for terminating an operation are provided, including a memory device configured to terminate an internal operation such as a programming or erase operation responsive to receiving a signal during removal of the memory device from a connector, such as a socket. The memory device may be configured to generate the removal signal, such as by including a dedicated removal terminal. The memory card may respond to the signal by terminating a programming or erase operation before power is lost. The removal terminal may have a dimension that is different from a dimension of a power terminal. Alternatively, the connector may be configured to generate a signal that causes a host to terminate programming or erase operations prior to memory card removal, such as by including a switch that is actuated when the memory device moves to a pre-power loss position.

Abstract: A stiffener molded to a semiconductor substrate, such as a lead frame, and methods of molding the stiffener to the substrate are provided. The stiffener is molded to the substrate to provide rigidity and support to the substrate. The stiffener material can comprise a polymeric material molded to the substrate by a molding technique such as transfer molding, injection molding, and spray molding, or using an encapsulating material. One or more dies, chips, or other semiconductor or microelectronic devices can be disposed on the substrate to form a die assembly. The stiffener can be molded to a substrate comprising one or more dies, over which an encapsulating material can be applied to produce a semiconductor die package.

Abstract: Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dices coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.

Abstract: Memory devices, connectors and methods for terminating an operation are provided, including a memory device configured to terminate an internal operation such as a programming or erase operation responsive to receiving a signal during removal of the memory device from a connector, such as a socket. The memory device may be specially configured to generate the removal signal, such as by including a dedicated removal terminal. The memory card may respond to the signal by terminating a programming or erase operation before power is lost. The removal terminal may have a dimension that is different from a dimension of a power terminal through which the memory device receives power. Alternatively, the connector may be specially configured to generate a signal that causes a host to terminate programming or erase operations in the memory device prior to memory card removal, such as by including a switch that is actuated when the memory device moves to a pre-power loss position.

Abstract: Various embodiments for molding tools for moisture-resistant image sensor packaging structures and methods of assembly are disclosed. Image sensor packages of the present invention include an interposer, a housing structure formed on the interposer for surrounding an image sensor chip, and a transparent cover. The housing structure may cover substantially all of the interposer chip surface. In another embodiment, the housing structure also covers substantially all of the interposer edge surfaces. The housing structure may also cover substantially all of the interposer attachment surface. An image sensor chip is electrically connected to the interposer with sealed wire bond connections or with sealed flip-chip connections. The housing structure may include runners that enable simultaneous sealing of the interior of the image sensor package and of the transparent cover.

Abstract: A stiffener molded to a semiconductor substrate, such as a lead frame, and methods of molding the stiffener to the substrate are provided. The stiffener is molded to the substrate to provide rigidity and support to the substrate. The stiffener material can comprise a polymeric material molded to the substrate by a molding technique such as transfer molding, injection molding, and spray molding, or using an encapsulating material. One or more dies, chips, or other semiconductor or microelectronic devices can be disposed on the substrate to form a die assembly. The stiffener can be molded to a substrate comprising one or more dies, over which an encapsulating material can be applied to produce a semiconductor die package.

Abstract: Various embodiments for molding tools for moisture-resistant image sensor packaging structures and methods of assembly are disclosed. Image sensor packages of the present invention include an interposer, a housing structure formed on the interposer for surrounding an image sensor chip, and a transparent cover. The housing structure may cover substantially all of the interposer chip surface. In another embodiment, the housing structure also covers substantially all of the interposer edge surfaces. The housing structure may also cover substantially all of the interposer attachment surface. An image sensor chip is electrically connected to the interposer with sealed wire bond connections or with sealed flip-chip connections. The housing structure may include runners that enable simultaneous sealing of the interior of the image sensor package and of the transparent cover.

Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.