Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.

Abstract: One embodiment of the present disclosure provides a condition detection see-through storage box that stores objects, the condition detection see-through storage box including a storage box body configured to store the objects, a sensor configured to detect a specific condition inside the storage box, a door that is installed on the storage box body and has a transmission window, a light emitting module configured to increase an amount of emitted light according to a signal from the sensor, which has detected the specific condition inside the storage box, to increase an amount of light that is reflected from inside the storage box and heads toward the transmission window, and an optical film provided on the transmission window, thereby informing a user of the specific condition inside the storage box body, wherein the optical film has a light transmittance that prevents the storage box from being see-through from the outside before the sensor detects the specific condition and allows the storage box to be see-

Abstract: A display apparatus can include a first thin-film transistor including a first active layer having a first polysilicon material, a first gate electrode overlapping the first active layer, a first electrode and a second electrode; a second thin-film transistor including a second active layer having an oxide semiconductor, a second gate electrode overlapping the second active layer, a third electrode and a fourth electrode; and a first emitting electrode of a light emitting element electrically connected to the second electrode of the first thin-film transistor. Also, one end of the first active layer having the first polysilicon material is electrically connected to one or the other end of the second active layer having the oxide semiconductor.

Abstract: A display apparatus including a first thin-film transistor, a second thin-film transistor and a third thin-film transistor is provided. The first thin-film transistor includes a first active layer composed of a polysilicon material, a first gate electrode overlapping the first active layer such that a first gate insulating layer is interposed therebetween, a first source electrode and a first drain electrode. The first gate electrode includes n layers. The first source electrode and the first drain electrode are connected to the first active layer. The second thin-film transistor includes a second active layer composed of a polysilicon material, a second gate electrode overlapping the second active layer such that a first gate insulating layer is interposed therebetween, a second source electrode and a second drain electrode. The second gate electrode includes n+1 layers. The second source electrode and the second drain electrode are connected to the second active layer.

Abstract: In order to permit dense integration of a high number of stacked word lines in the semiconductor memory device, a charge pump is included in the semiconductor memory device. The charge pump makes use of a capacitor. The capacitor is implemented with respect to the dense integration. Some components are placed under the stacked word lines, and some are not under the stacked word lines. The capacity of the capacitor not under the stacked word lines is provided in part by a parallel structure.

Abstract: A memory device includes nonvolatile memory cells, and a secure module to process first data including information about the device stored in the cells to generate a first password key, process second data including information about the device stored in the cells to generate a second password key, generate a public key and a secret key by a public-key cryptography algorithm, using the first password key and the second password key, and provide the first password key, the second password key, the public key, and the secret key to the cells to store the first password key, the second password key, the public key, and the secret key, where the second data is different from the first data, a value of the first password key value and a value of the second password key are prime numbers, and the public key is provided to a host connected to the device.

Abstract: A display apparatus includes an oxide semiconductor pattern disposed on a device substrate and including a channel region disposed between a source region and a drain region, a gate electrode overlapping the channel region of the oxide semiconductor pattern and having a structure in which a first hydrogen barrier layer and a gate conductive layer are stacked, and a gate insulating film disposed between the oxide semiconductor pattern and the gate electrode to expose the source region and the drain region of the oxide semiconductor pattern. The gate electrode exposes a portion of the gate insulating film that is adjacent to the source region and a portion of the gate insulating film that is adjacent to the drain region.

Abstract: A non-volatile memory includes a first semiconductor layer vertically stacked on a second semiconductor layer and including a first memory group, a second memory group, a third memory group and a fourth memory group. The second semiconductor layer includes a first region, a second region, a third region and a fourth region respectively underlying the first memory group, second memory group, third memory group and fourth memory group. The first region includes one driving circuit connected to memory cells of one of the second memory group, third memory group and fourth memory group through a first word line, and another driving circuit connected to memory cells of the first memory group through a first bit line, wherein the first word line and first bit line extend in the same horizontal direction.

Abstract: A display apparatus includes an oxide semiconductor pattern disposed on a device substrate and including a channel region disposed between a source region and a drain region, a gate electrode overlapping the channel region of the oxide semiconductor pattern and having a structure in which a first hydrogen barrier layer and a gate conductive layer are stacked, and a gate insulating film disposed between the oxide semiconductor pattern and the gate electrode to expose the source region and the drain region of the oxide semiconductor pattern. The gate electrode exposes a portion of the gate insulating film that is adjacent to the source region and a portion of the gate insulating film that is adjacent to the drain region.

Abstract: One embodiment of the present disclosure provides an external detection see-through door of a cabinet that stores objects.

Abstract: A three-dimensional (3D) semiconductor memory device includes a peripheral logic structure on a substrate and including a peripheral circuits, horizontal semiconductor layers on the peripheral logic structure, a stack structures in which mold layers and electrode pads are alternately stacked in a first direction on the horizontal semiconductor layers, electrode isolation regions separating the stack structures and extending in the first direction and a second direction, the electrode isolation regions being connected to the horizontal semiconductor layers, and through-via structures in the peripheral logic structure. The through-via structures penetrate the stack structures in the first direction. Each of the through-via structures have one side connected to a corresponding one of the through channel contacts. Capacitors are formed by electrode pads respectively with at least one of the electrode isolation regions or with at least one of the through-via structures.

Abstract: A three-dimensional (3D) semiconductor memory device includes a peripheral logic structure disposed on a first substrate, a horizontal semiconductor layer disposed on a second substrate, a plurality of stack structures on the horizontal semiconductor layer in a first direction, wherein the plurality of stack structures include a memory cell region and a capacitor region, a plurality of electrode isolation regions extending in the first direction and a second direction and configured to separate the plurality of stack structures to be connected to the horizontal semiconductor layer and a plurality of through-via structures having a first side connected to a through channel contact through at least one metal pad, wherein a capacitor is formed between each of electrode pads and at least one of electrode isolation regions in the plurality of stack structures or at least one of the plurality of through-via structures.

Abstract: A door, which includes a variable light transmission panel and a frame and is mounted on a body by a hinge so as to be opened and closed, is disclosed, and the door includes a glass member provided on a front surface side of the frame, a protective panel provided on an inner surface side of the frame, the variable light transmission panel provided between the glass member and the protective panel and including a sheet made of a thermoplastic resin of polymethyl methacrylate (PMMA) or polycarbonate (PC) and nano-sized dyes, a light-emitting member provided between the protective panel and the variable light transmission panel, and a power supply member configured to supply power to the light-emitting member.

Abstract: A non-volatile memory includes a first semiconductor layer vertically stacked on a second semiconductor layer and including a first memory group, a second memory group, a third memory group and a fourth memory group. The second semiconductor layer includes a first region, a second region, a third region and a fourth region respectively underlying the first memory group, second memory group, third memory group and fourth memory group. The first region includes one driving circuit connected to memory cells of one of the second memory group, third memory group and fourth memory group through a first word line, and another driving circuit connected to memory cells of the first memory group through a first bit line, wherein the first word line and first bit line extend in the same horizontal direction.

Abstract: One embodiment of the present disclosure provides an external detection see-through door of a cabinet that stores objects.

Abstract: A storage box having a display panel, which allows an article inside a body to be confirmed from the outside according to an increase in the amount of light caused by an internal light source is disclosed. The storage box having a display panel includes the body and a door including a frame and mounted on the body to be opened and closed, wherein the door includes a glass member provided on a front surface side of the frame, a protective panel provided on an inner surface side of the frame, and a transmittance-variable panel provided between the glass member and the protective panel, the transmittance-variable panel is a panel made of a thermoplastic resin of PMMA or PC and nano-sized dyes, a plurality of nano-sized pores are provided in the transmittance-variable panel.

Abstract: A nonvolatile memory device with high security is provided.

Abstract: One embodiment of the present disclosure provides a condition detection see-through storage box that stores objects, the condition detection see-through storage box including a storage box body configured to store the objects, a sensor configured to detect a specific condition inside the storage box, a door that is installed on the storage box body and has a transmission window, a light emitting module configured to increase an amount of emitted light according to a signal from the sensor, which has detected the specific condition inside the storage box, to increase an amount of light that is reflected from inside the storage box and heads toward the transmission window, and an optical film provided on the transmission window, thereby informing a user of the specific condition inside the storage box body, wherein the optical film has a light transmittance that prevents the storage box from being see-through from the outside before the sensor detects the specific condition and allows the storage box to be see-

Abstract: A non-volatile memory includes a first semiconductor layer vertically stacked on a second semiconductor layer and including a first memory group, a second memory group, a third memory group and a fourth memory group. The second semiconductor layer includes a first region, a second region, a third region and a fourth region respectively underlying the first memory group, second memory group, third memory group and fourth memory group. The first region includes one driving circuit connected to memory cells of one of the second memory group, third memory group and fourth memory group through a first word line, and another driving circuit connected to memory cells of the first memory group through a first bit line, wherein the first word line and first bit line extend in the same horizontal direction.

Abstract: A non-volatile memory includes a first semiconductor layer vertically stacked on a second semiconductor layer and including a first memory group, a second memory group, a third memory group and a fourth memory group. The second semiconductor layer includes a first region, a second region, a third region and a fourth region respectively underlying the first memory group, second memory group, third memory group and fourth memory group. The first region includes one driving circuit connected to memory cells of one of the second memory group, third memory group and fourth memory group through a first word line, and another driving circuit connected to memory cells of the first memory group through a first bit line, wherein the first word line and first bit line extend in the same horizontal direction.