Abstract: A user authentication method performed by an authentication management server constituting a block chain network with a target device may comprise receiving, from the target device, a transaction including authentication information of a user and a unique value of the target device; determining a token of the user stored in a smart contract based on the authentication information; and authenticating the user based on validity information of the token, ownership information of the token, and the transaction.

Abstract: A user authentication method performed by an authentication management server constituting a block chain network with a target device may comprise receiving, from the target device, a transaction including authentication information of a user and a unique value of the target device; determining a token of the user stored in a smart contract based on the authentication information; and authenticating the user based on validity information of the token, ownership information of the token, and the transaction.

Abstract: Provided are a controller configured to perform secure deletion, a key-value storage device including the controller, and a method of operating the key-value storage device. The key-value storage device includes a non-volatile memory including a plurality of blocks, and a controller configured to control a memory operation on the non-volatile memory, receive a write command including a first key and a first value corresponding to the first key from a host, write data of a file corresponding to the first value to at least one block of the plurality of blocks of the non-volatile memory in response to the write command, receive a secure deletion command for the first value from the host, and erase the at least one block to which the first value is written, in response to the secure deletion command.

Abstract: A data storage device for reducing a firmware update time includes a non-volatile memory configured to store a firmware update image which will replace a current firmware image, a first volatile memory, and a processor configured to control an operation of the non-volatile memory and an operation of the first volatile memory. When a first code included in the current firmware image is executed by the processor, the first code generates data necessary for an operation of the data storage device and stores the data in the first volatile memory. When a second code included in the firmware update image is executed by the first code, the second code accesses and uses the data that has been stored in the first volatile memory.

Abstract: A nonvolatile memory device includes a memory cell array including a plurality of nonvolatile memory cells; a page buffer circuit connected to the memory cell array through a plurality of bit lines; a calculation circuit configured to perform a calculation on information bits and weight bits based on a calculation window having a first size, the information bits and weight bits being included in a user data set, the memory cell array being configured to store the user data set, the calculation circuit being further configured to receive the user data set through the page buffer circuit; and a data input/output (I/O) circuit connected to the calculation circuit, wherein the calculation circuit is further configured to provide an output data set to the data I/O circuit in response to the calculation circuit completing the calculation with respect to all of the information bits and the weight bits, and wherein the output data set corresponds to a result of the completed calculation.

Abstract: A user authentication method performed by an authentication management server constituting a block chain network with a target device may comprise receiving, from the target device, a transaction including authentication information of a user and a unique value of the target device; determining a token of the user stored in a smart contract based on the authentication information; and authenticating the user based on validity information of the token, ownership information of the token, and the transaction.

Abstract: In a method of operating the memory system, the method includes detecting whether data of a read-out unit read from a first cell region has an error correction code (ECC) failure, in response to an external read-out request for the read-out unit, recovering and outputting the data of the read-out unit by performing Redundant Array of Inexpensive Disk (RAID) recovery by using data and RAID parity read from other cell regions, recovering a plurality of pieces of data stored in the first cell region by performing the RAID recovery using the data and RAID parity read from the other cell regions, and migrating the recovered plurality of pieces of data to a second cell region in units of cell regions.

Abstract: Provided are a controller configured to perform secure deletion, a key-value storage device including the controller, and a method of operating the key-value storage device. The key-value storage device includes a non-volatile memory including a plurality of blocks, and a controller configured to control a memory operation on the non-volatile memory, receive a write command including a first key and a first value corresponding to the first key from a host, write data of a file corresponding to the first value to at least one block of the plurality of blocks of the non-volatile memory in response to the write command, receive a secure deletion command for the first value from the host, and erase the at least one block to which the first value is written, in response to the secure deletion command.

Abstract: In an operating method of a memory controller, the memory controller includes a logical-to-logical (L2L) mapping table including mapping information between a first logical area and a second logical area and a logical-to-physical (L2P) mapping table including mapping information between the second logical area and a physical area of a memory device. The operating method includes receiving a first logical address of the first logical area and a first command for changing the L2L mapping table to access first data stored in the memory device through the first logical address, detecting a second logical address of the second logical area mapped to a physical address of the physical area in which the first data is stored, in response to the first command, and changing the L2L mapping table to map the first logical address to the second logical address.

Abstract: A memory access control method that can prevent a cell hammer phenomenon includes setting at least a part of all the memory cells a safe memory region, and setting the remaining memory cells to a normal memory region. In the safe memory region, some cells set to an enabled state are accessible for data writing or reading, and the remaining cells set to a disabled state are inaccessible. Based on a safe address mapping algorithm, access to all memory cells in the safe memory region is controlled such that access to the enabled memory cells is allowed and access to the disabled memory cells is prevented. The enabled memory cells in the safe memory region are spaced apart from each other by at least one disabled memory cell in a horizontal and/or vertical direction.

Abstract: A computer device for controlling a storage device based on non-volatile memory is provided. The computer device includes a file modification detector configured to detect whether a data structure in a database file has been deleted using an identifier recorded in the database file to indicate whether the data structure is deleted or not; and a command generator configured to generate an advanced-trim command including information corresponding to the deleted data structure and to transmit the command to the storage device.

Abstract: In an operating method of a memory controller, the memory controller includes a logical-to-logical (L2L) mapping table including mapping information between a first logical area and a second logical area and a logical-to-physical (L2P) mapping table including mapping information between the second logical area and a physical area of a memory device. The operating method includes receiving a first logical address of the first logical area and a first command for changing the L2L mapping table to access first data stored in the memory device through the first logical address, detecting a second logical address of the second logical area mapped to a physical address of the physical area in which the first data is stored, in response to the first command, and changing the L2L mapping table to map the first logical address to the second logical address.

Abstract: A data storage device for reducing a firmware update time includes a non-volatile memory configured to store a firmware update image which will replace a current firmware image, a first volatile memory, and a processor configured to control an operation of the non-volatile memory and an operation of the first volatile memory. When a first code included in the current firmware image is executed by the processor, the first code generates data necessary for an operation of the data storage device and stores the data in the first volatile memory. When a second code included in the firmware update image is executed by the first code, the second code accesses and uses the data that has been stored in the first volatile memory.

Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.

Abstract: In a method of operating the memory system, the method includes detecting whether data of a read-out unit read from a first cell region has an error correction code (ECC) failure, in response to an external read-out request for the read-out unit, recovering and outputting the data of the read-out unit by performing Redundant Array of Inexpensive Disk (RAID) recovery by using data and RAID parity read from other cell regions, recovering a plurality of pieces of data stored in the first cell region by performing the RAID recovery using the data and RAID parity read from the other cell regions, and migrating the recovered plurality of pieces of data to a second cell region in units of cell regions.

Abstract: Disclosed are a method for data de-duplication and an apparatus for the same. The method may comprise obtaining access property of data based on input request or output request for the data, determining de-duplication unit of the data based on the access property, and performing de-duplication on the data based on the de-duplication unit. Thus, data de-duplication rate may be determined adaptively based on input/output characteristics of data. Also, data de-duplication may be performed based on the determined data de-duplication rate so as to provide low input/output latency.

Abstract: A method of processing input/output (I/O) in a storage device includes adjusting a read anticipation time based on a change of a resource management status related to operations of the storage device and performing an I/O processing operation at the storage device based on the adjusted read anticipation time. The I/O processing operation is performed to postpone an operation regarding a program command and perform a read command at higher priority than a write command at the storage device in a period from completion of a read operation at the storage device until the read anticipation time has elapsed.

Abstract: A data storage device for reducing a firmware update time includes a non-volatile memory configured to store a firmware update image which will replace a current firmware image, a first volatile memory, and a processor configured to control an operation of the non-volatile memory and an operation of the first volatile memory. When a first code included in the current firmware image is executed by the processor, the first code generates data necessary for an operation of the data storage device and stores the data in the first volatile memory. When a second code included in the firmware update image is executed by the first code, the second code accesses and uses the data that has been stored in the first volatile memory.

Abstract: Disclosed are an apparatus and a method for configuring an operating system. An apparatus for configuring an operating system may comprise a system resource management part managing system resources by assigning control permission for system resources which interwork with the operating system to a first domain of the operating system; and a system operation part executing an application program in a second domain of the operating system which is independent from the first domain by utilizing the system resources managed by the system resource management part. Therefore, performance of the operating system may be enhanced at the same time of supporting high security of the operating system so that reliability of the operating system can also be enhanced.

Abstract: A memory access control method that can prevent a cell hammer phenomenon includes setting at least a part of all the memory cells a safe memory region, and setting the remaining memory cells to a normal memory region. In the safe memory region, some cells set to an enabled state are accessible for data writing or reading, and the remaining cells set to a disabled state are inaccessible. Based on a safe address mapping algorithm, access to all memory cells in the safe memory region is controlled such that access to the enabled memory cells is allowed and access to the disabled memory cells is prevented. The enabled memory cells in the safe memory region are spaced apart from each other by at least one disabled memory cell in a horizontal and/or vertical direction.