Patents by Inventor Chan-ik Park

Chan-ik Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8135901
    Abstract: In one aspect, a determination is made as whether partition metadata of a solid state memory has changed, and if so, the partition metadata is analyzed to locate invalid data stored in the solid state memory. This analysis may include determining that a file system type of a partition has changed, and invalidating data in response to the changed file system type. Alternately, or in addition, the analysis may include determining that a partition has changed, and invalidating data in response to the changed partition.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: March 13, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jin Oh, Moon-Wook Oh, Chan-Ik Park, Sung-Chul Kim
  • Patent number: 8117374
    Abstract: There is provided an apparatus for controlling a flash memory, which includes a memory for storing a plurality of flash translation layers; and a control block for, when an access is requested from outside, determining a pattern of the access, selecting one of the flash translation layers stored in the memory based on the determination result, and managing mapping data of the flash memory based on the selected flash translation layer.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: February 14, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hyuk Kim, Young-Joon Choi, Chan-Ik Park
  • Publication number: 20110292729
    Abstract: A method of controlling a non-volatile memory device includes comparing the number of banks that are in operating states with a threshold value. If the number of the banks is smaller than the threshold value, data stored in a standby bank is read. If there is no bank having data to be read, a standby bank is programmed. If the number of the banks is equal to or greater than the threshold value or if the reading or the programming is performed, it is determined whether there is a reading or programming command to be performed. If there is the reading or programming command to be performed, the process is repeated from the comparing step. The programming may include programming of a most significant bit (MSB) page or a least significant bit (LSB) page.
    Type: Application
    Filed: May 26, 2011
    Publication date: December 1, 2011
    Inventors: Hyun-Jin Choi, Chan-Ik Park, Jeong-Woo Lee, Sung-Joo Yoo
  • Patent number: 8051258
    Abstract: A storage system includes a storage medium configured to store data and a buffer memory configured to buffer data to be written to the storage medium. The storage system further includes a controller configured to selectively transfer the buffered data to the storage medium responsive to an invalidity indicator received from an external source. For example, the invalidity indicator may comprise unwrite information received from an external source, e.g., information that indicates that selected buffered data corresponds to deleted file data.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: November 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Ik Park, Sang Lyul Min, Tae-Sung Jung, Kyun-Ho Kook
  • Publication number: 20110219180
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Application
    Filed: May 18, 2011
    Publication date: September 8, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Patent number: 8010736
    Abstract: A method for reducing a memory map table search time when employing a semiconductor memory device as a temporary memory of large capacity storage device, and a semiconductor memory device therefore, are provided. A MAP RAM is prepared for storing map table data related to the nonvolatile memory area in the volatile memory area. At an initial power-up operation, it is determined whether a logical address is searched for from the map table data while the map table data existing in a map storage area of the nonvolatile memory area is loaded into the MAP RAM. A physical address corresponding to the logical address is provided as an output, when the logical address is searched for. Search time for a memory map table is reduced and read performance in a high speed map information search is increased.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: August 30, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Ik Park, Jin-Wook Lee, Byoung-Kook Lee
  • Patent number: 7970981
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: June 28, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Publication number: 20110138115
    Abstract: In one aspect, data is stored in a solid state memory which includes first and second memory layers. A first assessment is executed to determine whether received data is hot data or cold data. Received data which is assessed as hot data during the first assessment is stored in the first memory layer, and received data which is first assessed as cold data during the first assessment is stored in the second memory layer. Further, a second assessment is executed to determine whether the data stored in the first memory layer is hot data or cold data. Data which is then assessed as cold data during the second assessment is migrated from the first memory layer to the second memory layer.
    Type: Application
    Filed: February 15, 2011
    Publication date: June 9, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moon-wook Oh, Do-geun Kim, Chan-ik Park
  • Publication number: 20110055464
    Abstract: A device driver including a flash memory file system and method thereof and a flash memory device and method thereof are provided. The example device driver may include a flash memory file system configured to receive data scheduled to be written into the flash memory device, the flash memory file system selecting one of a first data storage area and a second data storage area within the flash memory device to write the received data to based upon an expected frequency of updating for the received data, the first data storage area configured to store data which is expected to be updated more often than the second data storage area. The example flash memory device may include a first data storage area configured to store first data, the first data having a first expected frequency for updating and a second data storage area configured to store second data, the second data having a second expected frequency of updating, the first expected frequency being higher than the second expected frequency.
    Type: Application
    Filed: November 1, 2010
    Publication date: March 3, 2011
    Inventors: Min-Soo Moon, Chan-Ik Park, Prakash Talawar
  • Publication number: 20110004724
    Abstract: A method of manipulating data includes receiving a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The method further includes mapping the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command. A system for manipulating data includes a host and a flash translation layer. The host transmits a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The flash translation layer maps the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command.
    Type: Application
    Filed: June 15, 2010
    Publication date: January 6, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myung-hyun Jo, Chan-ik Park
  • Publication number: 20100318754
    Abstract: A storage system includes a storage medium configured to store data and a buffer memory configured to buffer data to be written to the storage medium. The storage system further includes a controller configured to selectively transfer the buffered data to the storage medium responsive to an invalidity indicator received from an external source. For example, the invalidity indicator may comprise unwrite information received from an external source, e.g., information that indicates that selected buffered data corresponds to deleted file data.
    Type: Application
    Filed: August 23, 2010
    Publication date: December 16, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chan-Ik Park, Sang Lyul Min, Tae-Sung Jung, Kyun-Ho Kook
  • Patent number: 7844772
    Abstract: A device driver including a flash memory file system and method thereof and a flash memory device and method thereof are provided. The example device driver may include a flash memory file system configured to receive data scheduled to be written into the flash memory device, the flash memory file system selecting one of a first data storage area and a second data storage area within the flash memory device to write the received data to based upon an expected frequency of updating for the received data, the first data storage area configured to store data which is expected to be updated more often than the second data storage area. The example flash memory device may include a first data storage area configured to store first data, the first data having a first expected frequency for updating and a second data storage area configured to store second data, the second data having a second expected frequency of updating, the first expected frequency being higher than the second expected frequency.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: November 30, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-Soo Moon, Chan-Ik Park, Prakash Talawar
  • Publication number: 20100290283
    Abstract: Provided is a programming method that increases writing performance of a flash memory device. The programming method for a flash memory device that includes a plurality of banks including a plurality of memory cells for storing multi-bit data includes the following: programming a most significant bit (MSB) page with respect to banks of a first bank group; programming a least significant bit (LSB) page with respect to banks of a second bank group; programming the MSB page with respect to the banks of the second bank group; and programming the LSB page with respect to the banks of the first bank group.
    Type: Application
    Filed: May 10, 2010
    Publication date: November 18, 2010
    Inventors: Hyun-jin Choi, Chan-ik Park
  • Publication number: 20100274953
    Abstract: A data storage device comprises a plurality of memory devices and a memory controller. The memory controller exchanges data with the memory devices via a plurality of channels. The memory controller decodes an external command to generate a driving power mode and accesses the memory devices according to the driving power mode.
    Type: Application
    Filed: April 21, 2010
    Publication date: October 28, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Hack LEE, Sang Kyoo JEONG, Myung Hyun JO, Chan Ik PARK
  • Patent number: 7802054
    Abstract: A storage system includes a storage medium configured to store data and a buffer memory configured to buffer data to be written to the storage medium. The storage system further includes a controller configured to selectively transfer the buffered data to the storage medium responsive to an invalidity indicator received from an external source. For example, the invalidity indicator may comprise unwrite information received from an external source, e.g., information that indicates that selected buffered data corresponds to deleted file data.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Ik Park, Sang Lyul Min, Tae-Sung Jung, Kyun-Ho Kook
  • Patent number: 7797481
    Abstract: A memory system and corresponding method of wear-leveling are provided, the system including a controller, a random access memory in signal communication with the controller, and another memory in signal communication with the controller, the other memory comprising a plurality of groups, each group comprising a plurality of first erase units or blocks and a plurality of second blocks, wherein the controller exchanges a first block from a group with a second block in response to at least one block erase count within the group; and the method including receiving a command having a logical address, converting the logical address into a logical block number, determining a group number for a group that includes the converted logical block number, and checking whether group information comprising block erase counts for the group is loaded into random access memory, and if not, loading the group information into random access memory.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang-Sup Lee, Chan-Ik Park, Won-Moon Cheon
  • Patent number: 7788441
    Abstract: A method for initializing and operating a flash memory file system and a computer-readable medium storing a program adapted to perform the method are disclosed. The method includes programming the flash memory file system in order to conceptually divide logical blocks into logical groups, and storing erasure data for one of the logical groups in a first region of a meta block. The method also includes loading erasure data for one logical group into an external memory device and mapping the logical blocks of the current logical group to the physical blocks in accordance with the erasure data loaded into the external memory device. The method also includes storing data of a data file in a data block of a flash memory device in accordance with the mapping of the logical blocks to the physical blocks.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: August 31, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang Sup Lee, Chan Ik Park, Jae Sung Jung
  • Publication number: 20100153631
    Abstract: A data storage device for processing a command includes a host interface and a controller. The host interface stores program information sent within the command from a host. The controller decodes the program information that indicates a memory type to be accessed for the command. In addition, the controller determines whether the specified memory type can be accessed according to the command. The controller performs the command by accessing the memory type when the memory type specified by the program information is available for access.
    Type: Application
    Filed: January 11, 2010
    Publication date: June 17, 2010
    Inventors: Kui-Yon Moon, Moon-Wook Oh, Do-Geun Kim, Chan-Ik Park
  • Publication number: 20100153632
    Abstract: Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics. The non-volatile memory system includes a non-volatile memory cell array having a plurality of multi-level cells forming a MLC area and a plurality of single-level cells forming a SLC area, and an interface unit analyzing a characteristic of the write data and generating a corresponding data characteristic signal. A flash transition layer receives the data characteristic signal, and determines whether the write data should be stored in the MLC area or the SLC area based on whether or not the write data will be accessed by the file, or whether the address associated with the write data is frequently updated or not.
    Type: Application
    Filed: February 24, 2010
    Publication date: June 17, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yang-sup LEE, Prakash TALAWAR, Chan-ik PARK
  • Patent number: 7676626
    Abstract: Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics. The non-volatile memory system includes a non-volatile memory cell array having a plurality of multi-level cells forming a MLC area and a plurality of single-level cells forming a SLC area, and an interface unit analyzing a characteristic of the write data and generating a corresponding data characteristic signal. A flash transition layer receives the data characteristic signal, and determines whether the write data should be stored in the MLC area or the SLC area based on whether or not the write data will be accessed by the file, or whether the address associated with the write data is frequently updated or not.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: March 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang-sup Lee, Prakash Talawar, Chan-ik Park