Patents by Inventor Chan-ik Park

Chan-ik Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7366855
    Abstract: A page replacement method is provided. The page replacement method includes (a) establishing a first page list in which a plurality of pages in a main memory are listed in an order that they have been used, (b) establishing a second page list in which some of the pages in the main memory whose images are stored in a storage medium are listed in an order that they have been used, and (c) storing data downloaded from the storage medium in the pages included in the second page list in an order opposite to the order that the corresponding pages are listed in the second page list.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: April 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-kyu Kim, Kwang-yoon Lee, Jin-soo Kim, Sun-young Park, Chan-ik Park, Jeong-uk Kang
  • Publication number: 20080098159
    Abstract: A memory system which includes a host and a data storage device which is configured to receive an invalidated block address and to interrupt a merge operation for an invalidated block.
    Type: Application
    Filed: December 26, 2006
    Publication date: April 24, 2008
    Inventors: Dong-Hyun Song, Chan-Ik Park, Shea-Yun Lee
  • Publication number: 20080082729
    Abstract: A device driver including a flash memory file system and method thereof and a flash memory device and method thereof are provided. The example device driver may include a flash memory file system configured to receive data scheduled to be written into the flash memory device, the flash memory file system selecting one of a first data storage area and a second data storage area within the flash memory device to write the received data to based upon an expected frequency of updating for the received data, the first data storage area configured to store data which is expected to be updated more often than the second data storage area. The example flash memory device may include a first data storage area configured to store first data, the first data having a first expected frequency for updating and a second data storage area configured to store second data, the second data having a second expected frequency of updating, the first expected frequency being higher than the second expected frequency.
    Type: Application
    Filed: November 29, 2006
    Publication date: April 3, 2008
    Inventors: Min-Soo Moon, Chan-Ik Park, Prakash Talawar
  • Publication number: 20070233941
    Abstract: A method for initializing and operating a flash memory file system and a computer-readable medium storing a program adapted to perform the method are disclosed. The method includes programming the flash memory file system in order to conceptually divide logical blocks into logical groups, and storing erasure data for one of the logical groups in a first region of a meta block. The method also includes loading erasure data for one logical group into an external memory device and mapping the logical blocks of the current logical group to the physical blocks in accordance with the erasure data loaded into the external memory device. The method also includes storing data of a data file in a data block of a flash memory device in accordance with the mapping of the logical blocks to the physical blocks.
    Type: Application
    Filed: April 3, 2007
    Publication date: October 4, 2007
    Inventors: Yang Sup Lee, Chan Ik Park, Jae Sung Jung
  • Publication number: 20070204099
    Abstract: A method of programming a memory system including a flash memory comprising; in response to a conventional data input command, sequentially executing an address mapping operation, an address input operation, a load data operation, and a program execution operation, or in response to a new data input command, sequentially executing a load data operation, an address input operation, and a program execution operation, and further executing an address mapping operation in parallel with the load data operation.
    Type: Application
    Filed: October 24, 2006
    Publication date: August 30, 2007
    Inventors: Seon-Taek Kim, Chan-Ik Park
  • Publication number: 20070192634
    Abstract: Provided are a secure multimedia card (secure MMC) and a memory card system having the same. The memory card system may include a host, and a secure MMC having a user data area accessed by a normal command and a restricted area accessed by a secure command, wherein the user data area in communication with the host stores user data and the restricted area stores access restriction data. The restricted area may be accessed in the secure MMC even though the interface unit in the host does not support commands requesting the access to the restricted area in the secure MMC.
    Type: Application
    Filed: January 29, 2007
    Publication date: August 16, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-Moon CHEON, Chan-Ik PARK, Moon-Sang KWON
  • Publication number: 20070130442
    Abstract: A computing system includes a buffer memory configured to temporarily store data intended for storage in an external storage device and a processing unit configured to selectively invalidate data stored in the buffer memory and to control transfer of data from the buffer memory to the external storage device responsive to the selective invalidation. In some embodiments, for example, the processing unit may be configured to manage write state information of the temporarily stored data and to update the write state information according to information related to the temporarily stored data. The processing unit may be configured to control the buffer memory and the external storage according to the write state information so that at least a part of the temporarily stored data is not written in the external storage.
    Type: Application
    Filed: February 9, 2007
    Publication date: June 7, 2007
    Inventors: Shea Lee, Chan-Ik Park, Tae-Sung Jung, Sang-Lyul Min
  • Publication number: 20060212674
    Abstract: A run level address mapping table and related method of construction is disclosed. The address mapping table is constructed on a run basis, e.g., a group of consecutive pages having consecutive logical or physical addresses. The run level address mapping table stores only an initial physical page number of each run and the number of the consecutive physical pages.
    Type: Application
    Filed: December 29, 2005
    Publication date: September 21, 2006
    Inventors: Hyun-Mo Chung, Hye-Young Kim, Chan-Ik Park
  • Publication number: 20060179263
    Abstract: A memory system comprises a flash memory and a controller comprising a control logic circuit and a working memory storing a flash translation layer. The memory system performs a merge operation by selectively copying a page from a first block of the flash memory to a second block of the flash memory. Where the page is valid and marked as allocated according to a file allocation table stored in the flash memory, the page is copied to the second block. However, where the page is valid and marked as deleted in the file allocation table, the page is not copied to the second block.
    Type: Application
    Filed: December 29, 2005
    Publication date: August 10, 2006
    Inventors: Dong-Hyun Song, Chan-Ik Park, Sang-Ryul Min
  • Publication number: 20060179212
    Abstract: There is provided an apparatus for controlling a flash memory, which includes a memory for storing a plurality of flash translation layers; and a control block for, when an access is requested from outside, determining a pattern of the access, selecting one of the flash translation layers stored in the memory based on the determination result, and managing mapping data of the flash memory based on the selected flash translation layer.
    Type: Application
    Filed: November 29, 2005
    Publication date: August 10, 2006
    Inventors: Jin-Hyuk Kim, Young-Joon Choi, Chan-Ik Park
  • Publication number: 20060136676
    Abstract: A storage system includes a storage medium configured to store data and a buffer memory configured to buffer data to be written to the storage medium. The storage system further includes a controller configured to selectively transfer the buffered data to the storage medium responsive to an invalidity indicator received from an external source. For example, the invalidity indicator may comprise unwrite information received from an external source, e.g., information that indicates that selected buffered data corresponds to deleted file data.
    Type: Application
    Filed: September 20, 2005
    Publication date: June 22, 2006
    Inventors: Chan-Ik Park, Sang Min, Tae-Sung Jung, Kyun-Ho Kook
  • Publication number: 20060069851
    Abstract: Integrated circuit devices that support error detection include a non-volatile memory device having a memory array therein containing a plurality of pages of memory cells. A memory controller is also provided. The memory controller is electrically coupled to the non-volatile memory device and is configured to provide the non-volatile memory device with a plurality of segments of page data during a page write operation. The plurality of segments of page data include a plurality of segments of checksum data that identify a number of non-volatile memory cells to be programmed with write data during the page write operation. Additional checksum data is also generated for comparison and error detection purposes during a page read operation.
    Type: Application
    Filed: December 22, 2004
    Publication date: March 30, 2006
    Inventors: Hyun-Mo Chung, Chan-Ik Park
  • Publication number: 20060026372
    Abstract: A page replacement method is provided. The page replacement method includes (a) establishing a first page list in which a plurality of pages in a main memory are listed in an order that they have been used, (b) establishing a second page list in which some of the pages in the main memory whose images are stored in a storage medium are listed in an order that they have been used, and (c) storing data downloaded from the storage medium in the pages included in the second page list in an order opposite to the order that the corresponding pages are listed in the second page list.
    Type: Application
    Filed: July 28, 2005
    Publication date: February 2, 2006
    Inventors: Jin-kyu Kim, Kwang-yoon Lee, Jin-soo Kim, Sun-young Park, Chan-ik Park, Jeong-uk Kang
  • Patent number: 6983537
    Abstract: A plastic package base, an air cavity type plastic package, and their manufacturing methods, which are capable of realizing the advantages of a ceramic package in that it has a compact size, makes less noise, and is highly thermally resistant, are provided.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: January 10, 2006
    Assignee: Mediana Electronic Co., Ltd.
    Inventor: Chan-ik Park
  • Publication number: 20060004971
    Abstract: Memory systems and methods of controlling a flash memory are provided that execute one of a plurality of merge stages of an incremental merge operation responsive to receiving a command to the flash memory. Executing one of a plurality of merge stages may include receiving a command to the flash memory, determining whether the flash memory is executing an incremental merge operation and executing a next merge stage of the incremental merge operation if the flash memory is executing an incremental merge operation.
    Type: Application
    Filed: November 16, 2004
    Publication date: January 5, 2006
    Inventors: Jin-Hyuk Kim, Chan-Ik Park, Young-Gon Kim, Kyong-Ae Kim
  • Publication number: 20050162947
    Abstract: A data management apparatus and method used in a system using one or more flash memories, which can deal with defective blocks in each of the flash memories using different methods depending on how the system manages data stored in each of the flash memories. The data management apparatus includes a device driver, which controls the operation of one or more flash memories, and a controller, which transfers data stored in a defective block of one of the flash memories to a predetermined block in the flash memory.
    Type: Application
    Filed: January 27, 2005
    Publication date: July 28, 2005
    Inventors: Jin-hyuk Kim, Hyun-mo Chung, Sung-ju Myoung, Jae-wook Cheong, Chan-ik Park, Tae-sun Chung
  • Publication number: 20050080986
    Abstract: A priority-based flash memory control apparatus for XIP in a serial flash memory, a memory management method using the same, and a memory chip thereof. Efficient memory management is provided by assigning priorities to respective pages of a serial flash memory and storing the pages retrieved from the serial flash memory in a system memory or cache memory according to their priority. A memory management method using the flash memory control apparatus according to the present invention includes, if a request for reading data at a given logical address is received from a main control unit, searching for the data at the corresponding logical address by referring to a predetermined address translation table; and reading the data at the corresponding logical address from a system memory or a cache memory and transmitting the read data to the main control unit, depending on the results of the search.
    Type: Application
    Filed: July 9, 2004
    Publication date: April 14, 2005
    Inventor: Chan-ik Park
  • Publication number: 20040011699
    Abstract: A plastic package base, an air cavity type plastic package, and their manufacturing methods, which are capable of realizing the advantages of a ceramic package in that it has a compact size, makes less noise, and is highly thermally resistant, are provided.
    Type: Application
    Filed: June 9, 2003
    Publication date: January 22, 2004
    Inventor: Chan-ik Park
  • Patent number: 5943558
    Abstract: A method of making an assembly package having an air tight cavity for housing an electronic element such as a GaAs semiconductor chip. The method includes the formation of a dielectric base by placing a placing a conductive lead frame comprising a frame pad and a plurality of conductive leads inside a die having a top interior surface and a bottom interior surface, injecting a thermally setting liquefied epoxy into die cavity, curing the epoxy and removing the die. The die includes at least one post which protrudes toward the die's top interior surface such that the top surface of the post presses the inner end of each of said plurality of conductive leads against the top interior surface of the die, and also includes a pin protruding from the die's top interior surface toward the post's top surface. The post firmly holds the conductive leads in a common level plane during the injection of the epoxy into the cavity while the use of the pin results in a the formation of a pin hole in the dielectric base.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: August 24, 1999
    Assignees: Communications Technology, Inc., CTI Semiconductor Corporation
    Inventors: Jong Tae Kim, Chan Ik Park
  • Patent number: 5862158
    Abstract: A method for storing redundant information in an array of data storage devices such that data is protected against two simultaneous storage device failures. The method assigns each data block to two different parity sets, each protected by a different parity block. The protected data blocks and the parity block each reside on a different data storage device.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: January 19, 1999
    Assignee: International Business Machines Corporation
    Inventors: Sandra Johnson Baylor, Peter Frank Corbett, Chan-ik Park