Patents by Inventor Chan Li

Chan Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190338046
    Abstract: The present disclosure provides binding proteins, such as antibodies, that bind beta klotho, including human beta klotho, and methods of their use.
    Type: Application
    Filed: July 29, 2016
    Publication date: November 7, 2019
    Inventors: Kalyani MONDAL, Betty Chan LI, Yu CHEN, Taruna ARORA, Hugo MATERN, Wenyan SHEN
  • Publication number: 20190284695
    Abstract: A film forming apparatus includes a reaction chamber, a pedestal disposed inside the reaction chamber and configured to support a substrate, and a gas shower head over the pedestal. The gas shower head includes a plurality of first holes and a plurality of second hole disposed between a circumference of the gas shower head and the first holes. The first holes are arranged to form a first pattern and configured to form a first portion of a material film on the substrate. The second holes are arranged to form a second pattern and configured to form a second portion of the material film on the substrate. A hole density of the second pattern is greater than a hole density of the second pattern.
    Type: Application
    Filed: March 15, 2018
    Publication date: September 19, 2019
    Inventors: CHIH-HUI HUANG, SHENG-CHAN LI, CHENG-HSIEN CHOU, CHENG-YUAN TSAI
  • Publication number: 20190259797
    Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes an image sensing element arranged within a substrate. One or more isolation structures are arranged within one or more trenches disposed on opposing sides of the image sensing element. The one or more isolation structures extend from a first surface of the substrate to within the substrate. The one or more isolation structures respectively include a reflective element configured to reflect electromagnetic radiation.
    Type: Application
    Filed: May 7, 2019
    Publication date: August 22, 2019
    Inventors: Sheng-Chan Li, Cheng-Hsien Chou, Cheng-Yuan Tsai, Keng-Yu Chou, Yeur-Luen Tu
  • Publication number: 20190202183
    Abstract: A resin composition is provided. The resin composition includes a styrene-acrylonitrile based copolymer of 75 parts by weight to 90 parts by weight and rubber particles of 10 parts by weight to 25 parts by weight. The resin composition includes an oligomer trimer. The oligomer trimer includes at least one monomer unit selected from the group consisting of a styrene based monomer unit and an acrylonitrile based monomer unit. Wherein, a residual acrylonitrile based monomer is less than 5 ppm of the total weight of the resin composition. The ratio of the peak area of acetophenone to the peak area of air for the resin composition as analyzed by a thermal desorption gas chromatography mass spectrometer (TD-GC-MS) is 100 to 300.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 4, 2019
    Inventors: Chan-Li HSUEH, Shih-Wei HUANG, Wen-Yi SU
  • Patent number: 10325949
    Abstract: An image sensor device is provided. The image sensor device includes a substrate having a first surface, a second surface, and a light-sensing region. The image sensor device includes a first isolation structure in the substrate and adjacent to the first surface. The first isolation structure surrounds the light-sensing region. The image sensor device includes a second isolation structure passing through the first isolation structure and the substrate under the first isolation structure. The second isolation structure surrounds the light-sensing region and a portion of the first isolation structure.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: June 18, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chao-Ching Chang, Sheng-Chan Li, Cheng-Hsien Chou, Tsung-Wei Huang, Min-Hui Lin, Yi-Ming Lin
  • Patent number: 10319768
    Abstract: The present disclosure relates to an image sensor integrated chip having a deep trench isolation (DTI) structure having a reflective element. In some embodiments, the image sensor integrated chip includes an image sensing element arranged within a substrate. A plurality of protrusions are arranged along a first side of the substrate over the image sensing element and one or more absorption enhancement layers are arranged over and between the plurality of protrusions. A plurality of DTI structures are arranged within trenches disposed on opposing sides of the image sensing element and extend from the first side of the substrate to within the substrate. The plurality of DTI structures respectively include a reflective element having one or more reflective regions configured to reflect electromagnetic radiation. By reflecting electromagnetic radiation using the reflective elements, cross-talk between adjacent pixel regions is reduced, thereby improving performance of the image sensor integrated chip.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: June 11, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Chan Li, Cheng-Hsien Chou, Cheng-Yuan Tsai, Keng-Yu Chou, Yeur-Luen Tu
  • Publication number: 20190157322
    Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a semiconductor substrate having a front surface and a back surface facing opposite to the front surface; a filling material extending from the front surface into the semiconductor substrate without penetrating through the semiconductor substrate, the filling material including an upper portion and a lower portion, the upper portion being in contact with the semiconductor substrate; and an epitaxial layer lined between the lower portion of the filling material and the semiconductor substrate. An associated manufacturing method is also disclosed.
    Type: Application
    Filed: February 23, 2018
    Publication date: May 23, 2019
    Inventors: SHENG-CHAN LI, I-NAN CHEN, TZU-HSIANG CHEN, YU-JEN WANG, YEN-TING CHIANG, CHENG-HSIEN CHOU, CHENG-YUAN TSAI
  • Publication number: 20190139997
    Abstract: A semiconductor image sensor device includes a semiconductor substrate, a radiation-sensing region, and a first isolation structure. The radiation-sensing region is in the semiconductor substrate. The first isolation structure is in the semiconductor substrate and adjacent to the radiation-sensing region. The first isolation structure includes a bottom isolation portion in the semiconductor substrate, an upper isolation portion in the semiconductor substrate, and a diffusion barrier layer surrounding a sidewall of the upper isolation portion.
    Type: Application
    Filed: March 27, 2018
    Publication date: May 9, 2019
    Inventors: YEN-TING CHIANG, CHUN-YUAN CHEN, HSIAO-HUI TSENG, SHENG-CHAN LI, YU-JEN WANG, WEI CHUANG WU, SHYH-FANN TING, JEN-CHENG LIU, DUN-NIAN YAUNG
  • Publication number: 20190106490
    Abstract: The present disclosure provides binding proteins, such as antibodies, that bind beta klotho, including human beta klotho, and methods of their use.
    Type: Application
    Filed: August 14, 2018
    Publication date: April 11, 2019
    Inventors: Kalyani Mondal, Betty Chan Li, Yu Chen, Taruna Arora, Hugo Matern, Wenyan Shen
  • Patent number: 10228734
    Abstract: A removable hard disk carrier includes an L-shaped support, a flexible support, and a side support. The flexible support is fixedly connected to an end portion of the L-shaped support. The side support is fixedly connected to an end portion of the flexible support and is detachably engaged with another end portion of the L-shaped support. Therein, after the side support is detachably engaged with the L-shaped support, the L-shaped support, the flexible support, and the side support form an accommodating space therebetween and can fix a hard disk in the accommodating space. When the side support and the L-shaped support are not engaged, the side support can move away from the L-shaped support due to the resilient deformation of the flexible support, so that the hard disk can be detached from the removable hard disk carrier.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: March 12, 2019
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Han-Chih Hsieh, Hsueh-Chan Li, Chih-Lung Liao, Chao-Chih Liu
  • Publication number: 20190067355
    Abstract: The present disclosure relates to an image sensor integrated chip having a deep trench isolation (DTI) structure having a reflective element. In some embodiments, the image sensor integrated chip includes an image sensing element arranged within a substrate. A plurality of protrusions are arranged along a first side of the substrate over the image sensing element and one or more absorption enhancement layers are arranged over and between the plurality of protrusions. A plurality of DTI structures are arranged within trenches disposed on opposing sides of the image sensing element and extend from the first side of the substrate to within the substrate. The plurality of DTI structures respectively include a reflective element having one or more reflective regions configured to reflect electromagnetic radiation. By reflecting electromagnetic radiation using the reflective elements, cross-talk between adjacent pixel regions is reduced, thereby improving performance of the image sensor integrated chip.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 28, 2019
    Inventors: Sheng-Chan Li, Cheng-Hsien Chou, Cheng-Yuan Tsai, Keng-Yu Chou, Yeur-Luen Tu
  • Publication number: 20190035829
    Abstract: An image sensor device is provided. The image sensor device includes a substrate having a first surface, a second surface, and a light-sensing region. The image sensor device includes a first isolation structure in the substrate and adjacent to the first surface. The first isolation structure surrounds the light-sensing region. The image sensor device includes a second isolation structure passing through the first isolation structure and the substrate under the first isolation structure. The second isolation structure surrounds the light-sensing region and a portion of the first isolation structure.
    Type: Application
    Filed: August 6, 2018
    Publication date: January 31, 2019
    Inventors: Chao-Ching CHANG, Sheng-Chan LI, Cheng-Hsien CHOU, Tsung-Wei HUANG, Min-Hui LIN, Yi-Ming LIN
  • Patent number: 10139872
    Abstract: The disclosure is related to a motherboard assembly including a circuit board, an expansion port and at least one retainer. The expansion port is disposed on the circuit board. The retainer includes a supporting portion disposed on the circuit board, an elastic portion movably connected to the supporting portion, a holding portion protruding from the elastic portion, an extension portion connected to the elastic portion and a pressing member connected to the supporting portion. The pressing member and the extension portion is located at a same side of the supporting portion. A portion of the pressing portion is located at a side of the extension portion away from the circuit board. An orthogonal projection of the pressing member on the circuit board partially overlaps an orthogonal projection of the extension portion on the circuit board. In addition, the disclosure is also related to a retainer.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: November 27, 2018
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Hsueh-Chan Li, Wei-Han Hsueh
  • Patent number: 10093735
    Abstract: The present disclosure provides binding proteins, such as antibodies, that bind beta klotho, including human beta klotho, and methods of their use.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: October 9, 2018
    Assignee: NGM Biopharmaceuticals, Inc.
    Inventors: Kalyani Mondal, Betty Chan Li, Yu Chen, Taruna Arora, Hugo Matern, Wenyan Shen
  • Patent number: 10083950
    Abstract: A die stacking method is provided. The die stacking method includes executing a manufacturing recipe, and loading an interposer-die mapping file according to the manufacturing recipe. The interposer-die mapping file corresponds to an interposer wafer including interposer dies. The die stacking method also includes loading a combination setting data according to the interposer-die mapping file, and loading a top die number and a top-die ID code of a top-die mapping file according to the combination setting data and the interposer-die mapping file. The top-die ID code corresponds to a top wafer including top dies, and the top die number corresponds to one of the top dies. The die stacking method also includes disposing the one of the top dies of the top wafer on one of the interposer dies of the interposer wafer.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: September 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Larry Jann, Chih-Chien Chang, Po-Wen Chuang, Ming-I Chiu, Chang-Hsi Lin, Chih-Chan Li, Yi-Ting Hu
  • Patent number: 10062656
    Abstract: A semiconductor device includes a substrate, a dielectric structure, a top metal layer and a bonding structure. The dielectric structure is disposed on the substrate. The top metal layer is disposed in the dielectric structure. The bonding structure is disposed on the dielectric structure and the top metal layer. The bonding structure includes a silicon oxide layer, a silicon oxy-nitride layer, a conductive bonding layer and a barrier layer. The silicon oxide layer is disposed on the dielectric structure. The silicon oxy-nitride layer covers the silicon oxide layer. The conductive bonding layer is disposed in the silicon oxide layer and the silicon oxy-nitride layer. The barrier layer covers a sidewall and a bottom of the conductive bonding layer.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: August 28, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Ching Chang, Sheng-Chan Li, Wen-Jen Tsai, Chih-Hui Huang, Jian-Shin Tsai, Cheng-Yi Wu, Yi-Ming Lin, Min-Hui Lin
  • Patent number: 10062720
    Abstract: The present disclosure relates to an integrated circuit, and an associated method of formation. In some embodiments, the integrated circuit comprises a deep trench grid disposed at a back side of a substrate. A passivation layer lines the deep trench grid within the substrate. The passivation layer includes a first high-k dielectric layer and a second high-k dielectric layer disposed over the first high-k dielectric layer. A first dielectric layer is disposed over the passivation layer, lining the deep trench grid and extending over an upper surface of the substrate. A second dielectric layer is disposed over the first dielectric layer and enclosing remaining spaces of the deep trench grid to form air-gaps at lower portions of the deep trench grid. The air-gaps are sealed by the first dielectric layer or the second dielectric layer below the upper surface of the substrate.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: August 28, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yen-Ting Chiang, Ching-Chun Wang, Dun-Nian Yaung, Hsiao-Hui Tseng, Chih-Hui Huang, Shyh-Fann Ting, Shih Pei Chou, Sheng-Chan Li
  • Patent number: 10043841
    Abstract: A method for forming an image sensor device is provided. The method includes providing a substrate having a front surface and a back surface. The method includes removing a first portion of the substrate to form a first trench. The method includes forming a first isolation structure in the first trench. The first isolation structure has a top surface. The method includes removing a second portion of the first isolation structure and a third portion of the substrate to form a second trench passing through the first isolation structure and extending into the substrate. The method includes forming a second isolation structure in the second trench. The method includes forming a light-sensing region in the substrate. The method includes removing a fourth portion of the substrate to expose a first bottom portion of the second isolation structure and a backside of the light-sensing region.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: August 7, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Ching Chang, Sheng-Chan Li, Cheng-Hsien Chou, Tsung-Wei Huang, Min-Hui Lin, Yi-Ming Lin
  • Publication number: 20180122844
    Abstract: The present application relates to a method to simplify the scribe line opening filling processes, and to further improve the surface uniformity of the conductive pad fabrication process. A passivation layer is formed over a semiconductor substrate, and a scribe line opening is formed through the passivation layer and the semiconductor substrate. To fill the scribe line opening, a first dielectric layer is formed within the scribe line opening over the conductive pad and extending over the passivation layer. The first dielectric layer is formed by a selective deposition process such that the first dielectric layer is formed on the conductive pad at a deposition rate greater than that formed on the passivation layer.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 3, 2018
    Inventors: Sheng-Chan Li, Cheng-Hsien Chou, Sheng-Chau Chen, Cheng-Yuan Tsai, Chih-Hui Huang
  • Patent number: 9960200
    Abstract: The present application relates to a method to simplify the scribe line opening filling processes, and to further improve the surface uniformity of the conductive pad fabrication process. A passivation layer is formed over a semiconductor substrate, and a scribe line opening is formed through the passivation layer and the semiconductor substrate. To fill the scribe line opening, a first dielectric layer is formed within the scribe line opening over the conductive pad and extending over the passivation layer. The first dielectric layer is formed by a selective deposition process such that the first dielectric layer is formed on the conductive pad at a deposition rate greater than that formed on the passivation layer.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: May 1, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Chan Li, Cheng-Hsien Chou, Sheng-Chau Chen, Cheng-Yuan Tsai, Chih-Hui Huang