Patents by Inventor Chang-An Chen

Chang-An Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11963300
    Abstract: A panel device including a substrate, a conductor pad, a turning wire, and a circuit board is provided. The substrate has a first surface and a second surface connected to the first surface while a normal direction of the second surface is different from a normal direction of the first surface. The conductor pad is disposed on the first surface of the substrate. The turning wire is disposed on the substrate and extends from the first surface to the second surface. The turning wire includes a wiring layer in contact with the conductor pad and a wire covering layer covering the wiring layer. The circuit board is bonded to and electrically connected to the wire covering layer. A manufacturing method of a panel device is also provided herein.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: April 16, 2024
    Assignee: Au Optronics Corporation
    Inventors: Chun-Yueh Hou, Hao-An Chuang, Fan-Yu Chen, Hsi-Hung Chen, Yun Cheng, Wen-Chang Hsieh, Chih-Wen Lu
  • Patent number: 11959834
    Abstract: A manufacturing method of a sample collection component, by which a removable light shielding component is disposed on a main body of the sample collection component to shield at least a portion of the light that passes through a storing space of the sample collection component.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: April 16, 2024
    Assignee: Materials Analysis Technology Inc.
    Inventors: Pin Chang, Ying-Chan Hung, Hung-Jen Chen
  • Publication number: 20240120845
    Abstract: A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. The second driving signal includes a resonant pulse having a resonant pulse width and a ZVS pulse during the DCM operation. The resonant pulse is configured to demagnetize the transformer. The resonant pulse has a first minimum resonant period for a first level of the output load and a second minimum resonant period for a second level of the output load. The first level is higher than the second level and the second minimum resonant period is shorter than the first minimum resonant period.
    Type: Application
    Filed: April 14, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Hsin-Yi Wu
  • Publication number: 20240121920
    Abstract: A terminal device and a terminal device installation method are provided. The terminal device includes a machine body, a detachable cover with two side walls, and at least two coupling mechanisms arranged symmetrically. The machine body includes a front board, a rear board opposite to the front board, and two side boards connected between the front board and the rear board. Each coupling mechanism includes a coupling portion located at one side wall, a front track and a rear track respectively having a front opening and a rear opening opposite to the front opening and both located at one side board. As each coupling portion is coupled to each front track, the cover is assembled with the machine body and covers the front board, and as each coupling portion is coupled with each rear track, the cover is assembled to the machine body and covers the rear board.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 11, 2024
    Inventors: Yuan-Yu CHEN, Ming-Hung HUNG, Po-Chang CHU
  • Publication number: 20240120846
    Abstract: A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. During a DCM (discontinuous conduction mode) operation, the second driving signal includes a resonant pulse for demagnetizing the transformer and a ZVS (zero voltage switching) pulse for achieving ZVS of the first transistor. The resonant pulse is skipped when the output voltage is lower than a low-voltage threshold.
    Type: Application
    Filed: April 14, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Hsin-Yi Wu
  • Publication number: 20240120844
    Abstract: A resonant flyback power converter includes: a first and a second transistors which form a half-bridge circuit for switching a transformer and a resonant capacitor to generate an output voltage; a current-sense device for sensing a switching current of the half-bridge circuit to generate a current-sense signal; and a switching control circuit generating a first and a second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal controls the half-bridge circuit to generate a positive current to magnetize the transformer and charge the resonant capacitor. The turn-on of the second driving signal controls the half-bridge circuit to generate a negative current to discharge the resonant capacitor. The switching control circuit turns off the first transistor when the positive current exceeds a positive-over-current threshold, and/or, turns off the second transistor when the negative current exceeds a negative-over-current threshold.
    Type: Application
    Filed: April 10, 2023
    Publication date: April 11, 2024
    Inventors: Kun-Yu LIN, Ta-Yung YANG, Yu-Chang CHEN, Hsin-Yi WU, Fu-Ciao SYU, Chia-Hsien YANG
  • Publication number: 20240122078
    Abstract: A semiconductor memory device includes a substrate having a conductor region thereon, an interlayer dielectric layer on the substrate, and a conductive via electrically connected to the conductor region. The conductive via has a lower portion embedded in the interlayer dielectric layer and an upper portion protruding from a top surface of the interlayer dielectric layer. The upper portion has a rounded top surface. A storage structure conformally covers the rounded top surface.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Chang Hsu, Tang-Chun Weng, Cheng-Yi Lin, Yung-Shen Chen, Chia-Hung Lin
  • Publication number: 20240120430
    Abstract: A method of forming infrared detector includes the following operations. A sensing structure including a first infrared absorption layer, a first protection layer, a second infrared absorption layer, and a second protection layer from bottom to top is received. A patterned photoresist layer is formed on the sensing structure, in which the patterned photoresist layer has a first opening exposing the second protection layer. The second protection layer is etched through the first opening to form a second opening in the second protection layer, in which the second opening exposes the second infrared absorption layer. The patterned photoresist layer is removed. The second infrared absorption layer and the first protection layer are etched through the second opening to form a third opening, in which the third opening exposes the first infrared absorption layer. An electrode is formed in the third opening.
    Type: Application
    Filed: February 16, 2023
    Publication date: April 11, 2024
    Inventor: Yen-Chang CHEN
  • Patent number: 11955553
    Abstract: Embodiments disclosed herein relate to using an implantation process and a melting anneal process performed on a nanosecond scale to achieve a high surface concentration (surface pile up) dopant profile and a retrograde dopant profile simultaneously. In an embodiment, a method includes forming a source/drain structure in an active area on a substrate, the source/drain structure including a first region comprising germanium, implanting a first dopant into the first region of the source/drain structure to form an amorphous region in at least the first region of the source/drain structure, implanting a second dopant into the amorphous region containing the first dopant, and heating the source/drain structure to liquidize and convert at least the amorphous region into a crystalline region, the crystalline region containing the first dopant and the second dopant.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Su-Hao Liu, Kuo-Ju Chen, Wen-Yen Chen, Ying-Lang Wang, Liang-Yin Chen, Li-Ting Wang, Huicheng Chang
  • Patent number: 11954527
    Abstract: A resource allocation method comprises using resources with a used resource quantity of a machine learning system to execute a first experiment which has a first minimum resource demand, receiving an experiment request associated with a target dataset, deciding a second experiment according to the target dataset, deciding a second minimum resource demand of the second experiment, allocating resources with a quantity equal to the second minimum resource demand for an execution of the second experiment when a total resource quantity of the machine learning system meets a sum of the first minimum resource demand and the second minimum resource demand and a difference between the total resource quantity and the used resource quantity meets the second minimum resource demand, determining that the machine learning system has an idle resource, and selectively allocating said the idle resource for at least one of the first experiment and the second experiment.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: April 9, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shih-Chang Chen, Yi-Chin Chu, Yi-Fang Lu
  • Patent number: 11953614
    Abstract: A method for measuring coordinate position include detecting the distance of a target relative to a portable electronic device to generate a measurement signal corresponding to the distance, sensing a relative position of the target to generate a azimuth angle corresponding to the relative position, detecting the movement of the portable electronic device to generate an inertial signal corresponding to the movement, obtaining positioning information of the portable electronic device, converting the measurement signal into distance data, converting the inertial signal into a tilt angle, calculating coordinate difference information with the tilt angle, the distance data and the azimuth angle, and calculating coordinate position of the target with the positioning information and the coordinate difference information.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: April 9, 2024
    Assignee: Getac Technology Corporation
    Inventors: Chia-Chang Chiu, Wei-Rong Chen
  • Publication number: 20240112870
    Abstract: A backlight module for a lighting keyboard comprises a lighting board including light emitting units, a light guide panel disposed on the lighting board and including light guide holes, and a shielding sheet disposed on the light guide panel. Each light emitting unit is located in each light guide hole. The backlight module is divided into regions including a middle region and two first side regions located outside the middle region. The light guide holes include at least one middle light guide hole in the middle region and at least one first light guide hole in the first side region. A distance between a light emitting unit located in the middle light guide hole and a wall of the middle light guide hole is lesser than a distance between a light emitting unit located in the first light guide hole and a wall of the first light guide hole.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 4, 2024
    Applicant: Darfon Electronics Corp.
    Inventors: Yen-Chang CHEN, Heng-Yi HUANG
  • Publication number: 20240108566
    Abstract: A composition containing recombinant collagen with repairing and soothing effects, eye cream containing the composition and preparation method thereof are provided. The composition contains the following raw materials in parts by weight: 1 to 10 parts of recombinant collagen, 1 to 10 parts of sodium hyaluronate, 1 to 5 parts of bifida ferment lysate, 1 to 15 parts of glucosylglycerol, 1 to 10 parts of bisabolol, 1 to 15 parts eight-treasure essence stock solution, and 1 to 15 parts of pink red plum rechecking essence. The composition features with good skin permeability, contributing to its significant effects on repairing skin barriers and relieving skin inflammation, as well as its advantages of low irritation and high safety. Thus, the composition is suitable for people with damaged eye skin and has good market application prospects.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Inventors: Daonian ZHOU, Chang TAN, Jinlong SUN, Mingjia LI, Ge CHEN, Weiping ZHANG, Heng ZHANG, Lei JIANG, Li ZHOU, Jincheng QI
  • Publication number: 20240112027
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for performing neural architecture search for machine learning models. In one aspect, a method comprises receiving training data for a machine learning, generating a plurality of candidate neural networks for performing the machine learning task, wherein each candidate neural network comprises a plurality of instances of a layer block composed of a plurality of layers, for each candidate neural network, selecting a respective type for each of the plurality of layers from a set of layer types that comprises, training the candidate neural network and evaluating performance scores for the trained candidate neural networks as applied to the machine learning task, and determining a final neural network for performing the machine learning task based at least on the performance scores for the candidate neural networks.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 4, 2024
    Inventors: Yanqi Zhou, Yanping Huang, Yifeng Lu, Andrew M. Dai, Siamak Shakeri, Zhifeng Chen, James Laudon, Quoc V. Le, Da Huang, Nan Du, David Richard So, Daiyi Peng, Yingwei Cui, Jeffrey Adgate Dean, Chang Lan
  • Publication number: 20240111139
    Abstract: An imaging lens assembly module includes a lens barrel, a catadioptric lens assembly, an imaging lens assembly, a first fixing element and a second fixing element. The lens barrel has a first relying surface and a second relying surface, which face towards an object side of the imaging lens assembly module. The catadioptric lens assembly relies on the first relying surface. The imaging lens assembly is disposed on an image side of the catadioptric lens assembly, and relies on the second relying surface. The first fixing element is for fixing the catadioptric lens assembly to the lens barrel. The second fixing element is for fixing the imaging lens assembly to the lens barrel. The catadioptric lens assembly is for processing at least twice internal reflections of an image light in the imaging lens assembly module, and for providing optical refractive power.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 4, 2024
    Inventors: Lin-An CHANG, Chung Hao CHEN, Wen-Yu TSAI, Ming-Ta CHOU
  • Publication number: 20240113187
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having one or more interior surfaces forming a recess within an upper surface of the substrate. Source/drain regions are disposed within the substrate on opposing sides of the recess. A first gate dielectric is arranged along the one or more interior surfaces forming the recess, and a second gate dielectric is arranged on the first gate dielectric and within the recess. A gate electrode is disposed on the second gate dielectric. The second gate dielectric includes one or more protrusions that extend outward from a recessed upper surface of the second gate dielectric and that are arranged along opposing sides of the second gate dielectric.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Jhu-Min Song, Ying-Chou Chen, Yi-Kai Ciou, Chien-Chih Chou, Fei-Yun Chen, Yu-Chang Jong, Chi-Te Lin
  • Publication number: 20240113287
    Abstract: This application provides a lithium-ion battery, including: an electrode assembly and an electrolytic solution. The electrolytic solution may comprise a first lithium salt LixR1(SO2N)xSO2R2, wherein R1 and R2 each independently represent an alkyl with 1 to 20 fluorine atoms or carbon atoms, or a fluoroalkyl with 1 to 20 carbon atoms, or a fluoroalkoxyl with 1 to 20 carbon atoms, and x is an integer of 1, 2, or 3, and a second lithium salt, wherein the second lithium is at least one selected from LiPF6, LiAsF6, or LiBF4, wherein a thickness of the metallic conductive layer, ?1, is in a range of 0.52 ?m to 2.4 ?m, and a mass percentage of the first lithium salt, w, is 5% to 30% based on a total mass of the electrolytic solution.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 4, 2024
    Applicant: CONTEMPORARY AMPEREX TECHNOLOGY CO., LIMITED
    Inventors: Chang PENG, Peipei CHEN, Hailin ZOU, Liye LI
  • Publication number: 20240113112
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Ryan Chia-Jen Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen
  • Publication number: 20240113113
    Abstract: Methods of cutting gate structures, and structures formed, are described. In an embodiment, a structure includes first and second gate structures over an active area, and a gate cut-fill structure. The first and second gate structures extend parallel. The active area includes a source/drain region disposed laterally between the first and second gate structures. The gate cut-fill structure has first and second primary portions and an intermediate portion. The first and second primary portions abut the first and second gate structures, respectively. The intermediate portion extends laterally between the first and second primary portions. First and second widths of the first and second primary portions along longitudinal midlines of the first and second gate structures, respectively, are each greater than a third width of the intermediate portion midway between the first and second gate structures and parallel to the longitudinal midline of the first gate structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Chih-Chang Hung, Chia-Jen Chen, Ming-Ching Chang, Shu-Yuan Ku, Yi-Hsuan Hsiao, I-Wei Yang
  • Patent number: D1023378
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: April 16, 2024
    Assignee: Acer Incorporated
    Inventors: Wei-Chang Chen, Jung-Wei Tsao