Patents by Inventor Chang-An Pan
Chang-An Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240170337Abstract: The present disclosure describes a semiconductor structure with a dielectric liner. The semiconductor structure includes a substrate and a fin structure on the substrate. The fin structure includes a stacked fin structure, a fin bottom portion below the stacked fin structure, and an isolation layer between the stacked fin structure and the bottom fin portion. The semiconductor structure further includes a dielectric liner in contact with an end of the stacked fin structure and a spacer structure in contact with the dielectric liner.Type: ApplicationFiled: January 30, 2024Publication date: May 23, 2024Applicant: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Zhi-Chang LIN, Shih-Cheng CHEN, Kuo-Cheng CHIANG, Kuan-Ting PAN, Jung-Hung CHANG, Lo-Heng CHANG, Chien Ning YAO
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Publication number: 20240165181Abstract: A composition for inhibiting intestinal permeability, treating leaky gut related diseases and/or preventing leaky gut related diseases including a Chinese herbal compound material or a Chinese herbal compound extract is provided. The Chinese herbal compound material includes Ganoderma, red jujube, longan and lotus seed. Moreover, the Chinese herbal compound extract includes a Ganoderma extract, a red jujube extract, a longan extract and a lotus seed extract.Type: ApplicationFiled: June 1, 2023Publication date: May 23, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: I-Hong PAN, Kuei-Chang LI, Zong-Keng KUO, Chu-Hsun LU, Yen-Wu HSIEH, Shu-Fang WEN
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Patent number: 11966133Abstract: An electronic device is disclosed. The electronic device includes a substrate, a plurality of color filters disposed on the substrate, an optical film disposed on the plurality of color filter, and a defect disposed between the substrate and the optical film. The optical film has a first base, a protective layer on the first base, and a second base between the first base and the protective layer and having a first processed area. In a top view of the electronic device, the first processed area corresponds to the defect and at least partially overlaps at least two color filters.Type: GrantFiled: May 18, 2023Date of Patent: April 23, 2024Assignee: INNOLUX CORPORATIONInventors: Tai-Chi Pan, Chin-Lung Ting, I-Chang Liang, Chih-Chiang Chang Chien, Po-Wen Lin, Kuang-Ming Fan, Sheng-Nan Chen
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Publication number: 20240112959Abstract: A method of fabricating a device includes forming a dummy gate over a plurality of fins. Thereafter, a first portion of the dummy gate is removed to form a first trench that exposes a first hybrid fin and a first part of a second hybrid fin. The method further includes filling the first trench with a dielectric material disposed over the first hybrid fin and over the first part of the second hybrid fin. Thereafter, a second portion of the dummy gate is removed to form a second trench and the second trench is filled with a metal layer. The method further includes etching-back the metal layer, where a first plane defined by a first top surface of the metal layer is disposed beneath a second plane defined by a second top surface of a second part of the second hybrid fin after the etching-back the metal layer.Type: ApplicationFiled: December 1, 2023Publication date: April 4, 2024Inventors: Kuan-Ting PAN, Zhi-Chang LIN, Yi-Ruei JHAN, Chi-Hao WANG, Huan-Chieh SU, Shi Ning JU, Kuo-Cheng CHIANG
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Patent number: 11929287Abstract: The present disclosure describes a semiconductor structure with a dielectric liner. The semiconductor structure includes a substrate and a fin structure on the substrate. The fin structure includes a stacked fin structure, a fin bottom portion below the stacked fin structure, and an isolation layer between the stacked fin structure and the bottom fin portion. The semiconductor structure further includes a dielectric liner in contact with an end of the stacked fin structure and a spacer structure in contact with the dielectric liner.Type: GrantFiled: April 23, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Zhi-Chang Lin, Shih-Cheng Chen, Kuo-Cheng Chiang, Kuan-Ting Pan, Jung-Hung Chang, Lo-Heng Chang, Chien Ning Yao
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Publication number: 20240076417Abstract: The present disclosure provides a method for manufacturing an auto-crosslinked hyaluronic acid gel, comprising conducting auto-crosslinking reaction of a colloid containing hyaluronic acid continuously at low temperature in an acidic environment, and treating the reaction product with steam at high temperature to obtain the auto-crosslinked hyaluronic acid gel with high viscosity.Type: ApplicationFiled: September 5, 2023Publication date: March 7, 2024Applicant: SCIVISION BIOTECH INC.Inventors: TAI-SHIEN HAN, TSUNG-WEI PAN, TOR-CHERN CHEN, CHUN-CHANG CHEN, PO-HSUAN LIN, LI-SU CHEN
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Patent number: 11923433Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.Type: GrantFiled: March 9, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
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Publication number: 20240071888Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.Type: ApplicationFiled: August 28, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
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Publication number: 20240073515Abstract: The present disclosure provides an image automatic correction method of a document camera, and the image automatic correction method includes steps as follows. An image is captured; at least one image feature value is extracted from the image, and whether an imaged picture has changed is determined according to the at least one image feature value of the image and at least one previous image feature value of a previous image; when the imaged picture has changed as determined, a focal length value is calculated, and whether the image needs to be rotated is determined according to the focal length value.Type: ApplicationFiled: August 25, 2023Publication date: February 29, 2024Inventors: You-Chang LIN, Zong Yuan PAN
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Patent number: 11916122Abstract: A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.Type: GrantFiled: July 8, 2021Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Zhi-Chang Lin, Kuan-Ting Pan, Shih-Cheng Chen, Jung-Hung Chang, Lo-Heng Chang, Chien-Ning Yao, Kuo-Cheng Chiang
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Patent number: 11417948Abstract: An antenna device is provided. The antenna device includes an antenna layer, a first transparent layer, and a second transparent layer. The antenna layer is a metal mesh structure having a plurality of thru-holes, and the antenna layer includes at least one soldering region and an embedded region. The first transparent layer and the second transparent layer are respectively connected to two opposite sides of the antenna layer. The first transparent layer and the second transparent layer are connected to each other, so that the embedded region of the antenna layer is embedded in-between the first transparent layer and the second transparent layer. The second transparent layer has a hollow region corresponding in position to the at least one soldering region, so that the at least one soldering region is exposed from the hollow region.Type: GrantFiled: August 19, 2021Date of Patent: August 16, 2022Assignee: WISTRON NEWEB CORPORATIONInventors: Han-Chang Pan, Shih-Hong Chen, Chih-Lung Chen, Li-Jun Chen
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Publication number: 20220238990Abstract: An antenna device is provided. The antenna device includes an antenna layer, a first transparent layer, and a second transparent layer. The antenna layer is a metal mesh structure having a plurality of thru-holes, and the antenna layer includes at least one soldering region and an embedded region. The first transparent layer and the second transparent layer are respectively connected to two opposite sides of the antenna layer. The first transparent layer and the second transparent layer are connected to each other, so that the embedded region of the antenna layer is embedded in-between the first transparent layer and the second transparent layer. The second transparent layer has a hollow region corresponding in position to the at least one soldering region, so that the at least one soldering region is exposed from the hollow region.Type: ApplicationFiled: August 19, 2021Publication date: July 28, 2022Inventors: HAN-CHANG PAN, SHIH-HONG CHEN, CHIH-LUNG CHEN, LI-JUN CHEN
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Patent number: 10559728Abstract: A semiconductor package structure is disclosed. The package structure includes a first substrate, a second substrate on which the first substrate is disposed, and a semiconductor chip which is disposed on the first substrate. The two substrates can include two notches or two solder receiving portions. Therefore, when the package structure is disposed on the printed circuit board (PCB), the package structure will protrude less on the surface of the printed circuit board (PCB); or, the solders on the printed circuit board (PCB) will not be shifted by the package structure.Type: GrantFiled: August 27, 2018Date of Patent: February 11, 2020Assignee: Everlight Electronics Co., Ltd.Inventors: Chih-Ming Ho, Chun-Chih Liang, Ding-Hwa Cherng, Kuang-Mao Lu, Wen-Chueh Lo, Hao-Yu Yang, Chieh-Yu Kang, Han-Chang Pan
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Patent number: 10453974Abstract: The invention relates to a conductive paste comprising from 30 to 97% by weight of electrically conductive particles, from 0 to 20% by weight of a glass frit, from 3 to 70% by weight of an organic medium and from 0.1 to 67% by weight of a silicone oil, each based on the total mass of the paste, wherein the silicone oil has a boiling point or a boiling range in the range between 180° C. and 350° C. The invention further relates to a use of the conductive paste and a process for producing electrodes on a semiconductor substrate using the paste.Type: GrantFiled: February 23, 2017Date of Patent: October 22, 2019Assignee: BASF SEInventors: Markus Fiess, Han Chang Pan, Yu Lin Wang, Chia Chin Cho
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Publication number: 20190259924Abstract: A semiconductor package structure is disclosed. The package structure includes a first substrate, a second substrate on which the first substrate is disposed, and a semiconductor chip which is disposed on the first substrate. The two substrates can include two notches or two solder receiving portions. Therefore, when the package structure is disposed on the printed circuit board (PCB), the package structure will protrude less on the surface of the printed circuit board (PCB); or, the solders on the printed circuit board (PCB) will not be shifted by the package structure.Type: ApplicationFiled: August 27, 2018Publication date: August 22, 2019Applicant: Everlight Electronics Co., Ltd.Inventors: Chih-Ming Ho, Chun-Chih Liang, Ding-Hwa Cherng, Kuang-Mao Lu, Wen-Chueh Lo, Hao-Yu Yang, Chieh-Yu Kang, Han-Chang Pan
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Publication number: 20190051774Abstract: The invention relates to a conductive paste comprising from 30 to 97% by weight of electrically conductive particles, from 0 to 20% by weight of a glass fit, from 3 to 70% by weight of an organic medium and from 0.1 to 67% by weight of a silicone oil, each based on the total mass of the paste, wherein the silicone oil hasa boiling pointor a boiling rangein the range between 180° C. and 350° C. The invention further relates to a use of the conductive paste and a process for producing electrodes on a semiconductor substrate using the paste.Type: ApplicationFiled: February 23, 2017Publication date: February 14, 2019Applicant: BASF SEInventors: Markus FIESS, Han Chang PAN, Yu Lin WANG, Chia Chin CHO
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Patent number: 9777945Abstract: An adjustable washing rack for an air conditioner contains: a body and a water collection bag. The body includes two opposite supports, a first adjusting rod, and a fixing rod. Each support has a first connecting portion, a rotatable coupling portion, and a second connecting portion. The first adjusting rod is defined between two first connecting portions of the two supports and has a first outer fitting extension and a first inner fitting extension. The fixing rod has a second outer fitting extension and two second inner fitting extensions. The each second inner fitting extension has a first end coupled with a connector for rotatably connecting with the rotatable coupling portion of the each support, and a positioning device is mounted between the connector and the rotatable coupling portion of the each support. The water collection bag includes an opening and a U-shaped surrounding part.Type: GrantFiled: August 31, 2015Date of Patent: October 3, 2017Inventor: Chang-An Pan
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Publication number: 20170059200Abstract: An adjustable washing rack for an air conditioner contains: a body and a water collection bag. The body includes two opposite supports, a first adjusting rod, and a fixing rod. Each support has a first connecting portion, a rotatable coupling portion, and a second connecting portion. The first adjusting rod is defined between two first connecting portions of the two supports and has a first outer fitting extension and a first inner fitting extension. The fixing rod has a second outer fitting extension and two second inner fitting extensions. The each second inner fitting extension has a first end coupled with a connector for rotatably connecting with the rotatable coupling portion of the each support, and a positioning device is mounted between the connector and the rotatable coupling portion of the each support. The water collection bag includes an opening and a U-shaped surrounding part.Type: ApplicationFiled: August 31, 2015Publication date: March 2, 2017Inventor: Chang-An Pan
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Publication number: 20160103156Abstract: According to one embodiment of a system for measuring a load impedance, comprising: a switch module, a first reference impedance, a second reference impedance, and a control module, wherein the switch module connects the first reference impedance, the second reference impedance, and the load impedance, respectively; the control module connects the switch module; the control module connects the first reference impedance via controlling the switch module to obtain a first voltage value; the control module connects the second reference impedance via controlling the switch module to obtain a second voltage value; the control module connects the load impedance via controlling the switch module to obtain a load voltage value; and the control module calculates the measured value of the load impedance according to the first voltage value, the second voltage value, and the load voltage value.Type: ApplicationFiled: October 9, 2014Publication date: April 14, 2016Applicant: SAVITECH CORP.Inventors: Hung-Chang TSAO, Chia-Chi CHANG, Shin-Chang PAN, Hung-Chi CHIAUNG, Nan-Shiung HUANG, Chi-Chien CHEN
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Patent number: D895182Type: GrantFiled: March 22, 2019Date of Patent: September 1, 2020Assignee: Zhongshan Winstar Electrical Co., Ltd.Inventors: Xiao Shan Liang, Jie Chang Pan