Abstract: An electronic device may have a hinge that allows the device to be flexed about a bend axis. A display may span the bend axis. To facilitate bending about the bend axis without damage, the display may include a display cover layer with a flexible portion. The flexible portion of the display cover layer may be interposed between first and second rigid portions of the display cover layer. The display cover layer may also include a layer with self-healing properties. The layer of self-healing material may be formed across the entire display cover layer or may be formed only in the flexible region of the display cover layer. The display cover layer may include a layer of elastomer in the flexible region of the display cover layer for increased flexibility. Self-healing may be initiated or expedited by externally applied heat, light, electric current, or other type of external stimulus.

Abstract: The present disclosure relates a method of forming an integrated chip packaging device. In some embodiments, the method may be performed by forming a conductive trace on a surface of a packaging component. The conductive trace has an angled surface defining an undercut. A molding material is deposited over an entirety of the conductive trace and within the undercut. The molding material is removed from an upper surface of the conductive trace. The molding material has a sloped outermost sidewall after removing the molding material from the upper surface. A solder region is formed on the upper surface of the conductive trace.

Abstract: An electronic device such as a wearable electronic device may have a band. The band may form a stand-alone device or a strap for a wristwatch unit or other device. Electrical components may be mounted on flexible printed circuit substrates. A substrate may be encapsulated by elastomeric polymer material or other material forming the band. The elastomeric polymer material may form cavities that receive the electrical components. Components such as light-emitting diodes may be mounted to the flexible printed circuit substrates so that the light-emitting diodes are located in the cavities. Reflective sidewalls in the cavities may reflect light from the light-emitting diodes outwardly through a thinned portion of the band. Light-diffusing material in the cavities may be formed from clear polymer with light-scattering particles.

Abstract: Protective cover layers for electronic devices are described. In an embodiment, an electronic device includes a display panel and a protective cover layer over the display panel. The protective cover layer includes a transparent support substrate and a hardcoat layer covering an exterior facing surface of the transparent support substrate. The display panel may be a flexible display panel and the protective cover layer may flex with the flexible display panel.

Abstract: A device and method of manufacture is provided that utilize a dummy pad feature adjacent contact pads. The contact pads may be contact pads in an integrated fan-out package in which a molding compound is placed along sidewalls of a die and the contact pads extend over the die and the molding compound. The contact pads are electrically coupled to the die using one or more redistribution layers. The dummy pad features are electrically isolated from the contact pads. In some embodiments, the dummy pad features partially encircle the contact pads and are located in a corner region of the molding compound, a corner region of the die, and/or an interface region between an edge of the die and the molding compound.

Abstract: A device and method of manufacture is provided that utilize a dummy pad feature adjacent contact pads. The contact pads may be contact pads in an integrated fan-out package in which a molding compound is placed along sidewalls of a die and the contact pads extend over the die and the molding compound. The contact pads are electrically coupled to the die using one or more redistribution layers. The dummy pad features are electrically isolated from the contact pads. In some embodiments, the dummy pad features partially encircle the contact pads and are located in a corner region of the molding compound, a corner region of the die, and/or an interface region between an edge of the die and the molding compound.

Abstract: The present disclosure relates a method of forming an integrated chip packaging device. In some embodiments, the method may be performed by forming a conductive trace on a surface of a packaging component. The conductive trace has an angled surface defining an undercut. A molding material is deposited over an entirety of the conductive trace and within the undercut. The molding material is removed from an upper surface of the conductive trace. The molding material has a sloped outermost sidewall after removing the molding material from the upper surface. A solder region is formed on the upper surface of the conductive trace.

Abstract: The present disclosure relates to an integrated chip packaging device. In some embodiments, the packaging device has a first package component. A metal trace is arranged on a surface of the first package component. The metal trace has an undercut. A molding material fills the undercut of the metal trace and has a sloped outermost sidewall with a height that monotonically decreases from a position below a top surface of the metal trace to the surface of the first package component. A solder region is arranged over the metal trace.

Abstract: The mechanisms of forming a copper post structures described enable formation of copper post structures on a flat conductive surface. In addition, the copper post structures are supported by a molding layer with a Young's modulus (or a harder material) higher than polyimide. The copper post structures formed greatly reduce the risk of cracking of passivation layer and delamination of at the dielectric interface surrounding the copper post structures.

Abstract: A bump structure includes a contact element formed on a substrate and a passivation layer overlying the substrate. The passivation layer includes a passivation opening exposing the contact element. The bump structure also includes a polyimide layer overlying the passivation layer and an under bump metallurgy (UBM) feature electrically coupled to the contact element. The polyimide layer has a polyimide opening exposing the contact element, and the under bump metallurgy feature has a UBM width. The bump structure further includes a copper pillar on the under bump metallurgy feature. A distal end of the copper pillar has a pillar width, and the UBM width is greater than the pillar width.

Abstract: A device and method of manufacture is provided that utilize a dummy pad feature adjacent contact pads. The contact pads may be contact pads in an integrated fan-out package in which a molding compound is placed along sidewalls of a die and the contact pads extend over the die and the molding compound. The contact pads are electrically coupled to the die using one or more redistribution layers. The dummy pad features are electrically isolated from the contact pads. In some embodiments, the dummy pad features partially encircle the contact pads and are located in a corner region of the molding compound, a corner region of the die, and/or an interface region between an edge of the die and the molding compound.

Abstract: Some embodiments of the present disclosure provide a method of manufacturing a device. The method includes providing a carrier, the carrier including a top surface, covering a portion of the top surface with a plurality of active dies, disposing a protrudent band over a periphery of the carrier, wherein the protrudent band includes a rim shaped along the contour of the carrier, and forming a molding compound over the carrier to cover the plurality of active dies. A method for determining a width of the protrudent band of a device described herein is also provided.

Abstract: A device and method of manufacture is provided that utilize a dummy pad feature adjacent contact pads. The contact pads may be contact pads in an integrated fan-out package in which a molding compound is placed along sidewalls of a die and the contact pads extend over the die and the molding compound. The contact pads are electrically coupled to the die using one or more redistribution layers. The dummy pad features are electrically isolated from the contact pads. In some embodiments, the dummy pad features partially encircle the contact pads and are located in a corner region of the molding compound, a corner region of the die, and/or an interface region between an edge of the die and the molding compound.

Abstract: An embodiment package includes a first fan-out tier, fan-out redistribution layers (RDLs) over the first fan-out tier, and a second fan-out tier over the fan-out RDLs. The first fan-out tier includes one or more first device dies and a first molding compound extending along sidewalls of the one or more first device dies. The second fan-out tier includes one or more second device dies bonded to fan-out RDLs, a dummy die bonded to the fan-out RDLs, and a second molding compound extending along sidewalls of the one or more second device dies and the dummy die. The fan-out RDLs electrically connects the one or more first device dies to the one or more second device dies, and the dummy die is substantially free of any active devices.

Abstract: A bump structure includes a contact element formed on a substrate and a passivation layer overlying the substrate. The passivation layer includes a passivation opening exposing the contact element. The bump structure also includes a polyimide layer overlying the passivation layer and an under bump metallurgy (UBM) feature electrically coupled to the contact element. The polyimide layer has a polyimide opening exposing the contact element, and the under bump metallurgy feature has a UBM width. The bump structure further includes a copper pillar on the under bump metallurgy feature. A distal end of the copper pillar has a pillar width, and the UBM width is greater than the pillar width.

Abstract: Methods and apparatuses for a attaching a first substrate to a second substrate are provided. In some embodiments, a first substrate has a protective layer, such as a solder mask, around a die attach area, at which a second substrate is attached. A keep-out region (e.g., an area between the second substrate and the protective layer) is a region around the second substrate in which the protective layer is not formed or removed. The keep-out region is sized such that a sufficient gap exists between the second substrate and the protective layer to place an underfill between the first substrate and the second substrate while reducing or preventing voids and while allowing traces in the keep-out region to be covered by the underfill.

Abstract: The present disclosure relates to an integrated chip packaging device. In some embodiments, the packaging device has a first package component. A metal trace is arranged on a surface of the first package component. The metal trace has an undercut. A molding material fills the undercut of the metal trace and has a sloped outermost sidewall with a height that monotonically decreases from a position below a top surface of the metal trace to the surface of the first package component. A solder region is arranged over the metal trace.

Abstract: A bump structure includes a contact element formed on a substrate and a passivation layer overlying the substrate. The passivation layer includes a passivation opening exposing the contact element. The bump structure also includes a polyimide layer overlying the passivation layer and an under bump metallurgy (UBM) feature electrically coupled to the contact element. The polyimide layer has a polyimide opening exposing the contact element, and the under bump metallurgy feature has a UBM width. The bump structure further includes a copper pillar on the under bump metallurgy feature. A distal end of the copper pillar has a pillar width, and the UBM width is greater than the pillar width.

Abstract: An embodiment package includes a first fan-out tier, fan-out redistribution layers (RDLs) over the first fan-out tier, and a second fan-out tier over the fan-out RDLs. The first fan-out tier includes one or more first device dies and a first molding compound extending along sidewalls of the one or more first device dies. The second fan-out tier includes one or more second device dies bonded to fan-out RDLs, a dummy die bonded to the fan-out RDLs, and a second molding compound extending along sidewalls of the one or more second device dies and the dummy die. The fan-out RDLs electrically connects the one or more first device dies to the one or more second device dies, and the dummy die is substantially free of any active devices.

Abstract: A device includes a first and a second package component. A metal trace is disposed on a surface of the first package component. The metal trace has a lengthwise direction. The second package component includes a metal pillar, wherein the second package component is disposed over the first package component. A solder region bonds the metal pillar to the metal trace, wherein the solder region contacts a top surface of the metal trace.