Abstract: An apparatus and a method for semiconductor manufacturing processes are disclosed. The apparatus includes a wafer holder configured to hold a wafer, a nozzle disposed above the wafer and configured to provide a material to the wafer, and a nozzle control device configured to adjust a configuration of the nozzle to improve a uniformity of the material disposed onto the wafer. The method include loading the wafer into a chamber, feeding the material into the chamber through the nozzle, measuring a thickness profile of the material disposed onto the wafer, and adjusting a configuration of the nozzle based on the thickness profile.

Abstract: An integrated circuit device having functional circuitry driven by a clock signal includes onboard clock generation circuitry. The clock generation circuitry includes an input configured to accept a frequency reference signal, at least one variable loading capacitor coupled to the input for converting the crystal resonator signal into a calibrated clock signal, and calibration circuitry configured to calibrate the at least one variable loading capacitor based on a reference voltage. The input configured to accept a frequency reference signal may be configured to accept a crystal resonator signal.

Abstract: A voltage control method for a switched mode power supply (SMPS) is provided. A first voltage value is determined, and a voltage adjustment mode of the SMPS is enabled. In the voltage adjustment mode, user modules operate in an operation scenario, and whether one of the user modules enables a high-voltage requirement is determined according to operation states of at least two user modules. In response to one user module enabling the high-voltage requirement, the switched mode power supply is controlled to generate a power supply voltage with the first voltage value. LDOs generate output voltages according to the power supply voltage for driving the user modules respectively. In response to none of the plurality of user modules enabling the high-voltage requirement, the SMPS is controlled to generate the power supply voltage with a voltage value that is less than the first voltage value.

Abstract: A device including a mount, a first arm coupled to the mount, and a second arm coupled to the mount. The first arm includes first teeth and the second arm includes second teeth. A first light assembly rotationally couples to the first arm, and includes a first coupler that engages with the first teeth. A second light assembly rotationally couples to the second arm, and includes a second coupler that engages with the second teeth. A camera assembly pivotably couples to the mount, and includes a camera, a first passive infrared (PIR) sensor, and a second PIR sensor.

Abstract: This disclosure provides a wafer processing method having the following steps: providing a wafer (10), an immersion device (100), a carrier (200), and a spray device (300); turning the wafer (10) from a horizontal manner to an upright manner; upright placing the wafer (10) into the immersion device (100) for immersion; taking the wafer (10) out from the immersion device (100) and placing that onto the carrier (200) horizontally; spraying a liquid on the wafer (10) by the spray device (300); rinsing the wafer (10); rotating the carrier (200) to dry the wafer (10). Multiple steps for processing the wafer (10) may be performed on the same carrier (200) to accelerate the process.

Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first micro-light-emitting diodes on a first temporary substrate; and replacing at least one defective micro-light-emitting diode of the first micro-light-emitting diodes with at least one second micro-light-emitting diode. The first micro-light-emitting diodes and at least one second micro-light-emitting diode are distributed on the first temporary substrate. The first micro-light-emitting diodes and at least one second micro-light-emitting diode have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first micro-light-emitting diodes and at least one second micro-light-emitting diode. A semiconductor structure and a display panel are also provided.

Abstract: A micro light emitting diode display device includes a circuit substrate, a plurality of positioning protrusions disposed on the circuit substrate, and a plurality of micro light emitting diodes. Each positioning protrusion has a positioning side surface and a bottom surface. A first angle is included between each positioning side surface and the corresponding bottom surface. The positioning protrusions form positioning spaces on the circuit substrate. The micro light emitting diodes are disposed in the separated positioning spaces and are electrically connected to the circuit substrate. Each micro light emitting diode has a light emitting surface and a side surface. Each light emitting surface is located at a side of the corresponding micro light emitting diode away from the circuit substrate. A second angle is included between each side surface and the corresponding light emitting surface and is less than 90 degrees and greater than or equal to the first angle.

Abstract: A micro LED display device includes a display back plate having a first connecting electrode and a second connecting electrode, a micro LED structure disposed on the display back plate, and a first bonding structure and a second bonding structure disposed between the display back plate and the micro LED structure. The micro LED structure includes an epitaxial structure, and a first electrode and a second disposed on the side of the epitaxial structure closest to the display back plate. The orthogonal projections of the extension portions of the first electrode and the second electrode both exceed the orthogonal projection of the epitaxial structure on the display back plate. Neither the orthogonal projection of the first bonding structure nor the orthogonal projection of the second bonding structure overlaps the orthogonal projection of the bottom surface of the epitaxial structure on the display back plate.

Abstract: A semiconductor package structure and a method of manufacturing the same are provided. A semiconductor package structure includes a first electronic component and a light emitter. The photonic component includes a substrate and a first port. The light emitter is disposed over the substrate of the photonic component. The light emitter is configured to emit light through the first port. A coupling loss between the first port of the photonic component and the light emitter is less than 3 dB.

Abstract: A liquid injection device includes a nozzle, a moving element and a control valve. The nozzle has a channel, a bypass passage and a suck back passage. The channel penetrates through the nozzle for injecting a working fluid. The channel has a liquid outlet. The bypass passage has a first opening, a switch-on position and a switch-off position. The suck back passage has a second opening between the first opening and the liquid outlet. The first opening and the second opening communicate with the channel. The moving element is disposed in the bypass passage. The control valve is disposed on the nozzle and controls the moving element to switch between the switch-on position and the switch-off position to open or close the channel. A suck back pump sucks the working fluid remaining between the first opening and the liquid outlet when the moving element is located at the switch-off position.

Abstract: A micro light emitting diode display panel includes a backplane and a plurality of micro light emitting diode chips. The backplane includes a plurality first electrode lines and a plurality of second electrode lines. The first electrode lines and the second electrode lines define a plurality of sub-pixel regions arranged in an array form. The micro light emitting diode chips are disposed on the backplane and respectively located in the sub-pixel regions. Each of the micro light emitting diode chips has a first electrode, a plurality of second electrodes and a plurality of light-emitting regions. The first electrode is boned to one of the first electrode lines, and the second electrodes are boned to one of the second met lines. In a defect sub-pixel region, the electrical connection between one of the second electrodes and the corresponding one of the second electrode lines is cut to isolate.

Abstract: A light-emitting diode structure including a semiconductor stack layer is provided. The semiconductor stack layer includes a first type semiconductor layer, an active layer, and a second type semiconductor layer. The active layer is disposed on the first type semiconductor layer. The second type semiconductor layer is disposed on the active layer. A side wall at any side of the semiconductor stack layer includes a rough surface. A manufacturing method of a light-emitting diode structure is also provided.

Abstract: An end cover assembly, an air cylinder, a tread sweeper and a railway vehicle.

Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first micro-light-emitting diodes on a first temporary substrate; and replacing at least one defective micro-light-emitting diode of the first micro-light-emitting diodes with at least one second micro-light-emitting diode. The first micro-light-emitting diodes and at least one second micro-light-emitting diode are distributed on the first temporary substrate. The first micro-light-emitting diodes and at least one second micro-light-emitting diode have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first micro-light-emitting diodes and at least one second micro-light-emitting diode. A semiconductor structure and a display panel are also provided.

Abstract: An integrated circuit device having functional circuitry driven by a clock signal includes onboard clock generation circuitry. The clock generation circuitry includes an input configured to accept a frequency reference signal, at least one variable loading capacitor coupled to the input for converting the crystal resonator signal into a calibrated clock signal, and calibration circuitry configured to calibrate the at least one variable loading capacitor based on a reference voltage. The input configured to accept a frequency reference signal may be configured to accept a crystal resonator signal.

Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first microelectronic elements on a first temporary substrate; and replacing at least one defective microelectronic element of the first microelectronic elements with at least one second microelectronic element. The first microelectronic elements and at least one second microelectronic element are distributed on the first temporary substrate. The first microelectronic elements and at least one second microelectronic element have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first microelectronic elements and at least one second microelectronic element. A semiconductor structure and a display panel are also provided.

Abstract: An integrated circuit device having functional circuitry driven by a clock signal includes onboard clock generation circuitry. The clock generation circuitry includes an input configured to accept a frequency reference signal, at least one variable loading capacitor coupled to the input for converting the crystal resonator signal into a calibrated clock signal, and calibration circuitry configured to calibrate the at least one variable loading capacitor based on a reference voltage. The input configured to accept a frequency reference signal may be configured to accept a crystal resonator signal.

Abstract: An optoelectronic package is provided. The optoelectronic package includes a photonic component. The photonic component has a bottom surface and a lateral surface. The lateral surface of the photonic component includes a light coupling region and a non-light coupling plane. The non-light coupling plane contacts the bottom surface. The light coupling region and the non-light coupling plane are not aligned.