Patents by Inventor Chang Feng Wan

Chang Feng Wan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8541256
    Abstract: In the preferred embodiment of the present invention, narrow bandgap II-VI compound semiconductor HgxCd1-xTe (0.1?x?0.5) (HgCdTe) wafers are annealed under Cd supersaturated conditions by exposing the HgCdTe planar or mesa surfaces to a Cd molecular beam in a vacuum deposition system before, during, and/or after anneals performed during individual photodiode fabrication process steps or HgCdTe epitaxial growth steps for eliminating or neutralizing the bulk or interfacial defects.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: September 24, 2013
    Inventor: Chang-Feng Wan
  • Publication number: 20120264254
    Abstract: In the preferred embodiment of the present invention, narrow bandgap II-VI compound semiconductor HgxCd1-xTe (0.1?x?0.5) (HgCdTe) wafers are annealed under Cd supersaturated conditions by exposing the HgCdTe planar or mesa surfaces to a Cd molecular beam in a vacuum deposition system before, during, and/or after anneals performed during individual photodiode fabrication process steps or HgCdTe epitaxial growth steps for eliminating or neutralizing the bulk or interfacial defects.
    Type: Application
    Filed: March 16, 2012
    Publication date: October 18, 2012
    Inventor: Chang-Feng Wan
  • Patent number: 7952189
    Abstract: An embodiment of the present invention provides a method of manufacturing hermetic packaging for devices on a substrate wafer, comprising forming a plurality of adhesive rings on a cap wafer or the substrate wafer, bonding the cap wafer to the substrate wafer with an adhesive layer, forming trenches in the cap wafer and the adhesive rings along outer rim of the adhesive rings, and covering sidewall of the trenches by at least one deposited film to provide a diffusion barrier to moisture or gas.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: May 31, 2011
    Inventor: Chang-Feng Wan
  • Patent number: 7612340
    Abstract: An avalanche photodiode is operated in avalanche mode at a selected reverse bias that achieves high gain and a reduced gain normalized dark current.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: November 3, 2009
    Assignee: DRS Sensors & Targeting Systems, Inc.
    Inventors: Jeffrey Don Beck, Pradip Mitra, Chang-Feng Wan, Michael A. Kinch
  • Patent number: 7579663
    Abstract: A system and method for manufacturing micro cavity packaging enclosure at the wafer level using MEMS (MicroElectroMechanical Systems) process, wherein micro cavities are formed from epoxy-bonded single-crystalline silicon wafer as its cap, epoxy and deposited metal or insulator as at least part of its sidewall, on substrate wafers.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: August 25, 2009
    Inventor: Chang-Feng Wan
  • Patent number: 7541214
    Abstract: The present invention is related to a method for manufacturing micro-electro-mechanical systems (MEMS) having movable and stationary suspended structures formed from mono-crystalline silicon wafer or chip, bonded to a substrate wafer with an polymer adhesive layer that serves as spacer and as a sacrificial layer which is undercut by dry etch means. The substrate wafer contains electronic circuits for sensing and actuating the suspended structure by electrical means. Electrical interconnections between the suspended structures and the substrate can be made by etching through via holes in the suspended structure and the adhesive, depositing metal layers in the via holes, and removing the metal layers from outside the via holes. The metal layers in the via holes can also be used as pillars for supporting the suspended structures. This method can be used to manufacture inertial sensors.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: June 2, 2009
    Inventor: Chang-Feng Wan
  • Publication number: 20090029500
    Abstract: An embodiment of the present invention provides a method of manufacturing hermetic packaging for devices on a substrate wafer, comprising forming a plurality of adhesive rings on a cap wafer or the substrate wafer, bonding the cap wafer to the substrate wafer with an adhesive layer, forming trenches in the cap wafer and the adhesive rings along outer rim of the adhesive rings, and covering sidewall of the trenches by at least one deposited film to provide a diffusion barrier to moisture or gas.
    Type: Application
    Filed: June 8, 2008
    Publication date: January 29, 2009
    Inventor: Chang-Feng Wan
  • Publication number: 20080308920
    Abstract: A system and method for manufacturing micro cavity packaging enclosure at the wafer level using MEMS (MicroElectroMechanical Systems) process, wherein micro cavities are formed from epoxy-bonded single-crystalline silicon wafer as its cap, epoxy and deposited metal or insulator as at least part of its sidewall, on substrate wafers.
    Type: Application
    Filed: February 11, 2008
    Publication date: December 18, 2008
    Inventor: Chang-Feng Wan
  • Patent number: 7429495
    Abstract: A system and method for manufacturing micro cavities at the wafer level using a unique, innovative MEMS (MicroElectroMechanical Systems) process, wherein micro cavities are formed, with epoxy bonded single-crystalline silicon membrane as cap and deposited and/or electroplated metal as sidewall, on substrate wafers. The epoxy is also the sacrificial layer. It is removed from within the cavity through small etch access holes etched in the silicon cap before the etch access holes are sealed under vacuum. The micro cavities manufactured therein can be used as pressure sensors or for packaging MEMS devices under vacuum or inert environment. In addition, the silicon membrane manufactured therein can be used to manufacture RF switches.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: September 30, 2008
    Inventor: Chang-Feng Wan
  • Publication number: 20080138922
    Abstract: The present invention is related to a method for manufacturing micro-electro-mechanical systems (MEMS) having movable and stationary suspended structures formed from mono-crystalline silicon wafer or chip, bonded to a substrate wafer with an polymer adhesive layer that serves as spacer and as a sacrificial layer which is undercut by dry etch means. The substrate wafer contains electronic circuits for sensing and actuating the suspended structure by electrical means. Electrical interconnections between the suspended structures and the substrate can be made by etching through via holes in the suspended structure and the adhesive, depositing metal layers in the via holes, and removing the metal layers from outside the via holes. The metal layers in the via holes can also be used as pillars for supporting the suspended structures. This method can be used to manufacture inertial sensors.
    Type: Application
    Filed: August 7, 2002
    Publication date: June 12, 2008
    Inventor: Chang-Feng Wan
  • Publication number: 20070222334
    Abstract: An embodiment of the present invention provides a step actuator, comprising a suspended membrane comprising a plurality of movable electrodes connected by plurality of spring hinges to a payload platform; and pillars connecting said membrane to a substrate, said substrate comprising a plurality of fixed electrodes; wherein said movable electrodes of said suspended membrane and said fixed electrodes from said substrate form parallel-plate electrostatic sub-actuators. Another embodiment of the present invention provides controlled operation of the step actuator over its entire range of motion, by avoiding its instability region and both digital and analog operations with enhanced stroke. It comprises a suspended membrane comprising a plurality of fixed electrodes, a plurality of movable electrodes connected by plurality of spring hinges to a medial payload platform. The fixed electrodes comprise insulator stops that keep the movable electrodes from entering the unstable region.
    Type: Application
    Filed: March 24, 2006
    Publication date: September 27, 2007
    Inventor: Chang-Feng Wan
  • Patent number: 7265477
    Abstract: An embodiment of the present invention provides a stepping actuator, comprising a suspended membrane comprising a plurality of movable electrodes connected by plurality of spring hinges to a payload platform; and anchors connecting said membrane to a substrate, said substrate comprising a plurality of fixed electrodes; wherein said movable electrodes of said suspended membrane and said fixed electrodes from said substrate form parallel-plate electrostatic sub-actuators.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: September 4, 2007
    Inventor: Chang-Feng Wan
  • Patent number: 7265429
    Abstract: A system and method for manufacturing micro cavities at the wafer level using a unique, innovative MEMS (MicroElectroMechanical Systems) process, wherein micro cavities are formed, with epoxy bonded single-crystalline silicon membrane as cap and deposited and/or electroplated metal as sidewall, on substrate wafers. The epoxy is also the sacrificial layer. It is totally removed from within the cavity through small etch access holes etched in the silicon cap before the etch access holes are sealed under vacuum. The micro cavities manufactured therein can be used as pressure sensors or for packaging MEMS devices under vacuum or inert environment. In addition, the silicon membrane manufactured therein can be used to manufacture RF switches.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: September 4, 2007
    Inventor: Chang-Feng Wan
  • Publication number: 20070029485
    Abstract: An avalanche photodiode is operated in avalanche mode at a selected reverse bias that achieves high gain and a reduced gain normalized dark current.
    Type: Application
    Filed: August 3, 2005
    Publication date: February 8, 2007
    Inventors: Jeffrey Beck, Pradip Mitra, Chang-Feng Wan, Michael Kinch
  • Patent number: 7005775
    Abstract: The present invention is related to a novel micro-electro-mechanical systems (MEMS) torsional drive that is capable of tilting suspended structure such as a micro-mirror for steering light beams in three-dimensional analog fashion, which is suitable for high port count optical switches. The torsional drive has the advantages of allowing large tilt angle, having low drive voltage, and capable of providing a feedback signal for closed-loop control.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: February 28, 2006
    Inventor: Chang Feng Wan
  • Publication number: 20050017313
    Abstract: A system and method for manufacturing micro cavities at the wafer level using a unique, innovative MEMS (MicroElectroMechanical Systems) process, wherein micro cavities are formed, with epoxy bonded single-crystalline silicon membrane as cap and deposited and/or electroplated metal as sidewall, on substrate wafers. The epoxy is also the sacrificial layer. It is totally removed from within the cavity through small etch access holes etched in the silicon cap before the etch access holes are sealed under vacuum. The micro cavities manufactured therein can be used as pressure sensors or for packaging MEMS devices under vacuum or inert environment. In addition, the silicon membrane manufactured therein can be used to manufacture RF switches.
    Type: Application
    Filed: November 13, 2003
    Publication date: January 27, 2005
    Inventor: Chang-Feng Wan
  • Patent number: 6538296
    Abstract: A micro-electro-mechanical device and method of manufacture therefore with a suspended structure formed from mono-crystalline silicon, bonded to a substrate wafer with an organic adhesive layer serving as support and spacer and the rest of the organic adhesive layer serving as a sacrificial layer, which is removed by a dry etch means. Said substrate wafer may contain integrated circuits for sensing and controlling the device.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: March 25, 2003
    Inventor: Chang-Feng Wan
  • Patent number: 6127203
    Abstract: This invention relates to mounting integrated circuits (IC) to multi-chip modules (MCM) or substrates. More specifically, it provides a method of mounting a semiconductor die such as a thin slice of Mercury Cadmium Telluride (MCT) to a silicon semiconductor substrate, a read-out integrated circuit (ROIC), using a thermoplastic to reduce stress on the MCT caused by mismatched Coefficients of Thermal Expansion (CTE). This process provides for an array of infrared photodetectors on a material such as MCT to be mounted to a read-out integrated circuit (ROIC) using the Vertical Integrated Photodiode (VIP) approach to FPAs, while allowing double sided interdiffusion of CdTe for surface passivation to reduce dark currents and improve performance, without the problems associated with mismatched coefficients of thermal expansion during high temperature processes.
    Type: Grant
    Filed: May 5, 1999
    Date of Patent: October 3, 2000
    Assignee: DRS Technologies, Inc.
    Inventors: Chang-Feng Wan, Richard Scott List, Curtis Gene Garrett, Dwight U. Bartholomew
  • Patent number: 6060336
    Abstract: A micro-electro-mechanical device and method of manufacture therefore with a suspended structure formed from mono-crystalline silicon, bonded to a substrate wafer with an organic adhesive layer serving as support and spacer and the rest of the organic adhesive layer serving as a sacrificial layer, which is removed by a dry etch means. Said substrate wafer may contain integrated circuits for sensing and controlling the device.
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: May 9, 2000
    Assignee: C.F. Wan Incorporated
    Inventor: Chang-Feng Wan
  • Patent number: 5959340
    Abstract: This invention relates to mounting integrated circuits (IC) to multi-chip modules (MCM) or substrates. More specifically, it provides a method of mounting a semiconductor die such as a thin slice of Mercury Cadmium Telluride (MCT) to a silicon semiconductor substrate, a read-out integrated circuit (ROIC), using a thermoplastic to reduce stress on the MCT caused by mismatched Coefficients of Thermal Expansion (CTE). This process provides for an array of infrared photodetectors on a material such as MCT to be mounted to a read-out integrated circuit (ROIC) using the Vertical Integrated Photodiode (VIP) approach to FPAs, while allowing double sided interdiffusion of CdTe for surface passivation to reduce dark currents and improve performance, without the problems associated with mismatched coefficients of thermal expansion during high temperature processes.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: September 28, 1999
    Assignee: DRS Technologies, Inc.
    Inventors: Chang-Feng Wan, Richard Scott List, Curtis Gene Garrett, Dwight U. Bartholomew