Patents by Inventor Chang Huang
Chang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11195098Abstract: Disclosed are a method for generating a neural network, an apparatus thereof, and an electronic device. The method includes: obtaining an optimal neural network and a worst neural network from a neural network framework by using an evolutionary algorithm; obtaining an optimized neural network from the optimal neural network by using a reinforcement learning algorithm; updating the neural network framework by adding the optimized neural network into the neural network framework and deleting the worst neural network from the neural network framework; and determining an ultimately generated neural network from the updated neural network framework. In this way, a neural network is optimized and updated from a neural network framework by combining the evolutionary algorithm and the reinforcement learning algorithm, thereby automatically generating a neural network structure rapidly and stably.Type: GrantFiled: October 28, 2019Date of Patent: December 7, 2021Assignee: Beijing Horizon Robotics Technology Research and Development Co., Ltd.Inventors: Yukang Chen, Qian Zhang, Chang Huang
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Patent number: 11196249Abstract: An electrostatic discharge (ESD) blocking circuit including an internal circuit, a first Schottky diode, and an ESD releasing element is provided. The first Schottky diode is coupled between a specific node and the internal circuit. The ESD releasing element is coupled between the specific node and the first power terminal. In response to an ESD event occurring at the specific node, the ESD releasing element is turned on to release the ESD current from the specific node to the first power terminal.Type: GrantFiled: April 21, 2020Date of Patent: December 7, 2021Assignee: Vanguard International Semiconductor CorporationInventors: Yeh-Ning Jou, Jian-Hsing Lee, Shao-Chang Huang, Chih-Hsuan Lin, Hwa-Chyi Chiou
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Publication number: 20210373224Abstract: A light guide plate includes a main body, first stripe structures and second stripe structures. The main body has an optical surface, a light-incident surface and an opposite light-incident surface. The main body has a hole passing through the optical surface, and the optical surface has a first region and a second region which are separated by an imaginary line. The imaginary line intersects the hole. The hole has a first side near the opposite light-incident surface and a second side near the light-incident surface. A portion of each of the first stripe structures is disposed in the first region. The second stripe structures are disposed in the second region. An extending direction of at least one portion of each first stripe structure is vertical to the light-incident surface, and a portion of the second stripe structures extends to the first side of the hole near the opposite light-incident surface.Type: ApplicationFiled: August 12, 2021Publication date: December 2, 2021Inventors: Chia-Yin CHANG, Po-Chang HUANG, Kun-Cheng LIN
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Patent number: 11187602Abstract: A method includes disposing a wafer in a cup of a clamshell of an electroplating apparatus. The wafer is clamped using the cup and a cone of the clamshell. A pressure force applied by the cone against the wafer is detected. Stopping clamping the wafer when the pressure force is higher than a predetermined value.Type: GrantFiled: April 30, 2019Date of Patent: November 30, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yung-Chang Huang, Tsun-En Kuo
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Publication number: 20210366802Abstract: A semiconductor package includes a substrate, a stacked structure, an encapsulation material, a lid structure, and a coupler. The stacked structure is disposed over and bonded to the substrate. The encapsulation material partially encapsulates the stacked structure. The lid structure is disposed on the substrate, wherein the lid structure surrounds the stacked structure and covers a top surface of the stacked structure. The coupler is bonded to the stacked structure, wherein a portion of the coupler penetrates through and extends out of the lid structure.Type: ApplicationFiled: May 22, 2020Publication date: November 25, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sung-Hui Huang, Shang-Yun Hou, Tien-Yu Huang, Heh-Chang Huang, Kuan-Yu Huang, Shu-Chia Hsu, Yu-Shun Lin
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Publication number: 20210356989Abstract: The present invention relates to the field of vehicle diagnostic tablet computers, and provides a vehicle diagnostic tablet computer and a housing assembly thereof. The housing assembly includes a housing and a support frame. The support frame is mounted to the housing, and the support frame is rotatable to a first position or a second position about a rotation axis relative to the housing. The support frame rotates to the first position about the rotation axis relative to the housing when the support frame is unfolded relative to the housing. The support frame is capable of supporting the housing. The support frame rotates to the second position about the rotation axis relative to the housing when the support frame is folded relative to the housing.Type: ApplicationFiled: July 28, 2021Publication date: November 18, 2021Inventor: Chang HUANG
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Patent number: 11177302Abstract: A semiconductor device includes a device layer, a semiconductor layer, a sensor element, a dielectric layer, a color filter layer, and a micro-lens. The semiconductor layer is over the device layer. The semiconductor layer has a plurality of microstructures thereon. Each of the microstructures has a substantially triangular cross-section. The sensor element is under the microstructures of the semiconductor layer and is configured to sense incident light. The dielectric layer is over the microstructures of the semiconductor layer. The color filter layer is over the dielectric layer. The micro-lens is over the color filter layer.Type: GrantFiled: December 13, 2018Date of Patent: November 16, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-Nan Tu, Yu-Lung Yeh, Hsing-Chih Lin, Chien-Chang Huang, Shih-Shiung Chen
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Patent number: 11164979Abstract: A semiconductor device includes a semiconductor substrate, a Schottky layer, a plurality of first doped regions, a plurality of second doped regions, a first conductive layer and a second conductive layer. The semiconductor substrate includes a first conductive type, and the Schottky layer is disposed on the semiconductor substrate. The first doped regions and the second doped regions include a second conductive type, and which are disposed within the semiconductor substrate. The first doped regions are in parallel and extended along a first direction, and the second doped regions are in parallel and extended along a second direction to cross the first doped regions, thereby to define a plurality of grid areas. The first conductive layer is disposed on the Schottky layer, and the second conductive layer is disposed under the semiconductor substrate.Type: GrantFiled: August 6, 2020Date of Patent: November 2, 2021Assignee: Vanguard International Semiconductor CorporationInventors: Shao-Chang Huang, Kai-Chieh Hsu, Chun-Chih Chen, Li-Fan Chen, Ching-Ho Li, Ting-You Lin, Gong-Kai Lin, Yeh-Ning Jou, Chien-Hsien Song, Hsiao-Ying Yang, Chien-Chi Hsu, Fu-Chun Tseng
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Patent number: 11158042Abstract: Embodiments of the present disclosure relate to object defect detection. In an embodiment, a computer-implemented method is disclosed. According to the method, for a test image of at least one part of a target object, a reference image is generated by repeating a periodic pattern detected in the test image, the target object consisting of elements. A differential image is determined by comparing the test image and the reference image. The differential image is superimposed on a predefined grid image to obtain a superimposed image. The grid image comprises grids corresponding to elements of a reference object associated with the target object. The number of defective elements is determined in the at least one part of the target object based on the superimposed image. In other embodiments, a system and a computer program product are disclosed.Type: GrantFiled: July 10, 2019Date of Patent: October 26, 2021Assignee: International Business Machines CorporationInventors: Jing Chang Huang, Guo Qiang Hu, Peng Ji, Jun Zhu, Yuan Yuan Ding
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Publication number: 20210328425Abstract: An electrostatic discharge (ESD) blocking circuit including an internal circuit, a first Schottky diode, and an ESD releasing element is provided. The first Schottky diode is coupled between a specific node and the internal circuit. The ESD releasing element is coupled between the specific node and the first power terminal. In response to an ESD event occurring at the specific node, the ESD releasing element is turned on to release the ESD current from the specific node to the first power terminal.Type: ApplicationFiled: April 21, 2020Publication date: October 21, 2021Applicant: Vanguard International Semiconductor CorporationInventors: Yeh-Ning JOU, Jian-Hsing LEE, Shao-Chang HUANG, Chih-Hsuan LIN, Hwa-Chyi CHIOU
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Publication number: 20210320097Abstract: An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.Type: ApplicationFiled: June 23, 2021Publication date: October 14, 2021Inventors: Shang-Yun Hou, Sung-Hui Huang, Kuan-Yu Huang, Hsien-Pin Hu, Yushun Lin, Heh-Chang Huang, Hsing-Kuo Hsia, Chih-Chieh Hung, Ying-Ching Shih, Chin-Fu Kao, Wen-Hsin Wei, Li-Chung Kuo, Chi-Hsi Wu, Chen-Hua Yu
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Patent number: 11143532Abstract: Embodiments of the present invention may be directed toward a method, a system, and a computer program product of adaptive calibration of sensors through cognitive learning. In an exemplary embodiment, the method, the system, and the computer program product include (1) in response to receiving a data from at least one calibration sensor and data from an itinerant sensor, comparing the data from the at least one calibration sensor and the data from the itinerant sensor, (2) in response to the comparing, determining, by one or more processors, the accuracy of the itinerant sensor, (3) generating, by the one or more processors, one or more calibration parameters based on the determining and based on a machine learning associated with preexisting sensor information, and (4) executing, by the one or more processors, the one or more calibration parameters.Type: GrantFiled: October 19, 2017Date of Patent: October 12, 2021Assignee: International Business Machines CorporationInventors: Wei Sun, Ning Duan, Ren Jie Yao, Chun Yang Ma, Peng Ji, Jing Chang Huang, Peng Gao, Zhi Hu Wang
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Patent number: 11138037Abstract: A multi-processor system includes multiple processors arranged in multiple clusters. Different clusters have different power and performance characteristics. The system includes a task scheduler to schedule tasks to the processors. The task scheduler, in response to detection of a scheduling event trigger, is operative to identify a scheduling objective between a first objective of energy optimization and a second objective of load balance. The scheduling objective is identified based on at least respective operating frequencies and loading of all processors in a highest-capacity cluster of the multiple clusters. According to the identified scheduling objective, the task scheduler schedules a given task to a processor selected among the processors in the multiple clusters.Type: GrantFiled: October 23, 2018Date of Patent: October 5, 2021Assignee: MediaTek Inc.Inventors: Ya-Ting Chang, Chien-Hao Chiang, Ting-Chang Huang, Jing-Ting Wu, Jia-Ming Chen
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Patent number: 11137836Abstract: The disclosure provides an electronic device, including a body and a mouse body. The body includes an accommodating area. The mouse body includes a touch surface and is detachably disposed in the accommodating area.Type: GrantFiled: September 27, 2019Date of Patent: October 5, 2021Assignee: ASUSTEK COMPUTER INC.Inventors: Pin-Tang Chiu, Yung-Shen Hsu, Ping-Chang Huang, Ling Tien
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Publication number: 20210301591Abstract: A window blind assembly includes a frame, an input shaft rotatably disposed in the frame, a blind unit, a winding unit for placing the blind unit in a retracted state when the input shaft is rotated in a first rotational direction and for shifting the blind unit to an expanded state when the input shaft is rotated in a second rotational direction, a control unit operable to drive rotation of the input shaft in the first and second rotational directions, a force-assisting unit having a spring capable of exerting a spring force on the control unit to resist the weight of the blind unit acting thereon, and a brake unit connected to the input shaft and generating a frictional force to resist rotation of the input shaft in the second rotational direction.Type: ApplicationFiled: July 29, 2020Publication date: September 30, 2021Applicant: TAICANG KINGFU PLASTIC MANUFACTURE CO., LTD.Inventor: Szu-Chang HUANG
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Patent number: 11119264Abstract: A light guide plate includes a main body, first stripe structures and second stripe structures. The main body has an optical surface, a light-incident surface and an opposite light-incident surface. The main body has a hole passing through the optical surface, and the optical surface has a first region and a second region which are separated by an imaginary line. The imaginary line intersects the hole. The hole has a first side near the opposite light-incident surface and a second side near the light-incident surface. A portion of each of the first stripe structures is disposed in the first region. The second stripe structures are disposed in the second region. An extending direction of at least one portion of each first stripe structure is vertical to the light-incident surface, and a portion of the second stripe structures extends to the first side of the hole near the opposite light-incident surface.Type: GrantFiled: April 13, 2020Date of Patent: September 14, 2021Assignees: RADIANT OPTO-ELECTRONICS (SUZHOU) CO. LTD., RADIANT OPTO-ELECTRONICS CORPORATIONInventors: Chia-Yin Chang, Po-Chang Huang, Kun-Cheng Lin
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Patent number: 11118850Abstract: A thermal abnormality detection system includes: a first heat dissipation system having a first temperature sensor for measuring an actual temperature of the first heat dissipation system; a second heat dissipation system having a second temperature sensor for measuring an actual temperature of the second heat dissipation system. Assuming that a difference between the actual temperature of the first heat dissipation system and an upper limit temperature of the first heat dissipation system is d1, and a difference between the actual temperature of the second heat dissipation system and an upper limit temperature of the second heat dissipation system is d2, when a value of d1?d2 is greater than an error threshold value Error1_level, the first heat dissipation system is determined to be abnormal, and when the value of d1?d2 is less than an error threshold value Error2_level, the second heat dissipation system is determined to be abnormal.Type: GrantFiled: November 9, 2018Date of Patent: September 14, 2021Assignee: DELTA ELECTRONICS, INC.Inventors: Lei-Chung Hsing, Hsien-Chih Ou, Chun-Chang Huang
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Patent number: 11121212Abstract: A high-voltage semiconductor device includes a substrate, a first insulating structure, a gate, a drain region, a source region and a doped region. The substrate has a first conductive type, and the first insulating structure is disposed on the substrate. The drain region and the source region are disposed in the substrate. The source region has a first portion and a second portion. The first portion has the second conductive type and the second portion has the first conductive type. The gate is disposed on the substrate, between the source region and the drain region to partially cover a side of the first insulating structure. The doped region is disposed in the substrate and has a first doped region and a second doped region, and the first doped region and the second doped region both include the first conductive type and separately disposed under the first insulating structure.Type: GrantFiled: May 28, 2020Date of Patent: September 14, 2021Assignee: Vanguard International Semiconductor CorporationInventors: Ting-You Lin, Cheng-Hsin Chuang, Shao-Chang Huang
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Publication number: 20210276160Abstract: A jig structure for assembling a high frequency connector includes a base on which a rotatable seat is provided, and the surface area of the rotatable seat is smaller than the base. A fixed table is provided on the rotatable seat. The fixed table further includes a first table, and an adjusting rod and a plurality of guide rods are provided on the first table. A plurality of assembly tables are provided on the adjusting rod and the guide rods. The assembly tables are correspondingly disposed, and their movement is controlled by the adjusting rod. A first assembly table and a second assembly table are provided on both sides of the fixed table. The first assembly table has movements along X-axis and Y-axis, and the second assembly stage has movements along Y-axis, thereby corresponding to the relative position of the assembly table and the fixed table so as to quickly place the circuit boards and connectors to be assemble.Type: ApplicationFiled: November 4, 2020Publication date: September 9, 2021Inventors: Chang-Lin PENG, Chien-Chang HUANG
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Patent number: 11106120Abstract: A projection device, a light source system and a projection method thereof are provided. A portion of the light-emitting units are controlled to provide a light beam as the first light beam. It is detected whether characteristic parameters of the light-emitting units providing the light beam reach a preset value. When the preset value is not reached, the light-emitting units providing the light beam are disabled, and the remaining light-emitting units are controlled to provide the back-up light beam as the first light beam. A portion of the first light beam is converted into a second light beam. The first light beam of which the wavelength is not converted and the second light beam are combined to generate an illumination beam. The illumination beam is converted into an image beam. The image beam is converted into a projection beam.Type: GrantFiled: August 29, 2019Date of Patent: August 31, 2021Assignee: Coretronic CorporationInventors: Chen-Cheng Chou, Jeng-An Liao, Fu-Shun Kao, Hung-Lin Chen, Hsin-Chang Huang