Abstract: A memory controller controls operation of a nonvolatile memory device comprising a memory area comprising a plurality of multi-level cells (MLCs). The memory controller receives an address of the memory area and data to be programmed to the memory area, analyzes access history information regarding the memory area based on the address, generates first mapping data corresponding to the data or second mapping data based on the data and previous mapping data that has been programmed to the MLCs according to a result of the analysis, and transmits a program command comprising one of the first mapping data and the second mapping data to the nonvolatile memory device.

Abstract: A memory device, a memory system, and an operating method of the memory system is provided. The operating method includes operations of transmitting an authentication request to a memory device using a memory controller; converting the authentication request to a first address using the memory device; processing authentication data that corresponds to the first address and indicates a physical characteristic of the memory device and transmitting the authentication data as an authentication response to the authentication request to the memory controller using the memory device; and verifying whether the authentication response received from the memory device is an authentication response to the authentication request using the memory controller.

Abstract: A display device includes a display unit including pixels, a memory to store degradation data of the pixels, a group-setting portion to classify the pixels into degradation regions according to a degradation degree and based on the degradation data, perform a contour-simplifying process with respect to the degradation regions, classify the degradation regions into labeling regions according to proximity of adjacent ones of the degradation regions, and set one of the degradation regions as a reference region, a sensor to sense electric characteristics of the degradation regions and the reference region as they separately emit light, a compensation amount controller to compare the electric characteristics of the degradation regions with electric characteristics of the reference region, and calculate a per-position compensation data corresponding to a position of the labeling regions, and a converter to convert a first image data into a second image data based on the per-position compensation data.

Abstract: Provided are methods for operating a non-volatile memory controller. A method for operating a non-volatile memory controller includes dividing data provided from a host into first unit data and second unit data, encoding the first unit data into first codewords including n number of bits (n is an integer equal to or more than 1), encoding the second unit data into second codewords including n-w number of bits (w is an integer less than n and equal to or more than 1) corresponding to a bit having a value of 0 among the n number of bits of the first codewords, performing bit-to-state mapping on the first codewords and the second codewords using a predetermined bitmap, and programming the first codewords and the second codewords to a first page and a second page of a non-volatile memory, respectively.

Abstract: A method of operating a memory controller includes receiving a first data sequence and generating a coset representative sequence that can be divided into m-bit strings, where “m” is a natural number of at least 2; performing a first XOR operation on each of the m-bit strings in the coset representative sequence and binary bits; calculating all possible branch metrics according to a result of the first XOR operation; determining a survivor path sequence based on the all possible branch metrics; and performing a second XOR operation on the coset representative sequence and the survivor path sequence and generating an output sequence.

Abstract: A method is provided for operating a data storage device capable of compensating for an initial threshold voltage shift of multiple memory cells. The method includes generating a first compression value for a first write address corresponding to a first write request input during a first time interval among different time intervals, and storing the first compression value in a first table among multiple tables.

Abstract: A method of processing data using a memory controller includes determining at least one cell state to which each of a plurality of multi-level cells can be changed to based on a current cell state of each multi-level cell, where each multi-level cell includes a plurality of data pages; determining one of the data pages as having a stuck bit when a value of the data page has a single mapping value based on mapping values mapped to the at least one cell state and generating stuck bit data regarding the stuck bit; and encoding write data to be stored in the multi-level cells based on the stuck bit data.

Abstract: A method of operating a memory system, having a non-volatile memory device, includes processing a response to a first request toward the memory device by using an original key, in response to the first request, generating and storing first parity data corresponding to the original key, and deleting the original key.

Abstract: A memory device, a memory system, and an operating method of the memory system is provided. The operating method includes operations of transmitting an authentication request to a memory device using a memory controller; converting the authentication request to a first address using the memory device; processing authentication data that corresponds to the first address and indicates a physical characteristic of the memory device and transmitting the authentication data as an authentication response to the authentication request to the memory controller using the memory device; and verifying whether the authentication response received from the memory device is an authentication response to the authentication request using the memory controller.

Abstract: A method of operating a memory system including a first function block and a second function block includes generating a first authentication response indicating physical characteristics of the memory system, via the second function block, in response to a first authentication request received from the first function block; performing an error correction decoding on the first authentication response, via the first function block, by using first parity data corresponding to the first authentication request; and determining whether the second function block is authentic, depending on a result of the error correction decoding.

Abstract: Provided are a flash memory device, a flash memory system, and methods of operating the same. A method of operating a flash memory system includes selecting memory cells of a flash memory in response to an authentication challenge, programming pieces of input data into the selected memory cells, respectively, reading the selected memory cells and generating and storing control information, dividing the selected memory cells into at least one first region memory cell and at least one second region memory cell based on the control information, and setting read values of the at least one first region memory cell and the at least one second region memory cell as a first value and a second value, respectively, and generating an authentication response in the response to the authentication challenge.

Abstract: A method is provided for determining a deterioration condition of a memory device. The method includes calculating first information corresponding to a number of bits having a first logic value from data obtained by performing a first read operation on target storage region of the memory device using a first reference voltage as a read voltage, and calculating second information corresponding to a number of bits having a second logic value from data obtained by performing a second read operation on the target storage region using a second reference voltage as the read voltage. A deterioration condition of the target storage region is determined based on the first and second information. The first reference voltage is less than a first read voltage by which an erase state of the memory device is distinguished from an adjacent program state, and the second reference voltage is higher than the first read voltage.

Abstract: A semiconductor storage system includes: a difference determining circuit configured to determine a difference between the number of first state values of sample data written to a memory and the number of first state values of read data read from the memory; and a compensation value determining circuit configured to determine a read voltage level compensation value corresponding to a difference between the number of the first state values of the sample data written to the memory and the number of the first state values of the read data read from the memory.

Abstract: An organic light emitting display and a method for driving the organic light emitting display. The organic light emitting display includes a display unit, a data accumulator, and a data compensator. The display unit is configured to be driven by image data. The data accumulator is configured to compress and accumulate first data corresponding to a first portion of the image data for driving a first region of the display unit, identify a second region of the display unit from the first region by analyzing the accumulated first data, and compress and accumulate second data corresponding to a second portion of the image data for driving the second region with a compression ratio based on a size of the second region. The data compensator is configured to compensate the image data based on the accumulated first and second data.

Abstract: A controller for a display device includes an adjuster and a compensator. The adjuster adjusts at least one parameter of a modeling equation based on a measured current of a pixel. The modeling equation including the at least one adjusted parameter is indicative of a real time degree of degradation of the pixel. The compensator compensates for image data corresponding to emission of light from the pixel.

Abstract: Provided is a method of operating a memory system. The method includes programming first bit data into multiple memory cells; identifying target memory cells that are in a first state and have threshold voltages equal to or greater than a first voltage from the memory cells programmed with the first bit data; receiving second bit data which is to be programmed into the memory cells; calculating multiple third bit data by performing a first process on the second bit data; and selecting third bit data of the calculated multiple third bit data that changes a largest number of target memory cells from the first state to a second state when the memory cells are programmed with each of the multiple third bit data, respectively. The selected third bit data is programmed into the memory cells.

Abstract: Data is read from memory cells, including at least one victim cell and at least one aggressor cell, using an element graph. Reading the data includes defining function nodes corresponding to probability density functions with respect to a first physical characteristic of the at least one victim cell and a second physical characteristic of the at least one aggressor cell, defining variable nodes corresponding to at least one first data value stored in the at least one victim cell and at least one second data value stored in the at least one aggressor cell, and defining edges connecting the function nodes and the variable nodes.

Abstract: A method of operating a memory controller comprises receiving original data from an external source, partitioning the original data into multiple elements of unit data, changing an order of at least one element of unit data to reduce the number of occurrences of a target state among the multiple units of unit data, and controlling a non-volatile memory device to program the multiple elements of unit data having the reduced number of occurrences of the target state.

Abstract: A method of operating a memory controller includes receiving a first data sequence and generating a coset representative sequence that can be divided into m-bit strings, where “m” is a natural number of at least 2; performing a first XOR operation on each of the m-bit strings in the coset representative sequence and binary bits; calculating all possible branch metrics according to a result of the first XOR operation; determining a survivor path sequence based on the all possible branch metrics; and performing a second XOR operation on the coset representative sequence and the survivor path sequence and generating an output sequence.

Abstract: A method of processing data using a memory controller includes determining at least one cell state to which each of a plurality of multi-level cells can be changed to based on a current cell state of each multi-level cell, where each multi-level cell includes a plurality of data pages; determining one of the data pages as having a stuck bit when a value of the data page has a single mapping value based on mapping values mapped to the at least one cell state and generating stuck bit data regarding the stuck bit; and encoding write data to be stored in the multi-level cells based on the stuck bit data.