Abstract: A semiconductor memory system can include a memory device having a memory cell array that includes a plurality of memory cells. A memory controller can be configured to perform domain transformation on data written to and/or read from the plurality of memory cells to provide domain-transformed data and configured to perform signal processing on the domain-transformed data to output processed data or a control signal.

Abstract: Provided is a method of operating a memory system. The method includes programming first bit data into multiple memory cells; identifying target memory cells that are in a first state and have threshold voltages equal to or greater than a first voltage from the memory cells programmed with the first bit data; receiving second bit data which is to be programmed into the memory cells; calculating multiple third bit data by performing a first process on the second bit data; and selecting third bit data of the calculated multiple third bit data that changes a largest number of target memory cells from the first state to a second state when the memory cells are programmed with each of the multiple third bit data, respectively. The selected third bit data is programmed into the memory cells.

Abstract: A method is provided for determining a deterioration condition of a memory device. The method includes calculating first information corresponding to a number of bits having a first logic value from data obtained by performing a first read operation on target storage region of the memory device using a first reference voltage as a read voltage, and calculating second information corresponding to a number of bits having a second logic value from data obtained by performing a second read operation on the target storage region using a second reference voltage as the read voltage. A deterioration condition of the target storage region is determined based on the first and second information. The first reference voltage is less than a first read voltage by which an erase state of the memory device is distinguished from an adjacent program state, and the second reference voltage is higher than the first read voltage.

Abstract: A memory controller controls operation of a nonvolatile memory device comprising a memory area comprising a plurality of multi-level cells (MLCs). The memory controller receives an address of the memory area and data to be programmed to the memory area, analyzes access history information regarding the memory area based on the address, generates first mapping data corresponding to the data or second mapping data based on the data and previous mapping data that has been programmed to the MLCs according to a result of the analysis, and transmits a program command comprising one of the first mapping data and the second mapping data to the nonvolatile memory device.

Abstract: A semiconductor storage system includes: a difference determining circuit configured to determine a difference between the number of first state values of sample data written to a memory and the number of first state values of read data read from the memory; and a compensation value determining circuit configured to determine a read voltage level compensation value corresponding to a difference between the number of the first state values of the sample data written to the memory and the number of the first state values of the read data read from the memory.

Abstract: A method is provided for reading data from memory cells, including at least one victim cell and at least one aggressor cell, using an element graph. The method includes defining function nodes corresponding to probability density functions with respect to a first physical characteristic of the at least one victim cell and a second physical characteristic of the at least one aggressor cell, defining variable nodes corresponding to at least one first data value stored in the at least one victim cell and at least one second data value stored in the at least one aggressor cell, and defining edges connecting the function nodes and the variable nodes.

Abstract: A semiconductor memory system can include a memory device having a memory cell array that includes a plurality of memory cells. A memory controller can be configured to perform domain transformation on data written to and/or read from the plurality of memory cells to provide domain-transformed data and configured to perform signal processing on the domain-transformed data to output processed data or a control signal.

Abstract: A method and apparatus for generating soft-decision information based on non-Gaussian channel in a wireless communication system is provided. A receiver receives a decision variable, models an interference or noise distribution in the decision variable as a non-Gaussian probability density function and estimates a number of parameters of the non-Gaussian probability density function, and determines a log likelihood ratio (LLR) of the decision variable using the results of the estimation, wherein the parameters of the non-Gaussian probability density function comprise a shape parameter for determining the shape of the non-Gaussian probability density function.