Patents by Inventor Chang-Lin Yeh

Chang-Lin Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230005970
    Abstract: A semiconductor device package includes a main substrate, at least one thin film transistor (TFT) module, at least one first electronic component, at least one encapsulant and a plurality of light emitting devices. The main substrate has a first surface and a second surface opposite to the first surface. The thin film transistor (TFT) module is disposed adjacent to and electrically connected to the first surface of the main substrate. The first electronic component is disposed adjacent to and electrically connected to the first surface of the main substrate. The encapsulant covers the at least one thin film transistor (TFT) module and the at least one first electronic component. The light emitting devices are electrically connected to the at least one thin film transistor (TFT) module.
    Type: Application
    Filed: September 6, 2022
    Publication date: January 5, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Hung CHEN, Yung I YEH, Chang-Lin YEH, Sheng-Yu CHEN
  • Publication number: 20220384289
    Abstract: A semiconductor package device includes a first substrate, a second substrate and a first spacer. The first substrate includes a first divided pad. The second substrate includes a second divided pad disposed above the first divided pad. The first spacer is disposed between the first divided pad and the second divided pad. The first spacer is in contact with the first divided pad and the second divided pad.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi CHEN, Chang-Lin YEH, Jen-Chieh KAO
  • Publication number: 20220353619
    Abstract: A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, and an encapsulation layer. The substrate has a first surface, a second surface opposite to the first surface, and a first opening extending from the first surface to the second surface. The first electronic component is disposed on the first surface of the substrate. The encapsulation layer is formed on the second surface of the substrate. The encapsulation layer includes a chamber connected to the first opening, and a width of the first opening is smaller than a width of the chamber.
    Type: Application
    Filed: April 29, 2021
    Publication date: November 3, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chang-Lin YEH
  • Publication number: 20220344234
    Abstract: The present disclosure provides a semiconductor device package including a first substrate, a second substrate disposed over the first substrate, an electronic component disposed between the first substrate and the second substrate, a spacer disposed between the first substrate and the electronic component, and a supporting element disposed on the first substrate and configured to support the second substrate. The spacer is configured to control a distance between the first substrate and the second substrate through the electronic component. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: April 23, 2021
    Publication date: October 27, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chang-Lin YEH
  • Publication number: 20220344246
    Abstract: The present disclosure provides an electronic assembly including a semiconductor device package. The semiconductor device package includes a first package and a conductive element. The first package includes an electronic component and a protection layer covering the electronic component. The conductive element is supported by the protection layer and electrically connected with the electronic component through an electrical contact. A method for manufacturing a semiconductor device package is also provided in the present disclosure.
    Type: Application
    Filed: April 23, 2021
    Publication date: October 27, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang-Lin YEH, Jen-Chieh KAO
  • Publication number: 20220336317
    Abstract: A semiconductor device package and a method for manufacturing the semiconductor device package are provided. The semiconductor device package includes a first substrate with a aperture, a second substrate disposed on the first substrate, a first electronic component disposed on the second substrate, an encapsulant disposed on the first substrate and covering the second substrate and a first heat dissipation structure extending through the aperture and attached to the second substrate.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 20, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chang-Lin YEH
  • Patent number: 11462455
    Abstract: A semiconductor package device includes a substrate, an electronic component, and a thermal conductive layer. The electronic component is disposed on the substrate and includes a first surface facing away from the substrate. The thermal conductive layer is disposed above the first surface of the electronic component. The thermal conductive layer includes a plurality of portions spaced apart from each other.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: October 4, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shiu-Fang Yen, Chang-Lin Yeh, Jen-Chieh Kao
  • Patent number: 11437415
    Abstract: A semiconductor device package includes a main substrate, at least one thin film transistor (TFT) module, at least one first electronic component, at least one encapsulant and a plurality of light emitting devices. The main substrate has a first surface and a second surface opposite to the first surface. The thin film transistor (TFT) module is disposed adjacent to and electrically connected to the first surface of the main substrate. The first electronic component is disposed adjacent to and electrically connected to the first surface of the main substrate. The encapsulant covers the at least one thin film transistor (TFT) module and the at least one first electronic component. The light emitting devices are electrically connected to the at least one thin film transistor (TFT) module.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: September 6, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Hung Chen, Yung I. Yeh, Chang-Lin Yeh, Sheng-Yu Chen
  • Patent number: 11410899
    Abstract: A semiconductor package device includes a first substrate, a second substrate and a first spacer. The first substrate includes a first divided pad. The second substrate includes a second divided pad disposed above the first divided pad. The first spacer is disposed between the first divided pad and the second divided pad. The first spacer is in contact with the first divided pad and the second divided pad.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: August 9, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yi Chen, Chang-Lin Yeh, Jen-Chieh Kao
  • Publication number: 20220223489
    Abstract: A semiconductor package includes a substrate having a first side and a second side opposite to the first side, a first type semiconductor die disposed on the first side of the substrate, a first compound attached to the first side and encapsulating the first type semiconductor die, and a second compound attached to the second side, causing a stress with respect to the first type semiconductor die in the first compound. A method for manufacturing the semiconductor package described herein is also disclosed.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Sheng-Yu CHEN, Chang-Lin YEH, Ming-Hung CHEN
  • Publication number: 20220141971
    Abstract: A semiconductor device package includes a display device, an encapsulation layer disposed in direct contact with the display device, and a reinforced structure surrounded by the encapsulation layer. The reinforced structure is spaced apart from a surface of the display device. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: January 11, 2022
    Publication date: May 5, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Hung CHEN, Yung I. YEH, Chang-Lin YEH, Sheng-Yu CHEN
  • Publication number: 20220102453
    Abstract: A semiconductor device package includes a display device, an electronic module and a conductive adhesion layer. The display device includes a first substrate and a TFT layer. The first substrate has a first surface and a second surface opposite to the first surface. The TFT layer is disposed on the first surface of the first substrate. The electronic module includes a second substrate and an electronic component. The second substrate has a first surface facing the second surface of the first substrate and a second surface opposite to the first surface. The electronic component is disposed on the second surface of the second substrate. The conductive adhesion layer is disposed between the first substrate and the second substrate.
    Type: Application
    Filed: December 13, 2021
    Publication date: March 31, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Hung CHEN, Sheng-Yu CHEN, Chang-Lin YEH, Yung-I YEH
  • Patent number: 11289394
    Abstract: A semiconductor package includes a substrate having a first side and a second side opposite to the first side, a first type semiconductor die disposed on the first side of the substrate, a first compound attached to the first side and encapsulating the first type semiconductor die, and a second compound attached to the second side, causing a stress with respect to the first type semiconductor die in the first compound. A method for manufacturing the semiconductor package described herein is also disclosed.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: March 29, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Sheng-Yu Chen, Chang-Lin Yeh, Ming-Hung Chen
  • Publication number: 20220013443
    Abstract: A semiconductor device package includes a first substrate, a second substrate, a conductive structure, a first solder and a second solder. The second substrate is disposed over the first substrate. The conductive structure is disposed between the first substrate and the second substrate. The conductive structure includes a first wetting portion, a second wetting portion, and a non-wetting portion disposed between the first wetting portion and the second wetting portion. The first solder covers the first wetting portion and connects the conductive structure to the first substrate. The second solder covers the second wetting portion and connects the conductive structure to the second substrate. The first solder is spaced apart from the second solder by the non-wetting portion.
    Type: Application
    Filed: September 27, 2021
    Publication date: January 13, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chang-Lin YEH
  • Patent number: 11222792
    Abstract: In one or more embodiments, a semiconductor package device includes a substrate, a trace, a structure, a barrier element and an underfill. The substrate has a first surface including a filling region surrounded by the trace. The structure is disposed over the filling region and electrically connected to the substrate. The barrier element is disposed on the trace. The underfill is disposed on the filling region.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: January 11, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chang-Lin Yeh
  • Patent number: 11224132
    Abstract: A semiconductor device package includes a display device, an encapsulation layer disposed in direct contact with the display device, and a reinforced structure surrounded by the encapsulation layer. The reinforced structure is spaced apart from a surface of the display device. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: January 11, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Hung Chen, Yung I. Yeh, Chang-Lin Yeh, Sheng-Yu Chen
  • Patent number: 11211302
    Abstract: A semiconductor device package comprises a carrier, a stop layer, a barrier layer and an encapsulant. The carrier has a first surface and a second surface recessed with respect to the first surface. The stop layer is disposed on the second surface of the carrier. The barrier layer is disposed on the stop layer and protruded from the first surface of the carrier. The encapsulant is disposed on the first surface of the carrier. Further, the encapsulant has a side surface disposed on the barrier layer.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: December 28, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chang-Lin Yeh
  • Patent number: 11201200
    Abstract: A semiconductor device package includes a display device, an electronic module and a conductive adhesion layer. The display device includes a first substrate and a TFT layer. The first substrate has a first surface and a second surface opposite to the first surface. The TFT layer is disposed on the first surface of the first substrate. The electronic module includes a second substrate and an electronic component. The second substrate has a first surface facing the second surface of the first substrate and a second surface opposite to the first surface. The electronic component is disposed on the second surface of the second substrate. The conductive adhesion layer is disposed between the first substrate and the second substrate.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: December 14, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Hung Chen, Sheng-Yu Chen, Chang-Lin Yeh, Yung-I Yeh
  • Patent number: 11133244
    Abstract: A semiconductor device package includes a first substrate, a second substrate, a conductive structure, a first solder and a second solder. The second substrate is disposed over the first substrate. The conductive structure is disposed between the first substrate and the second substrate. The conductive structure includes a first wetting portion, a second wetting portion, and a non-wetting portion disposed between the first wetting portion and the second wetting portion. The first solder covers the first wetting portion and connects the conductive structure to the first substrate. The second solder covers the second wetting portion and connects the conductive structure to the second substrate. The first solder is spaced apart from the second solder by the non-wetting portion.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: September 28, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chang-Lin Yeh
  • Patent number: 11081473
    Abstract: A semiconductor device package includes a first substrate, a dielectric layer, a thin film transistor (TFT) and an electronic component. The first substrate has a first surface and a second surface opposite to the first surface. The dielectric layer is disposed on the first surface of the first substrate. The dielectric layer has a first surface facing away from the first substrate and a second surface opposite to the first surface. The TFT layer is disposed on the dielectric layer. The electronic component is disposed on the second surface of the first substrate. A roughness of the first surface of the dielectric layer is less than a roughness of the first surface of the first substrate.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: August 3, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Hung Chen, Sheng-Yu Chen, Chang-Lin Yeh, Yung-I Yeh