Abstract: A gas detection purification device is disclosed and includes a main body, a purification unit, a gas guider, a gas detection module and a controlling-driving module. The main body includes an inlet, an outlet, an external socket and a gas-flow channel disposed between the inlet and the outlet. The purification unit is disposed in the gas-flow channel for filtering gas introduced through the gas-flow channel. The gas guider is disposed in the gas channel and located at a side of the purification unit. The gas is inhaled through the inlet, flows through the purification unit and is discharged out through the outlet. The gas detection module is plugged into or detached from the external socket. The controlling driving module is disposed within the main body and electrically connected to the gas guider to control the operation of the gas guider in an enabled state and a disabled state.

Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

Abstract: The present disclosure provides a probe apparatus, including a circuit board, a flexible interconnect substrate, at least one probe, and a supporting element. The circuit board includes tester contacts. The flexible interconnect substrate has a first surface and an opposing second surface. The flexible interconnect substrate is electrically coupled to the circuit board. The probe is disposed in the first surface of the flexible interconnect substrate. The probe is electrically coupled to the flexible interconnect substrate, and the probe is configured to electrically contact a device under test. The supporting element is adhered to the second surface of the flexible interconnect substrate. The supporting element is disposed between the flexible interconnect substrate and the circuit board.

Abstract: An ultrasonic fingerprint recognition module and a manufacturing method thereof are provided. The ultrasonic fingerprint recognition module includes a substrate, an ultrasonic transmitter, a thin film transistor and an ultrasonic receiver. The method includes the following steps. In a step (a), the substrate, the ultrasonic transmitter, the thin film transistor and the ultrasonic receiver are provided. In a step (b), the ultrasonic transmitter is attached on a top surface of the substrate, and the ultrasonic transmitter is electrically connected with the substrate. In a step (c), the ultrasonic receiver is attached on the thin film transistor. In a step (d), the thin film transistor is attached on the ultrasonic transmitter. In a step (e), the ultrasonic receiver is electrically connected with the thin film transistor and the thin film transistor is electrically connected with the substrate through wires.

Abstract: Semiconductor devices and methods are provided. The semiconductor device can include a semiconductor substrate, a plurality of solder pads disposed on the semiconductor substrate, a first insulating layer disposed over the semiconductor substrate, a columnar electrode disposed over the solder pad, and a solder ball disposed on the columnar electrode. The first insulating layer can include a first opening to expose a solder pad of the plurality of solder pads. The columnar electrode can include a bulk material and a through hole in the bulk material. The through hole can expose at least a surface portion of the solder pad. The solder ball can include a convex metal head on a top surface of the bulk material of the columnar electrode, and a filling part filled in the through hole.

Abstract: Various embodiments provide semiconductor packaging structures and methods for forming the same. In an exemplary method, a chip having a metal interconnect structure thereon can be provided. An insulating layer can be formed on the chip to expose the metal interconnect structure. A columnar electrode can be formed on the metal interconnect structure. A portion of the metal interconnect structure surrounding a bottom of the columnar electrode can be exposed. A diffusion barrier layer can be formed on sidewalls and a top surface of the columnar electrode, and on the exposed portion of the metal interconnect structure surrounding the bottom of the columnar electrode. A solder ball can then be formed on the diffusion barrier layer. The solder ball can wrap at least the sidewalls and the top surface of the columnar electrode.

Abstract: An IC packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a metal pad and an insulating layer and the insulating layer has an opening to expose the meal pad. The method also includes forming an under-the-ball meal electrode on the exposed metal pad. The under-the-ball metal electrode has an electrode body and an electrode tail, the electrode body is located at a bottom portion of the under-the-ball metal electrode and is in contact with the metal pad, and the electrode tail is located at a top portion of the under-the-ball meal electrode. Further, the method includes forming a solder ball on the under-the-ball metal electrode.

Abstract: A semiconductor device and a manufacturing method thereof. The semiconductor device includes a semiconductor substrate (300) provided with a plurality of pads (301), columnar electrodes on the pads (301) and a solder ball (321) provided on the columnar electrode. The columnar electrode comprises a main body (307) and a groove in the main body (307), and an opening of the groove is overlapped with the top surface of the columnar electrode. The solder ball (321) comprises a metal bump (320) arranged on the top of the columnar electrode and a filling part (319) filled in the groove. The solder ball and the columnar electrode form a structure similar to a bolt; thus the binding force between the solder ball and the columnar electrode is improved.

Abstract: A semiconductor packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a first surface and a second surface, and an electroplating seed layer on the first surface of the semiconductor substrate. The method also includes forming a plurality of columnar electrodes over the electroplating seed layer, where the columnar electrodes include first columnar electrodes and second columnar electrodes. Further, the method includes forming a diffusion barrier layer over the first columnar electrodes and the second columnar electrodes, forming a plurality of first solder balls over the diffusion barrier layer on the first columnar electrodes. The method also includes providing a packaging substrate having solder terminals corresponding to the first solder balls, and mounting the semiconductor substrate onto the packaging substrate in a flipped position, such that the first solder balls are connected with the solder terminals.

Abstract: A semiconductor device package and packaging method, the semiconductor device packaging method comprising: providing a chip with a bonding pad formed on the chip surface; forming a passivation layer and a bump on the chip surface, wherein the passivation layer has an opening exposing part of the pad, the bump is located in the opening and the size of the bump is less than the size of the opening; forming a solder ball covering the top surface and the side wall of the bump, and the bottom surface of the opening. The formed semiconductor device package is not easy to form a short circuit. The bonding strength between the solder ball and the bump is high and the performance of the semiconductor device is stable.

Abstract: A semiconductor packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a first surface and a second surface, and an electroplating seed layer on the first surface of the semiconductor substrate. The method also includes forming a plurality of columnar electrodes over the electroplating seed layer, where the columnar electrodes include first columnar electrodes and second columnar electrodes. Further, the method includes forming a diffusion barrier layer over the first columnar electrodes and the second columnar electrodes, forming a plurality of first solder balls over the diffusion barrier layer on the first columnar electrodes. The method also includes providing a packaging substrate having solder terminals corresponding to the first solder balls, and mounting the semiconductor substrate onto the packaging substrate in a flipped position, such that the first solder balls are connected with the solder terminals.

Abstract: A chip packaging structure and packaging method. The packaging structure comprises: a semiconductor substrate; a metal pad provided inside the semiconductor substrate; an insulating layer provided on the semiconductor substrate, the insulating layer having an opening for exposing the metal pad; a sub-ball metal electrode provided on the metal pad; a solder ball provided on the surface of the sub-ball metal electrode, the solder ball having a first apron structure and the first apron structure covering partial metal pad on the periphery of the bottom of the under-ball metal electrode. The chip packaging structure of the present invention enhances the adhesion between the solder ball and the metal pad, and improves the reliability in chip packaging.

Abstract: A semiconductor packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a first surface and a second surface, and an electroplating seed layer on the first surface of the semiconductor substrate. The method also includes forming a plurality of columnar electrodes over the electroplating seed layer, where the columnar electrodes include first columnar electrodes and second columnar electrodes. Further, the method includes forming a diffusion barrier layer over the first columnar electrodes and the second columnar electrodes, forming a plurality of first solder balls over the diffusion barrier layer on the first columnar electrodes. The method also includes providing a packaging substrate having solder terminals corresponding to the first solder balls, and mounting the semiconductor substrate onto the packaging substrate in a flipped position, such that the first solder balls are connected with the solder terminals.

Abstract: A semiconductor device package and packaging method, the semiconductor device packaging method comprising: providing a chip with a bonding pad formed on the chip surface; forming a passivation layer and a bump on the chip surface, wherein the passivation layer has an opening exposing part of the pad, the bump is located in the opening and the size of the bump is less than the size of the opening; forming a solder ball covering the top surface and the side wall of the bump, and the bottom surface of the opening. The formed semiconductor device package is not easy to form a short circuit. The bonding strength between the solder ball and the bump is high and the performance of the semiconductor device is stable.

Abstract: A chip packaging structure and packaging method. The packaging structure comprises: a semiconductor substrate; a metal pad provided inside the semiconductor substrate; an insulating layer provided on the semiconductor substrate, the insulating layer having an opening for exposing the metal pad; a sub-ball metal electrode provided on the metal pad; a solder ball provided on the surface of the sub-ball metal electrode, the solder ball having a first apron structure and the first apron structure covering partial metal pad on the periphery of the bottom of the under-ball metal electrode. The chip packaging structure of the present invention enhances the adhesion between the solder ball and the metal pad, and improves the reliability in chip packaging.

Abstract: A semiconductor device and a manufacturing method thereof. The semiconductor device includes a semiconductor substrate (300) provided with a plurality of pads (301), columnar electrodes on the pads (301) and a solder ball (321) provided on the columnar electrode. The columnar electrode comprises a main body (307) and a groove in the main body (307), and an opening of the groove is overlapped with the top surface of the columnar electrode. The solder ball (321) comprises a metal bump (320) arranged on the top of the columnar electrode and a filling part (319) filled in the groove. The solder ball and the columnar electrode form a structure similar to a bolt; thus the binding force between the solder ball and the columnar electrode is improved.

Abstract: An IC packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a metal pad and an insulating layer and the insulating layer has an opening to expose the meal pad. The method also includes forming an under-the-ball meal electrode on the exposed metal pad. The under-the-ball metal electrode has an electrode body and an electrode tail, the electrode body is located at a bottom portion of the under-the-ball metal electrode and is in contact with the metal pad, and the electrode tail is located at a top portion of the under-the-ball meal electrode. Further, the method includes forming a solder ball on the under-the-ball metal electrode.

Abstract: A semiconductor packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a first surface and a second surface, and an electroplating seed layer on the first surface of the semiconductor substrate. The method also includes forming a plurality of columnar electrodes over the electroplating seed layer, where the columnar electrodes include first columnar electrodes and second columnar electrodes. Further, the method includes forming a diffusion barrier layer over the first columnar electrodes and the second columnar electrodes, forming a plurality of first solder balls over the diffusion barrier layer on the first columnar electrodes. The method also includes providing a packaging substrate having solder terminals corresponding to the first solder balls, and mounting the semiconductor substrate onto the packaging substrate in a flipped position, such that the first solder balls are connected with the solder terminals.

Abstract: Various embodiments provide semiconductor packaging structures and methods for forming the same. In an exemplary method, a chip having a metal interconnect structure thereon can be provided. An insulating layer can be formed on the chip to expose the metal interconnect structure. A columnar electrode can be formed on the metal interconnect structure. A portion of the metal interconnect structure surrounding a bottom of the columnar electrode can be exposed. A diffusion barrier layer can be formed on sidewalls and a top surface of the columnar electrode, and on the exposed portion of the metal interconnect structure surrounding the bottom of the columnar electrode. A solder ball can then be formed on the diffusion barrier layer. The solder ball can wrap at least the sidewalls and the top surface of the columnar electrode.

Abstract: Semiconductor devices and methods are provided. The semiconductor device can include a semiconductor substrate, a plurality of solder pads disposed on the semiconductor substrate, a first insulating layer disposed over the semiconductor substrate, a columnar electrode disposed over the solder pad, and a solder ball disposed on the columnar electrode. The first insulating layer can include a first opening to expose a solder pad of the plurality of solder pads. The columnar electrode can include a bulk material and a through hole in the bulk material. The through hole can expose at least a surface portion of the solder pad. The solder ball can include a convex metal head on a top surface of the bulk material of the columnar electrode, and a filling part filled in the through hole.