Abstract: A method of forming a capacitor for an integrated circuit device includes the step of forming a first conductive layer on an integrated circuit substrate wherein the first conductive layer covers a portion of the integrated circuit substrate and wherein a second portion of the integrated circuit substrate is exposed. An etch stopping layer is formed on the first conductive layer, and an insulating layer is formed on the etch stopping layer and on the exposed portion of the integrated circuit substrate. The insulating layer is etched using the etch stopping layer as an etching endpoint so that a portion of the insulating layer on the second portion of the integrated circuit substrate remains adjacent the first conductive layer and so that the etch stopping layer is exposed. The etch stopping layer is removed and a dielectric layer is formed on the first conductive layer.

Abstract: A capacitor for a semiconductor memory device employs a tantalum pentoxide film as a dielectric film. The dielectric film is made from tantalum pentoxide film doped with silicon over a first electrode. A second electrode is then formed over the dielectric film. Accordingly, in the method for manufacturing the device, although the dielectric constant of the dielectric film is somewhat lower than the conventional pure tantalum pentoxide film due to the silicon doped within the tantalum pentoxide film, leakage current is reduced and breakdown voltage is increased. Therefore, the dielectric film according to the present invention exhibits excellent electrical characteristics and high reliability.