Patents by Inventor Chang Soo Suh
Chang Soo Suh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200287033Abstract: In some examples, a gallium nitride (GaN)-based transistor, comprises a substrate; a GaN layer supported by the substrate; an aluminum nitride gallium (AlGaN) layer supported by the GaN layer; a p-doped GaN structure supported by the AlGaN layer; and multiple p-doped GaN blocks supported by the AlGaN layer, each of the multiple p-doped GaN blocks physically separated from the remaining multiple p-doped GaN blocks, wherein first and second contours of a two-dimensional electron gas (2DEG) of the GaN-based transistor are at an interface of the AlGaN and GaN layers.Type: ApplicationFiled: March 6, 2019Publication date: September 10, 2020Inventors: Chang Soo SUH, Sameer Prakash PENDHARKAR, Naveen TIPIRNENI, Jungwoo JOH
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Patent number: 10707324Abstract: One example provides an enhancement-mode High Electron Mobility Transistor (HEMT) includes a substrate, a Group IIIA-N active layer over the substrate, a Group IIIA-N barrier layer over the active layer, and at least one isolation region through the barrier layer to provide an isolated active area having the barrier layer on the active layer. A gate stack is located between source and drain contacts to the active layer. A tunnel diode in the gate stack includes an n-GaN layer on an InGaN layer on a p-GaN layer located on the barrier layer.Type: GrantFiled: June 28, 2019Date of Patent: July 7, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Chang Soo Suh, Dong Seup Lee, Jungwoo Joh, Naveen Tipirneni, Sameer Prakash Pendharkar
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Patent number: 10680093Abstract: A High Electron Mobility Transistor (HEMT) includes an active layer on a substrate, and a Group IIIA-N barrier layer on the active layer. An isolation region is through the barrier layer to provide at least one isolated active area including the barrier layer on the active layer. A gate is over the barrier layer. A drain includes at least one drain finger including a fingertip having a drain contact extending into the barrier layer to contact to the active layer and a source having a source contact extending into the barrier layer to contact to the active layer. The source forms a loop that encircles the drain. The isolation region includes a portion positioned between the source and drain contact so that there is a conduction barrier in a length direction between the drain contact of the fingertip and the source.Type: GrantFiled: January 8, 2018Date of Patent: June 9, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Jungwoo Joh, Naveen Tipirneni, Chang Soo Suh, Sameer Pendharkar
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Publication number: 20190319111Abstract: One example provides an enhancement-mode High Electron Mobility Transistor (HEMT) includes a substrate, a Group IIIA-N active layer over the substrate, a Group IIIA-N barrier layer over the active layer, and at least one isolation region through the barrier layer to provide an isolated active area having the barrier layer on the active layer. A gate stack is located between source and drain contacts to the active layer. A tunnel diode in the gate stack includes an n-GaN layer on an InGaN layer on a p-GaN layer located on the barrier layer.Type: ApplicationFiled: June 28, 2019Publication date: October 17, 2019Inventors: CHANG SOO SUH, DONG SEUP LEE, JUNGWOO JOH, NAVEEN TIPIRNENI, SAMEER PRAKASH PENDHARKAR
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Patent number: 10381456Abstract: An enhancement-mode High Electron Mobility Transistor (HEMT) includes a substrate, a Group IIIA-N active layer on the substrate, a Group IIIA-N barrier layer on the active layer, and at least one isolation region through the barrier layer to provide an isolated active area having the barrier layer on the active layer. A p-GaN layer is on the barrier layer. A tunnel diode in the gate stack includes an n-GaN layer on an InGaN layer on the p-GaN layer. A gate electrode is over the n-GaN layer. A drain having a drain contact is on the barrier layer to provide contact to the active layer, and a source having a source contact is on the barrier layer provides contact to the active layer. The tunnel diode provides a gate contact to eliminate the need to form a gate contact directly to the p-GaN layer.Type: GrantFiled: May 4, 2017Date of Patent: August 13, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Chang Soo Suh, Dong Seup Lee, Jungwoo Joh, Naveen Tipirneni, Sameer Prakash Pendharkar
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Publication number: 20180323297Abstract: An enhancement-mode High Electron Mobility Transistor (HEMT) includes a substrate, a Group IIIA-N active layer on the substrate, a Group IIIA-N barrier layer on the active layer, and at least one isolation region through the barrier layer to provide an isolated active area having the barrier layer on the active layer. A p-GaN layer is on the barrier layer. A tunnel diode in the gate stack includes an n-GaN layer on an InGaN layer on the p-GaN layer. A gate electrode is over the n-GaN layer. A drain having a drain contact is on the barrier layer to provide contact to the active layer, and a source having a source contact is on the barrier layer provides contact to the active layer. The tunnel diode provides a gate contact to eliminate the need to form a gate contact directly to the p-GaN layer.Type: ApplicationFiled: May 4, 2017Publication date: November 8, 2018Inventors: CHANG SOO SUH, DONG SEUP LEE, JUNGWOO JOH, NAVEEN TIPIRNENI, SAMEER PRAKASH PENDHARKAR
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Publication number: 20180151713Abstract: A High Electron Mobility Transistor (HEMT) includes an active layer on a substrate, and a Group IIIA-N barrier layer on the active layer. An isolation region is through the barrier layer to provide at least one isolated active area including the barrier layer on the active layer. A gate is over the barrier layer. A drain includes at least one drain finger including a fingertip having a drain contact extending into the barrier layer to contact to the active layer and a source having a source contact extending into the barrier layer to contact to the active layer. The source forms a loop that encircles the drain. The isolation region includes a portion positioned between the source and drain contact so that there is a conduction barrier in a length direction between the drain contact of the fingertip and the source.Type: ApplicationFiled: January 8, 2018Publication date: May 31, 2018Inventors: Jungwoo JOH, Naveen TIPIRNENI, Chang Soo SUH, Sameer PENDHARKAR
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Patent number: 9882041Abstract: A High Electron Mobility Transistor (HEMT) includes an active layer on a substrate, and a Group IIIA-N barrier layer on the active layer. An isolation region is through the barrier layer to provide at least one isolated active area including the barrier layer on the active layer. A gate is over the barrier layer. A drain includes at least one drain finger including a fingertip having a drain contact extending into the barrier layer to contact to the active layer and a source having a source contact extending into the barrier layer to contact to the active layer. The source forms a loop that encircles the drain. The isolation region includes a portion positioned between the source and drain contact so that there is a conduction barrier in a length direction between the drain contact of the fingertip and the source.Type: GrantFiled: November 17, 2016Date of Patent: January 30, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Jungwoo Joh, Naveen Tipirneni, Chang Soo Suh, Sameer Pendharkar
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Publication number: 20160254363Abstract: Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.Type: ApplicationFiled: May 9, 2016Publication date: September 1, 2016Inventors: Chang Soo Suh, Umesh Mishra
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Patent number: 9409319Abstract: A method of laser processing a mold surface may include a first stage of extracting mapping data for forming an embossing pattern on the mold surface using laser processing, a second stage of extracting scanning data obtained by scanning the mold surface and matching the scanning data with the mapping data so as to extract processing data for laser processing, a third stage of performing a reverse engineering process for verifying error between the mold surface and the processing data when processing the mold surface to form the embossing pattern using the processing data, and a fourth stage of, when the error may be within an allowable tolerance, performing the laser process using a verified processing data.Type: GrantFiled: October 3, 2013Date of Patent: August 9, 2016Assignee: Hyundai Motor CompanyInventor: Chang Soo Suh
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Patent number: 9343560Abstract: Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.Type: GrantFiled: December 17, 2013Date of Patent: May 17, 2016Assignee: Transphorm Inc.Inventors: Chang Soo Suh, Umesh Mishra
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Publication number: 20150001748Abstract: A method of laser processing a mold surface may include a first stage of extracting mapping data for forming an embossing pattern on the mold surface using laser processing, a second stage of extracting scanning data obtained by scanning the mold surface and matching the scanning data with the mapping data so as to extract processing data for laser processing, a third stage of performing a reverse engineering process for previously verifying error between measured data of the mold surface and the processing data when processing the mold surface to form the embossing pattern using the processing data, and a fourth stage of, when the error may be within an allowable tolerance, performing the laser process using a verified processing data.Type: ApplicationFiled: October 3, 2013Publication date: January 1, 2015Applicant: Hyundai Motor CompanyInventor: Chang Soo Suh
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Patent number: 8753101Abstract: Provided is an apparatus for molding a crash pad for a vehicle, which includes a first metal mold in which an insert cavity is formed, a second metal mold installed opposite the first metal mold, an insert inserted into the insert cavity and having a through-hole toward the first metal mold so as to define a boundary between an upper part and a lower part of the crash pad that is injection-molded by the first and second metal molds, and a resin introducing unit installed in the first metal mold abutting on the insert and having an elastically adjusted space into which molding resin is introduced through the through-hole when an injection pressure exceeds a predetermined level.Type: GrantFiled: June 25, 2012Date of Patent: June 17, 2014Assignee: Hyundai Motor CompanyInventors: Chang Soo Suh, Jin Tae Kim
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Publication number: 20140103399Abstract: Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.Type: ApplicationFiled: December 17, 2013Publication date: April 17, 2014Applicant: Transphorm Inc.Inventors: Chang Soo Suh, Umesh Mishra
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Patent number: 8633518Abstract: Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.Type: GrantFiled: December 21, 2012Date of Patent: January 21, 2014Assignee: Transphorm Inc.Inventors: Chang Soo Suh, Umesh Mishra
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Publication number: 20130313561Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of a device such as a transistor. The device includes a buffer layer disposed on a substrate, the buffer layer being configured to serve as a channel of a transistor and including gallium (Ga) and nitrogen (N), a barrier layer disposed on the buffer layer, the barrier layer being configured to supply mobile charge carriers to the channel and including aluminum (Al), gallium (Ga), and nitrogen (N), a charge-inducing layer disposed on the barrier layer, the charge-inducing layer being configured to induce charge in the channel and including aluminum (Al) and nitrogen (N), and a gate terminal disposed in the charge-inducing layer and coupled with the barrier layer to control the channel. Other embodiments may also be described and/or claimed.Type: ApplicationFiled: May 25, 2012Publication date: November 28, 2013Applicant: TRIQUINT SEMICONDUCTOR, INC.Inventor: Chang Soo Suh
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Publication number: 20130175580Abstract: Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.Type: ApplicationFiled: December 21, 2012Publication date: July 11, 2013Inventors: Chang Soo Suh, Umesh Mishra
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Publication number: 20130149410Abstract: Provided is an apparatus for molding a crash pad for a vehicle, which includes a first metal mold in which an insert cavity is formed, a second metal mold installed opposite the first metal mold, an insert inserted into the insert cavity and having a through-hole toward the first metal mold so as to define a boundary between an upper part and a lower part of the crash pad that is injection-molded by the first and second metal molds, and a resin introducing unit installed in the first metal mold abutting on the insert and having an elastically adjusted space into which molding resin is introduced through the through-hole when an injection pressure exceeds a predetermined level.Type: ApplicationFiled: June 25, 2012Publication date: June 13, 2013Applicant: Hyundai Motor CompanyInventors: Chang Soo SUH, Jin Tae Kim
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Patent number: 8344424Abstract: Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.Type: GrantFiled: February 28, 2012Date of Patent: January 1, 2013Assignee: Transphorm Inc.Inventors: Chang Soo Suh, Umesh Mishra
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Publication number: 20120175680Abstract: Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.Type: ApplicationFiled: February 28, 2012Publication date: July 12, 2012Applicant: Transphorm Inc.Inventors: Chang Soo SUH, Umesh MISHRA