Abstract: A multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers stacked therein, and first and second internal electrodes alternately disposed with at least one among the plurality of dielectric layers interposed therebetween. The first internal electrodes include first and second lead portions exposed to a mounting surface of the ceramic body, and disposed to be spaced apart from each other in a length direction of the ceramic body. The second internal electrodes include a third lead portion exposed to the mounting surface of the ceramic body, and disposed between the first and second lead portions in the length direction of the ceramic body.

Abstract: A test board for a semiconductor device and a test board including the same are provided. A test board includes a substrate, a mounting pad which is formed on the substrate and on which a semiconductor chip is mounted and a test terminal group arranged on the substrate to be spaced apart from the mounting pad and electrically connected to the semiconductor chip by a pattern arranged on the substrate, wherein the semiconductor chip includes a first terminal and a second terminal for inputting/outputting signals, the test terminal group includes a first test terminal electrically connected to the first terminal and a second test terminal electrically connected to the second terminal, a first voltage is applied to the first terminal and the second terminal, and a stress signal that is caused by a second voltage is applied to the first test terminal.

Abstract: A multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers stacked therein, and first and second internal electrodes alternately disposed with at least one among the plurality of dielectric layers interposed therebetween. The first internal electrodes include first and second lead portions exposed to a mounting surface of the ceramic body, and disposed to be spaced apart from each other in a length direction of the ceramic body. The second internal electrodes include a third lead portion exposed to the mounting surface of the ceramic body, and disposed between the first and second lead portions in the length direction of the ceramic body.

Abstract: The present disclosure relates to a substrate for surface enhanced Raman scattering, a fabricating method for the same and an analyzing method using the same. The present disclosure may provide a substrate for surface enhanced Raman scattering having excellent surface enhanced Raman scattering effects by randomly stacking of Ag nanowires in a simple way by utilizing a substrate having a filtering function, and a method for efficiently analyzing a material to be analyzed using the same.

Abstract: In a method of compiling an updated program having a plurality of updated functions that is updated from an original program having a plurality of original functions, it is determined whether a first original function corresponding to a first updated function exists, it is determined whether the first updated function is changed from the first original function, a first optimization combination for the first updated function is searched when the first original function does not exist or when the first updated function is changed from the first original function, a second optimization combination applied to the first original function is read from a configuration database storing optimization combinations for the original functions when the first original function exists and the first updated function is not changed from the first original function, and the updated program is compiled using the first optimization combination or the second optimization combination.

Abstract: The present invention relates to an apparatus and method for IP switching/routing SDI format image signal through bandwidth splitting and reduction, more specifically, which decomposes image signals consisting of YCbCr type color format entered with serial digital interface (SDI) into Y (luminance) component and C (chrominance) component, or multiple bit slice components; converts the components into IP packets and performs switching and/or routing of the IP packets; extracts Y component and C component or multiple bit slice components from the switched or routed IP packets; and combines the components into SDI format image signal and outputs the combined SDI format image signal. In addition, the present invention provides an apparatus switching/routing image signals through grid based networking, in which broadband switching or routing is performed with multiple narrow band switches or routers by switching or routing image signals through bandwidth splitting and reduction.

Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes a transient-state detection circuit configured to generate a dynamic triggering signal based on a voltage change rate of a voltage on a first power rail; a voltage detection circuit configured to generate a static triggering signal based on the voltage on the first power rail; a trigger circuit configured to generate a discharge control signal based on the dynamic triggering signal and the static triggering signal; and a main discharge circuit configured to discharge an electric charge from the first power rail to a second power rail based on the discharge control signal.

Abstract: In a method of compiling an updated program having a plurality of updated functions that is updated from an original program having a plurality of original functions, it is determined whether a first original function corresponding to a first updated function exists, it is determined whether the first updated function is changed from the first original function, a first optimization combination for the first updated function is searched when the first original function does not exist or when the first updated function is changed from the first original function, a second optimization combination applied to the first original function is read from a configuration database storing optimization combinations for the original functions when the first original function exists and the first updated function is not changed from the first original function, and the updated program is compiled using the first optimization combination or the second optimization combination.

Abstract: A multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers stacked therein, and first and second internal electrodes alternately disposed with at least one among the plurality of dielectric layers interposed therebetween. The first internal electrodes include first and second lead portions exposed to a mounting surface of the ceramic body, and disposed to be spaced apart from each other in a length direction of the ceramic body. The second internal electrodes include a third lead portion exposed to the mounting surface of the ceramic body, and disposed between the first and second lead portions in the length direction of the ceramic body.

Abstract: A film-type semiconductor package includes a semiconductor integrated circuit and a dummy metal pattern. The semiconductor integrated circuit is formed on a film and includes an electrostatic discharge (ESD) protection circuit. The dummy metal pattern is formed on the film and is electrically connected to the ESD protection circuit through a first wiring formed on the film.

Abstract: A multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers stacked therein, and first and second internal electrodes alternately disposed with at least one among the plurality of dielectric layers interposed therebetween. The first internal electrodes include first and second lead portions exposed to a mounting surface of the ceramic body, and disposed to be spaced apart from each other in a length direction of the ceramic body. The second internal electrodes include a third lead portion exposed to the mounting surface of the ceramic body, and disposed between the first and second lead portions in the length direction of the ceramic body.

Abstract: A multilayer capacitor includes a capacitor body including dielectric layers and a plurality of first and second internal electrodes alternately disposed with one of the dielectric layers interposed between each pair of adjacent first and second internal electrodes. First and second via electrodes penetrate through the plurality of second internal electrodes to thereby be exposed to a first surface of the capacitor body, and are disposed to be spaced apart from each other. First and second external electrodes are disposed on two side surfaces of the capacitor body and connected to opposing ends of the first internal electrodes, respectively. Third and fourth external electrodes are disposed on the first surface of the capacitor body to be spaced apart from each other, and are connected to end portions of the first and second via electrodes, respectively.

Abstract: The present disclosure relates to a culture scaffold for promoting differentiation from stem cells or precursor cells into osteoblasts, in which the culture scaffold includes a structure composed of a ridge and a groove, a kit using the culture scaffold, and a method for differentiating stem cells or precursor cells into osteoblasts. The culture scaffold of the present disclosure has an optimal pattern depending on the type of stem cells or precursor cells, thereby improving the osteoblast differentiation potency. In particular, it has a feature of showing excellent osteoblast differentiation potency even if only a small amount of supplementary factors inducing osteoblast differentiation is added. Furthermore, since the osteoblast differentiation potency is not greatly influenced by the change in cell density, it is possible to induce differentiation into osteoblasts without being influenced by the inflammatory environment formed by the inflammatory factors that increase upon cell differentiation.

Abstract: A method and a device for determining similarity between sequences are provided. The method includes obtaining a first sequence of frames and a second sequence of frames, determining a descriptor of a first frame of the first sequence based on luma information of blocks in the first frame, the descriptor of the first frame including luma difference information that is determined based on the luma information of the blocks in the first frame, determining a descriptor of a second frame of the second sequence based on luma information of blocks in the second frame, the descriptor of the second frame including luma difference information that is determined based on the luma information of the blocks in the second frame, and determining a similarity between the first sequence and the second sequence based on the descriptor of the first frame and the descriptor of the second frame.

Abstract: A multilayer capacitor includes a capacitor body including dielectric layers and a plurality of first and second internal electrodes alternately disposed with one of the dielectric layers interposed between each pair of adjacent first and second internal electrodes. First and second via electrodes penetrate through the plurality of second internal electrodes to thereby be exposed to a first surface of the capacitor body, and are disposed to be spaced apart from each other. First and second external electrodes are disposed on two side surfaces of the capacitor body and connected to opposing ends of the first internal electrodes, respectively. Third and fourth external electrodes are disposed on the first surface of the capacitor body to be spaced apart from each other, and are connected to end portions of the first and second via electrodes, respectively.

Abstract: Provided is a coating composition for a transparent electrode passivation layer, the coating composition including a metal oxide and at least one selected from the group consisting of ethylene glycol, propylene glycol, diethylene glycol, triethylene glycol, and tetraethylene glycol. When a passivation layer formed using the coating composition for a transparent electrode passivation layer according to the present invention is applied to a transparent electrode, the passivation layer is capable of ensuring the heat resistance and durability of the transparent electrode while maintaining the transmittance of the transparent electrode. Particularly, the coating composition for a transparent electrode passivation layer according to the present invention exhibits excellent hardness.

Abstract: Provided is an apparatus for measuring a distance change, the apparatus including an information acquisition unit, an object determination unit, a feature point determination unit, an optical flow calculator, a matching point determination unit, an object length change calculator that calculates a length change ratio between an object of a first frame image and an object of a second frame image by using a feature point and a matching point, and a distance change calculator that calculates a change from a distance between a camera and the object from when the camera acquires the first frame image and when the camera acquires the second frame image using the calculated length change ratio.

Abstract: Disclosed is a method and apparatus for encoding a three-dimensional (3D) mesh. The method for encoding the 3D mesh includes determining a priority of a gate configuring a 3D mesh corresponding to a 3D object, removing vertices configuring the 3D mesh using the determined priority of the gate, and simplifying the 3D mesh.

Abstract: A test board for a semiconductor device and a test board including the same are provided. A test board includes a substrate, a mounting pad which is formed on the substrate and on which a semiconductor chip is mounted and a test terminal group arranged on the substrate to be spaced apart from the mounting pad and electrically connected to the semiconductor chip by a pattern arranged on the substrate, wherein the semiconductor chip includes a first terminal and a second terminal for inputting/outputting signals, the test terminal group includes a first test terminal electrically connected to the first terminal and a second test terminal electrically connected to the second terminal, a first voltage is applied to the first terminal and the second terminal, and a stress signal that is caused by a second voltage is applied to the first test terminal.

Abstract: A film-type semiconductor package includes a semiconductor integrated circuit and a dummy metal pattern. The semiconductor integrated circuit is formed on a film and includes an electrostatic discharge (ESD) protection circuit. The dummy metal pattern is formed on the film and is electrically connected to the ESD protection circuit through a first wiring formed on the film.