Patents by Inventor Chang-Woo Oh

Chang-Woo Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12171267
    Abstract: Provided is a heater for a cigarette-type electronic cigarette device. A heater for a cigarette-type electronic cigarette device according to an exemplary embodiment of the present invention is configured to a circumference of a cigarette inserted thereinto by a predetermined length and includes a heating member that is disposed to surround a circumference of the cigarette when the cigarette is inserted and is heated through an eddy current induced by electromagnetic induction to heat the cigarette, a heat insulation member that is disposed to surround a circumference of the heating member and blocks the heat generated by the heating member from moving to the outside, and a coil member that is wound multiple times around a circumference of the heat insulation member and that generates a magnetic field that causes electromagnetic induction to the heating member when power is applied.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: December 24, 2024
    Assignee: AMOSENSE CO., LTD.
    Inventor: Chang-Woo Oh
  • Patent number: 11944123
    Abstract: Provided is a heat generating heater for a cigarette-type electronic cigarette device. A heat generating heater for a cigarette-type electronic cigarette device is configured by at least a portion of the length being inserted into a cigarette and comprises: a main body which is made of a ceramic material and has an end portion pointed for penetration into the cigarette; a heat generating unit which is disposed to surround the circumferential surface of the main body to generate heat for heating the inside of the cigarette; an arrangement hole which is formed in the main body along the longitudinal direction thereof; and a temperature sensing unit which is disposed in the arrangement hole for measuring a heating temperature of the heat generating unit.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: April 2, 2024
    Assignee: AMOSENSE CO., LTD
    Inventor: Chang Woo Oh
  • Patent number: 11419185
    Abstract: Provided is a heater for a cigarette-type electronic cigarette device. A heater for a cigarette-type electronic cigarette device according to an exemplary embodiments of the present invention comprises: a support body made of a ceramic material and formed to have a hollow so as to surround a cigarette; an electrode pattern formed on one surface of the support body so as to heat the cigarette inserted into the support body when power is applied; and a cover layer which has an insulation property and covers the electrode pattern.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: August 16, 2022
    Assignee: AMOSENSE CO., LTD.
    Inventors: Chang Woo Oh, Young Jun An, Gil Seon Lee, Jung Kyun Shin
  • Publication number: 20220132931
    Abstract: Provided is a heater for a cigarette-type electronic cigarette device. A heater for a cigarette-type electronic cigarette device according to an exemplary embodiment of the present invention is configured to a circumference of a cigarette inserted thereinto by a predetermined length and includes a heating member that is disposed to surround a circumference of the cigarette when the cigarette is inserted and is heated through an eddy current induced by electromagnetic induction to heat the cigarette, a heat insulation member that is disposed to surround a circumference of the heating member and blocks the heat generated by the heating member from moving to the outside, and a coil member that is wound multiple times around a circumference of the heat insulation member and that generates a magnetic field that causes electromagnetic induction to the heating member when power is applied.
    Type: Application
    Filed: February 7, 2020
    Publication date: May 5, 2022
    Applicant: AMOSENSE CO., LTD.
    Inventor: Chang-Woo OH
  • Publication number: 20210045447
    Abstract: Provided is a heat generating heater for a cigarette-type electronic cigarette device. A heat generating heater for a cigarette-type electronic cigarette device is configured by at least a portion of the length being inserted into a cigarette and comprises: a main body which is made of a ceramic material and has an end portion pointed for penetration into the cigarette; a heat generating unit which is disposed to surround the circumferential surface of the main body to generate heat for heating the inside of the cigarette; an arrangement hole which is formed in the main body along the longitudinal direction thereof; and a temperature sensing unit which is disposed in the arrangement hole for measuring a heating temperature of the heat generating unit.
    Type: Application
    Filed: April 9, 2019
    Publication date: February 18, 2021
    Inventor: Chang Woo OH
  • Publication number: 20200046028
    Abstract: Provided is a heater for a cigarette-type electronic cigarette device. A heater for a cigarette-type electronic cigarette device according to an exemplary embodiments of the present invention comprises: a support body made of a ceramic material and formed to have a hollow so as to surround a cigarette; an electrode pattern formed on one surface of the support body so as to heat the cigarette inserted into the support body when power is applied; and a cover layer which has an insulation property and covers the electrode pattern.
    Type: Application
    Filed: March 30, 2018
    Publication date: February 13, 2020
    Inventors: Chang Woo OH, Young Jun AN, Gil Seon LEE, Jung Kyun SHIN
  • Patent number: 9673099
    Abstract: An integrated circuit device includes a first transistor having a first channel between a first source/drain, and a second transistor having a second channel between a second source/drain. The first transistor operates based on a first amount of current and the second transistor operates based on a second amount of current different from the first amount of current. The first and second channels have fixed channel widths. The fixed channel widths may be based on fins or nanowires included in the first and second transistors.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: June 6, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myung-Gil Kang, Sung-Bong Kim, Chang-Woo Oh, Dong-Won Kim
  • Patent number: 9490177
    Abstract: An integrated circuit can include first and second FETs of a particular conductivity type on a substrate, wherein a first source/drain region of the first FET is closer to a center of a first channel region of the first FET than a second source/drain region of the second FET is to a center of a second channel region of the second FET.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: November 8, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Woo Oh, Myung-Gil Kang, Young-Chai Jung
  • Patent number: 9443935
    Abstract: Provided are methods of forming field effect transistors. The method includes preparing a substrate with a first region and a second region, forming fin portions on the first and second regions, each of the fin portions protruding from the substrate and having a first width, forming a first mask pattern to expose the fin portions on the first region and cover the fin portions on the second region, and changing widths of the fin portions provided on the first region.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: September 13, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang Woo Oh, Shincheol Min, Jongwook Lee, Choongho Lee
  • Publication number: 20160240441
    Abstract: An integrated circuit device includes a first transistor having a first channel between a first source/drain, and a second transistor having a second channel between a second source/drain. The first transistor operates based on a first amount of current and the second transistor operates based on a second amount of current different from the first amount of current. The first and second channels have fixed channel widths. The fixed channel widths may be based on fins or nanowires included in the first and second transistors.
    Type: Application
    Filed: April 22, 2016
    Publication date: August 18, 2016
    Inventors: Myung-Gil KANG, Sung-Bong KIM, Chang-Woo OH, Dong-Won KIM
  • Publication number: 20160155804
    Abstract: Provided are methods of forming field effect transistors. The method includes preparing a substrate with a first region and a second region, forming fin portions on the first and second regions, each of the fin portions protruding from the substrate and having a first width, forming a first mask pattern to expose the fin portions on the first region and cover the fin portions on the second region, and changing widths of the fin portions provided on the first region.
    Type: Application
    Filed: February 2, 2016
    Publication date: June 2, 2016
    Inventors: Chang Woo Oh, Shincheol Min, Jongwook Lee, Choongho Lee
  • Patent number: 9324850
    Abstract: An integrated circuit device includes a first transistor having a first channel between a first source/drain, and a second transistor having a second channel between a second source/drain. The first transistor operates based on a first amount of current and the second transistor operates based on a second amount of current different from the first amount of current. The first and second channels have fixed channel widths. The fixed channel widths may be based on fins or nanowires included in the first and second transistors.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: April 26, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myung-Gil Kang, Sung-Bong Kim, Chang-Woo Oh, Dong-Won Kim
  • Patent number: 9287402
    Abstract: Provided are methods of forming field effect transistors. The method includes preparing a substrate with a first region and a second region, forming fin portions on the first and second regions, each of the fin portions protruding from the substrate and having a first width, forming a first mask pattern to expose the fin portions on the first region and cover the fin portions on the second region, and changing widths of the fin portions provided on the first region.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: March 15, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang Woo Oh, Shincheol Min, Jongwook Lee, Choongho Lee
  • Publication number: 20150162437
    Abstract: Provided are methods of forming field effect transistors. The method includes preparing a substrate with a first region and a second region, forming fin portions on the first and second regions, each of the fin portions protruding from the substrate and having a first width, forming a first mask pattern to expose the fin portions on the first region and cover the fin portions on the second region, and changing widths of the fin portions provided on the first region.
    Type: Application
    Filed: February 19, 2015
    Publication date: June 11, 2015
    Inventors: Chang Woo Oh, Shincheol Min, Jongwook Lee, Choongho Lee
  • Patent number: 8987100
    Abstract: Provided are methods of forming field effect transistors. The method includes preparing a substrate with a first region and a second region, forming fin portions on the first and second regions, each of the fin portions protruding from the substrate and having a first width, forming a first mask pattern to expose the fin portions on the first region and cover the fin portions on the second region, and changing widths of the fin portions provided on the first region.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang Woo Oh, Shincheol Min, Jongwook Lee, Choongho Lee
  • Publication number: 20140239255
    Abstract: An integrated circuit device includes a first transistor having a first channel between a first source/drain, and a second transistor having a second channel between a second source/drain. The first transistor operates based on a first amount of current and the second transistor operates based on a second amount of current different from the first amount of current. The first and second channels have fixed channel widths. The fixed channel widths may be based on fins or nanowires included in the first and second transistors.
    Type: Application
    Filed: January 23, 2014
    Publication date: August 28, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myung-Gil KANG, Sung-Bong KIM, Chang-Woo OH, Dong-Won KIM
  • Patent number: 8815702
    Abstract: Semiconductor devices include a semiconductor substrate with a stack structure protruding from the semiconductor substrate and surrounded by an isolation structure. The stack structure includes an active layer pattern and a gap-filling insulation layer between the semiconductor substrate and the active layer pattern. A gate electrode extends from the isolation structure around the stack structure. The gate electrode is configured to provide a support structure for the active layer pattern. The gate electrode may be a gate electrode of a silicon on insulator (SOI) device formed on the semiconductor wafer and the semiconductor device may further include a bulk silicon device formed on the semiconductor substrate in a region of the semiconductor substrate not including the gap-filing insulation layer.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Woo Oh, Dong-Gun Park, Dong-Won Kim, Ming Li, Sung-Hwan Kim
  • Publication number: 20140127872
    Abstract: A method of fabricating a fin field effect transistor may include forming a fin portion protruding from a substrate, forming a device isolation layer to cover a lower sidewall of the fin portion, forming a semiconductor layer using an epitaxial method to cover an upper sidewall and a top surface of the fin portion, selectively etching an upper portion of the device isolation layer to form a gap region between a top surface of the device isolation layer and a bottom surface of the semiconductor layer, and forming a gate electrode pattern on the semiconductor layer to fill the gap region. Related devices are also described.
    Type: Application
    Filed: January 8, 2014
    Publication date: May 8, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang-Woo Oh, Sang-Hoon LEE, Sung-Bong KIM, Hyung-Suk LEE
  • Patent number: 8685805
    Abstract: Provided is a semiconductor device. The semiconductor device includes a semiconductor substrate, a first isolation dielectric pattern on the semiconductor substrate, and an active pattern on the first isolation dielectric pattern. A semiconductor pattern is interposed between the semiconductor substrate and the first isolation dielectric pattern, and a second isolation dielectric pattern is interposed between the semiconductor substrate and the semiconductor pattern. The semiconductor substrate and the semiconductor pattern are electrically connected by a connection pattern.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: April 1, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chang-Woo Oh
  • Patent number: RE49988
    Abstract: An integrated circuit device includes a first transistor having a first channel between a first source/drain, and a second transistor having a second channel between a second source/drain. The first transistor operates based on a first amount of current and the second transistor operates based on a second amount of current different from the first amount of current. The first and second channels have fixed channel widths. The fixed channel widths may be based on fins or nanowires included in the first and second transistors.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: May 28, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-Gil Kang, Sung-Bong Kim, Chang-Woo Oh, Dong-Won Kim