Patents by Inventor Chang Yun
Chang Yun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11964161Abstract: Disclosed is a plasma generator. The plasma generator may include a gripping portion including at least one interface unit configured to receive an input from a user; a head portion including a plasma generating portion configured to generate the plasma; a first cartridge configured to detachably couple at a first end of the head portion and generate the plasma over a predetermined region; and a light irradiation portion provided at a second end of the head portion.Type: GrantFiled: August 4, 2023Date of Patent: April 23, 2024Assignee: GCS Co., Ltd.Inventors: Chang Sik Kim, Tae Yong Kim, Myeong Woo Kim, Hyuk Namgoong, Ha Yun Lee
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Publication number: 20240124684Abstract: A novel additive comprising an oxamide additive with long chains is described herein. The additive can be incorporated into a thermoplastic polymer to form a thermoplastic polymer composite. The additive modifies the surface of the thermoplastic polymer to render the oil, water or dust repellent properties to the thermoplastic polymer composite.Type: ApplicationFiled: September 7, 2023Publication date: April 18, 2024Applicant: TE Connectivity Solutions GmbHInventors: Lei WANG, Ting GAO, Dejie TAO, Hyo Chang YUN
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Patent number: 11958844Abstract: The present invention relates to novel compounds having a histone deacetylase 6 (HDAC6) inhibitory activity, optical isomers thereof or pharmaceutically acceptable salts thereof, a pharmaceutical use thereof, and a method for preparing the same. According to the present invention, the novel compounds, optical isomers thereof or pharmaceutically acceptable salts thereof have the histone deacetylase 6 (HDAC6) inhibitory activity, and are effective in preventing or treating HDAC6-related diseases, comprising infectious diseases; neoplasm; internal secretion; nutritional and metabolic diseases; mental and behavioral disorders; neurological diseases; eye and ocular adnexal diseases; circulatory diseases; respiratory diseases; digestive diseases; skin and subcutaneous tissue diseases; musculoskeletal system and connective tissue diseases; and teratosis or deformities, and chromosomal aberration.Type: GrantFiled: July 25, 2019Date of Patent: April 16, 2024Assignee: Chong Kun Dang Pharmaceutical Corp.Inventors: Chang Sik Lee, Jung Taek Oh, Hokeun Yun, Hyeseung Song, Hyunjin Michael Kim
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Publication number: 20240105604Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. Each of the first and second stacks includes a first electrode and a second electrode on the first electrode. A sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. A sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. The second distance is smaller than a half of the first distance.Type: ApplicationFiled: December 1, 2023Publication date: March 28, 2024Inventors: Sung-Hun Lee, Seokjung Yun, Chang-Sup Lee, Seong Soon Cho, Jeehoon Han
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Solution composition for surface treatment of steel sheet and surface-treated steel sheet using same
Patent number: 11939489Abstract: Provided is a composition for surface treatment of a steel sheet, the composition having excellent resistance to an acid, such as sulfuric acid, and to a coated steel sheet to which the composition for surface treatment is applied, wherein the composition for surface treatment comprises 30-50% wt % of colloidal silica containing 5-20 nm-sized silica, 40-60% wt % of silane containing three or more alkoxy groups, 5-15 wt % of an acrylate-based organic monomer, 0.01-1 wt % of an acid, and 1-15 wt % of a solvent.Type: GrantFiled: September 28, 2017Date of Patent: March 26, 2024Assignees: POSCO CO., LTD, NOROO COIL COATINGS CO., LTD.Inventors: Chang-Hoon Choi, Dong-Yun Kim, Min-Ho Jo, Jae-Duck Ko, Won-Ho Son, Jong-Hwa Kim -
Publication number: 20240098275Abstract: A method for decoding an image based on an intra prediction, comprising: obtaining a first prediction pixel of a first region in a current block by using a neighboring pixel adjacent to the current block; obtaining a second prediction pixel of a second region in the current block by using the first prediction pixel of the first region; and decoding the current block based on the first and the second prediction pixels.Type: ApplicationFiled: November 15, 2023Publication date: March 21, 2024Inventors: Je Chang JEONG, Ki Baek KIM, Won Jin LEE, Hye Jin SHIN, Jong Sang YOO, Jang Hyeok YUN, Kyung Jun LEE, Jae Hun KIM, Sang Gu LEE
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Publication number: 20240097067Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first micro-light-emitting diodes on a first temporary substrate; and replacing at least one defective micro-light-emitting diode of the first micro-light-emitting diodes with at least one second micro-light-emitting diode. The first micro-light-emitting diodes and at least one second micro-light-emitting diode are distributed on the first temporary substrate. The first micro-light-emitting diodes and at least one second micro-light-emitting diode have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first micro-light-emitting diodes and at least one second micro-light-emitting diode. A semiconductor structure and a display panel are also provided.Type: ApplicationFiled: December 4, 2023Publication date: March 21, 2024Applicant: PlayNitride Display Co., Ltd.Inventors: Bo-Wei Wu, Yu-Yun Lo, Chien-Chen Kuo, Chang-Feng Tsai, Tzu-Yang Lin
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Publication number: 20240098960Abstract: An integrated circuit structure in which a gate overlies channel region in an active area of a first transistor. The first transistor includes a channel region, a source region and a drain region. A conductive contact is coupled to the drain region of the first transistor. A second transistor that includes a channel region, a source region a drain region is adjacent to the first transistor. The gate of the second transistor is spaced from the gate of the first transistor. A conductive via passes through an insulation layer to electrically connect to the gate of the second transistor. An expanded conductive via overlays both the conductive contact and the conductive via to electrically connect the drain of the first transistor to the gate of the second transistor.Type: ApplicationFiled: November 22, 2023Publication date: March 21, 2024Inventors: YU-KUAN LIN, CHANG-TA YANG, PING-WEI WANG, KUO-YI CHAO, MEI-YUN WANG
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Publication number: 20240083981Abstract: The present invention relates to the treatment of herpes simplex virus (HSV) infection using an anti-HSV antibody. In particular, the anti-HSV antibody specifically binds to the glycoprotein D (gD) of herpes simplex virus-1 (HSV-1) and herpes simplex virus-2 (HSV-2). The treatment of the present invention is effective against drug-resistant and/or recurrent HSV infection.Type: ApplicationFiled: September 1, 2023Publication date: March 14, 2024Applicant: United BioPharma, Inc.Inventors: Be-Sheng KUO, Chao-Hung LI, Hsiao-Yun SHAO, Yaw-Jen LIU, Shugene LYNN, Chang Yi WANG
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Patent number: 11930684Abstract: Provided is a display device. The display device includes a first base portion, a second base portion facing the first base portion, a light emitting layer disposed on one surface of the first base portion and emitting first light, a first wavelength conversion pattern disposed on the light emitting layer and converting the first light into second light having a different wavelength from the first light, a first color filter overlapping the first wavelength conversion pattern on one surface of the second base portion and spaced apart from the first wavelength conversion pattern, and an air layer interposed between the first wavelength conversion pattern and the first color filter.Type: GrantFiled: June 3, 2021Date of Patent: March 12, 2024Assignee: Samsung Display Co., Ltd.Inventors: Chang Soon Jang, Keun Chan Oh, Gak Seok Lee, Sang Hun Lee, So Yun Lee, Ji Eun Jang
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Patent number: 11901237Abstract: A device includes a semiconductor fin, a gate structure, gate spacers, and a dielectric feature. The semiconductor fin is over a substrate. The gate structure is over the semiconductor fin and includes a gate dielectric layer over the semiconductor fin and a gate metal covering the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The dielectric feature is over the substrate. The dielectric feature is in contact with the gate metal, the gate dielectric layer, and the gate spacers, and an interface between the gate metal and the dielectric feature is substantially aligned with an interface between the dielectric feature and one of the gate spacers.Type: GrantFiled: July 25, 2022Date of Patent: February 13, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chang-Yun Chang, Bone-Fong Wu, Ming-Chang Wen, Ya-Hsiu Lin
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Publication number: 20230386927Abstract: The present disclosure describes fabricating devices with tunable gate height and effective capacitance. A method includes forming a first metal gate stack in a dummy region of a semiconductor substrate and a second metal gate stack in an active device region of the semiconductor substrate, and performing a chemical mechanical polishing (CMP) process using a slurry including charged abrasive nanoparticles. The first and second metal gate stacks are different in composition. The charged abrasive nanoparticles include a first concentration in the active device region different from a second concentration in the dummy region.Type: ApplicationFiled: August 4, 2023Publication date: November 30, 2023Inventors: Ming-Chang Wen, Chang-Yun Chang, Keng-Yao Chen, Chen-Yu Tai, Yi-Ting Fu
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Publication number: 20230377873Abstract: A semiconductor structure includes a substrate; an isolation structure over the substrate; a first fin extending from the substrate and through the isolation structure; a first source/drain structure over the first fin; a contact etch stop layer over the isolation structure and contacting a first side face of the first source/drain structure; and a first dielectric structure contacting a second side face of the first source/drain structure. The first side face and the second side face are on opposite sides of the first fin in a cross-sectional view cut along a widthwise direction of the first fin. The first dielectric structure extends higher than the first source/drain structure.Type: ApplicationFiled: July 28, 2023Publication date: November 23, 2023Inventors: Ming-Chang Wen, Chang-Yun Chang, Hsien-Chin Lin, Hung-Kai Chen
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Patent number: 11817354Abstract: The present disclosure describes fabricating devices with tunable gate height and effective capacitance. A method includes forming a first metal gate stack in a dummy region of a semiconductor substrate, the first metal gate stack including a first work function metal (WFM) layer; forming a second metal gate stack in an active device region of the semiconductor substrate, the second metal gate stack including a second WFM layer different than the first WFM layer; and performing a CMP process using a slurry including charged abrasive nanoparticles. The charged abrasive nanoparticles include a first concentration in the active device region different from a second concentration in the dummy region causing different polish rates in the active device region and dummy region. After the performing of the CMP process, the first metal gate stack has a first height different from a second height of the second metal gate stack.Type: GrantFiled: August 9, 2022Date of Patent: November 14, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Ming-Chang Wen, Chang-Yun Chang, Keng-Yao Chen, Chen-Yu Tai, Yi-Ting Fu
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Publication number: 20230352345Abstract: A method includes forming a fin protruding from a substrate, forming a gate structure across the fin, forming an epitaxial feature over the fin, depositing a dielectric layer covering the epitaxial feature and over sidewalls of the gate structure, performing an etching process to form a trench, the trench dividing the gate structure into first and second gate segments and extending into a region of the dielectric layer, forming a dielectric feature in the trench, recessing a portion of the dielectric feature located in the region, selectively etching the dielectric layer to expose the epitaxial feature, and depositing a conductive feature in physical contact with the epitaxial feature and directly above the portion of the dielectric feature.Type: ApplicationFiled: June 30, 2023Publication date: November 2, 2023Inventors: I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Chang-Yun Chang, Ching-Feng Fu, Peng Wang
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Patent number: 11787056Abstract: An obstacle avoidance method for a robot arm is provided, including a modeling step, a collecting and evaluating coordinates step, an obtaining control parameter step, an establishing an occupation function step, and a finding an obstacle avoiding posture step. The present invention pre-stores the data obtained in performing the modeling step, the step of collecting and evaluating coordinates, the step of obtaining control parameter, and the step of establishing the occupation function into a database, thereby allowing the robot arm to quickly evaluate whether a collision behavior will occur in subsequent execution of a task. If a collision will occur, the robot arm executes the step of the finding the obstacle avoiding posture to dodge obstacles. The invention uses a non-contact approach for anti-collision design, which can improve the shortcomings faced by the existing contact type anti-collision design.Type: GrantFiled: September 14, 2021Date of Patent: October 17, 2023Assignee: Cheng Uei Precision Industry Co., Ltd.Inventors: Po Ting Lin, Chao Yi Lin, Shih Wei Lin, Kun Cheng Li, Chang Yun Yang, Pei Fen Wu, Shun Chien Lan
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DRUG-CLAY MINERAL COMPLEX CONTAINING PHOSPHOLIPID AND ORAL ADMINISTRATION COMPOSITION INCLUDING SAME
Publication number: 20230321249Abstract: According to one embodiment of the present invention, provided is a drug-clay mineral complex, in which the complex comprises a phospholipid, and the drug has an amine group.Type: ApplicationFiled: July 1, 2021Publication date: October 12, 2023Applicant: Korea Institute of Geoscience and Mineral ResourcesInventors: Jae Hwan KIM, Il Mo KANG, Dae Duk KIM, Jang Ik LEE, Gyu Ho KIM, Min Jun BAEK, Chang Yun PARK, Ki Min ROH, Sung Man SEO -
Publication number: 20230299203Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy, gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.Type: ApplicationFiled: May 24, 2023Publication date: September 21, 2023Inventors: Shao-Ming YU, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh, Kuei-Liang Lu, Yi-Tang Lin
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Patent number: 11721761Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.Type: GrantFiled: January 27, 2022Date of Patent: August 8, 2023Assignee: Mosaid Technologies IncorporatedInventors: Shao-Ming Yu, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh, Kuei-Liang Lu, Yi-Tang Lin
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Patent number: 11721544Abstract: A semiconductor structure includes a substrate; an isolation structure over the substrate; a first fin extending from the substrate and through the isolation structure; a first source/drain structure over the first fin; a contact etch stop layer over the isolation structure and contacting a first side face of the first source/drain structure; and a first dielectric structure contacting a second side face of the first source/drain structure. The first side face and the second side face are on opposite sides of the first fin in a cross-sectional view cut along a widthwise direction of the first fin. The first dielectric structure extends higher than the first source/drain structure.Type: GrantFiled: January 31, 2022Date of Patent: August 8, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ming-Chang Wen, Chang-Yun Chang, Hsien-Chin Lin, Hung-Kai Chen