Patents by Inventor Chan Hoon Park

Chan Hoon Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250149301
    Abstract: A plasma processing apparatus may include a support configured to receive a substrate, a gas distribution plate (GDP) including a plurality of nozzles facing the support, a main splitter configured to supply a process gas, and an additional splitter configured to supply an acceleration gas or a deceleration gas. The plurality of nozzles may include a plurality of central nozzles, a plurality of outer nozzles, a plurality of middle nozzles configured to spray the process gas and the acceleration gas, a plurality of first nozzles, and a plurality of second nozzles.
    Type: Application
    Filed: January 3, 2025
    Publication date: May 8, 2025
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chan Hoon PARK, Jung Hwan UM, Jin Young PARK, Ho Yong PARK, Jin Young BANG, Jong Woo SUN, Sang Jean JEON, Je Woo HAN
  • Patent number: 12202324
    Abstract: A battery case for a vehicle includes a lower panel supporting lower sides of a plurality of battery modules, the lower panel including a sidewall bent and extending upwards from the lower panel, a side member surrounding and supporting the sidewall of the lower panel to protect side surfaces of the battery modules, and a plurality of reinforcing members, each of which is disposed between neighboring ones of the battery modules such that two opposite ends of the reinforcing members are coupled to and supported by the sidewall.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: January 21, 2025
    Assignees: Hyundai Motor Company, Kia Corporation
    Inventors: Chan Hoon Park, Yong Hwan Choi
  • Publication number: 20230033091
    Abstract: A plasma processing apparatus may include a support configured to receive a substrate, a gas distribution plate (GDP) including a plurality of nozzles facing the support, a main splitter configured to supply a process gas, and an additional splitter configured to supply an acceleration gas or a deceleration gas. The plurality of nozzles may include a plurality of central nozzles, a plurality of outer nozzles, a plurality of middle nozzles configured to spray the process gas and the acceleration gas, a plurality of first nozzles, and a plurality of second nozzles.
    Type: Application
    Filed: September 23, 2022
    Publication date: February 2, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chan Hoon Park, Jung Hwan Um, Jin Young Park, Ho Yong Park, Jin Young Bang, Jong Woo Sun, Sang Jean Jeon, Je Woo Han
  • Patent number: 11521866
    Abstract: In a plasma processing method, a substrate is loaded onto a lower electrode within a chamber. A plasma power is applied to form plasma within the chamber. A voltage function of a nonsinusoidal wave having a DC pulse portion and a ramp portion is generated. Generating the voltage function may include setting a slope of the ramp portion and setting a duration ratio of the ramp portion to a cycle of the voltage function in order to control an ion energy distribution generated at a surface of the substrate. A bias power of the nonsinusoidal wave is applied to the lower electrode.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: December 6, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-Yoon Song, Chan-Hoon Park, Jong-Woo Sun, Jung-Mo Sung, Je-Woo Han, Jin-Young Park
  • Patent number: 11437264
    Abstract: A semiconductor processing apparatus includes a chamber housing, an electrostatic chuck disposed in the chamber housing, the electrostatic chuck being configured to hold a semiconductor wafer, an edge ring surrounding the electrostatic chuck, the edge ring including a ring electrode disposed within the edge ring, and a ring voltage supply configured to supply a ring voltage to the ring electrode, the ring voltage having a non-sinusoidal periodic waveform, wherein each period of the non-sinusoidal periodic waveform comprises a positive voltage applied during a first time period and a negative voltage applied during a second time period, and wherein the negative voltage has a magnitude that increases during the second time period.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: September 6, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Mo Sung, Jong Woo Sun, Je Woo Han, Chan Hoon Park, Seung Yoon Song, Seul Ha Myung
  • Publication number: 20220063390
    Abstract: A battery case for a vehicle includes a lower panel supporting lower sides of a plurality of battery modules, the lower panel including a sidewall bent and extending upwards from the lower panel, a side member surrounding and supporting the sidewall of the lower panel to protect side surfaces of the battery modules, and a plurality of reinforcing members, each of which is disposed between neighboring ones of the battery modules such that two opposite ends of the reinforcing members are coupled to and supported by the sidewall.
    Type: Application
    Filed: November 9, 2021
    Publication date: March 3, 2022
    Inventors: Chan Hoon Park, Yong Hwan Choi
  • Patent number: 11157535
    Abstract: A subject-based ranking determining method and system based on an interaction between a writer and a reader. A subject-based ranking determining method may include evaluating a writer that creates content of a corresponding subject for each subject based on the corresponding subject; and providing a search result in which an evaluation result of the writer on a subject corresponding to an input query is applied to a content ranking in response to input of the query.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: October 26, 2021
    Assignee: NAVER CORPORATION
    Inventors: Jinhong Kim, Sanghoon Lee, Jin Hee Kim, Chan Hoon Park, Kwang Hyun Kim, Inho Kang
  • Publication number: 20210202276
    Abstract: In a plasma processing method, a substrate is loaded onto a lower electrode within a chamber. A plasma power is applied to form plasma within the chamber. A voltage function of a nonsinusoidal wave having a DC pulse portion and a ramp portion is generated. Generating the voltage function may include setting a slope of the ramp portion and setting a duration ratio of the ramp portion to a cycle of the voltage function in order to control an ion energy distribution generated at a surface of the substrate. A bias power of the nonsinusoidal wave is applied to the lower electrode.
    Type: Application
    Filed: March 11, 2021
    Publication date: July 1, 2021
    Inventors: Seung-Yoon SONG, Chan-Hoon PARK, Jong-Woo SUN, Jung-Mo SUNG, Je-Woo HAN, Jin-Young PARK
  • Patent number: 11037806
    Abstract: In a plasma processing method, a substrate is loaded onto a lower electrode within a chamber. A plasma power is applied to form plasma within the chamber. A voltage function of a nonsinusoidal wave having a DC pulse portion and a ramp portion is generated. Generating the voltage function may include setting a slope of the ramp portion and setting a duration ratio of the ramp portion to a cycle of the voltage function in order to control an ion energy distribution generated at a surface of the substrate. A bias power of the nonsinusoidal wave is applied to the lower electrode.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: June 15, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-Yoon Song, Chan-Hoon Park, Jong-Woo Sun, Jung-Mo Sung, Je-Woo Han, Jin-Young Park
  • Publication number: 20210175110
    Abstract: A semiconductor processing apparatus includes a chamber housing, an electrostatic chuck disposed in the chamber housing, the electrostatic chuck being configured to hold a semiconductor wafer, an edge ring surrounding the electrostatic chuck, the edge ring including a ring electrode disposed within the edge ring, and a ring voltage supply configured to supply a ring voltage to the ring electrode, the ring voltage having a non-sinusoidal periodic waveform, wherein each period of the non-sinusoidal periodic waveform comprises a positive voltage applied during a first time period and a negative voltage applied during a second time period, and wherein the negative voltage has a magnitude that increases during the second time period.
    Type: Application
    Filed: February 23, 2021
    Publication date: June 10, 2021
    Inventors: Jung Mo SUNG, Jong Woo SUN, Je Woo HAN, Chan Hoon PARK, Seung Yoon SONG, Seul Ha MYUNG
  • Patent number: 10964578
    Abstract: A semiconductor processing apparatus includes a chamber housing, an electrostatic chuck disposed in the chamber housing, the electrostatic chuck being configured to hold a semiconductor wafer, an edge ring surrounding the electrostatic chuck, the edge ring including a ring electrode disposed within the edge ring, and a ring voltage supply configured to supply a ring voltage to the ring electrode, the ring voltage having a non-sinusoidal periodic waveform, wherein each period of the non-sinusoidal periodic waveform comprises a positive voltage applied during a first time period and a negative voltage applied during a second time period, and wherein the negative voltage has a magnitude that increases during the second time period.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: March 30, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Mo Sung, Jong Woo Sun, Je Woo Han, Chan Hoon Park, Seung Yoon Song, Seul Ha Myung
  • Patent number: 10720491
    Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: July 21, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun Ho Yoon, Won Chul Lee, Sung Yeon Kim, Jae Hong Park, Chan Hoon Park, Yong Moon Jang, Je Woo Han
  • Publication number: 20200227289
    Abstract: In a plasma processing method, a substrate is loaded onto a lower electrode within a chamber. A plasma power is applied to form plasma within the chamber. A voltage function of a nonsinusoidal wave having a DC pulse portion and a ramp portion is generated. Generating the voltage function may include setting a slope of the ramp portion and setting a duration ratio of the ramp portion to a cycle of the voltage function in order to control an ion energy distribution generated at a surface of the substrate. A bias power of the nonsinusoidal wave is applied to the lower electrode.
    Type: Application
    Filed: July 12, 2019
    Publication date: July 16, 2020
    Inventors: Seung-Yoon Song, Chan-Hoon Park, Jong-Woo Sun, Jung-Mo Sung, Je-Woo Han, Jin-Young Park
  • Publication number: 20200135527
    Abstract: A semiconductor processing apparatus includes a chamber housing, an electrostatic chuck disposed in the chamber housing, the electrostatic chuck being configured to hold a semiconductor wafer, an edge ring surrounding the electrostatic chuck, the edge ring including a ring electrode disposed within the edge ring, and a ring voltage supply configured to supply a ring voltage to the ring electrode, the ring voltage having a non-sinusoidal periodic waveform, wherein each period of the non-sinusoidal periodic waveform comprises a positive voltage applied during a first time period and a negative voltage applied during a second time period, and wherein the negative voltage has a magnitude that increases during the second time period.
    Type: Application
    Filed: May 2, 2019
    Publication date: April 30, 2020
    Inventors: Jung Mo SUNG, Jong Woo SUN, Je Woo HAN, Chan Hoon PARK, Seung Yoon SONG, Seul Ha MYUNG
  • Publication number: 20190304751
    Abstract: A plasma processing apparatus may include a support configured to receive a substrate, a gas distribution plate (GDP) including a plurality of nozzles facing the support, a main splitter configured to supply a process gas, and an additional splitter configured to supply an acceleration gas or a deceleration gas. The plurality of nozzles may include a plurality of central nozzles, a plurality of outer nozzles, a plurality of middle nozzles configured to spray the process gas and the acceleration gas, a plurality of first nozzles, and a plurality of second nozzles.
    Type: Application
    Filed: August 31, 2018
    Publication date: October 3, 2019
    Inventors: Chan Hoon Park, Jung Hwan Um, Jin Young Park, Ho Yong Park, Jin Young Bang, Jong Woo Sun, Sang Jean Jeon, Je Woo Han
  • Publication number: 20190273130
    Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.
    Type: Application
    Filed: May 22, 2019
    Publication date: September 5, 2019
    Inventors: Jun Ho YOON, Won Chul LEE, Sung Yeon KIM, Jae Hong PARK, Chan Hoon PARK, Yong Moon JANG, Je Woo HAN
  • Patent number: 10319805
    Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: June 11, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun Ho Yoon, Won Chul Lee, Sung Yeon Kim, Jae Hong Park, Chan Hoon Park, Yong Moon Jang, Je Woo Han
  • Publication number: 20190043694
    Abstract: A plasma processing apparatus includes a chamber, a first electrode disposed in the chamber configured to receive a substrate loaded on the first electrode. A second electrode disposed in the chamber is opposed to the first electrode, and an RF power source is configured to switch between an on-state and an off-state. The RF power source supplies a source RF power to the first or the second electrode and supplies a bias RF power to the first electrode in the on-state. A first DC voltage supply alternately supplies a first DC voltage of negative polarity and a second DC voltage of negative polarity to the second electrode depending status of the first RF power source. The second DC voltage supply is turned on between first and second cycles where the first DC voltage is output to supply a third DC voltage of positive polarity to the first electrode.
    Type: Application
    Filed: February 12, 2018
    Publication date: February 7, 2019
    Inventor: CHAN HOON PARK
  • Publication number: 20180285366
    Abstract: A subject-based ranking determining method and system based on an interaction between a writer and a reader. A subject-based ranking determining method may include evaluating a writer that creates content of a corresponding subject for each subject based on the corresponding subject; and providing a search result in which an evaluation result of the writer on a subject corresponding to an input query is applied to a content ranking in response to input of the query.
    Type: Application
    Filed: April 3, 2018
    Publication date: October 4, 2018
    Inventors: Jinhong Kim, Sanghoon Lee, Jin Hee Kim, Chan Hoon Park, Kwang Hyun Kim, Inho Kang
  • Publication number: 20180108728
    Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.
    Type: Application
    Filed: June 19, 2017
    Publication date: April 19, 2018
    Inventors: Jun Ho YOON, Won Chul LEE, Sung Yeon KIM, Jae Hong PARK, Chan Hoon PARK, Yong Moon JANG, Je Woo HAN