Abstract: A method for fabricating a semiconductor device is disclosed. The method includes providing a substrate; forming at least one gate structure over the substrate; forming a plurality of doped regions in the substrate; forming an etch stop layer over the substrate; removing a first portion of the etch stop layer, wherein a second portion of the etch stop layer remains over the plurality of doped regions; forming a hard mask layer over the substrate; removing a first portion of the hard mask layer, wherein a second portion of the hard mask layer remains over the at least one gate structure; and forming a first contact through the second portion of the hard mask layer to the at least one gate structure, and a second contact through the second portion of the etch stop layer to the plurality of doped regions.

Abstract: A protection structure of a pad is provided. The pad is disposed in a dielectric layer on a semiconductor substrate and the pad includes a connection region and a peripheral region which encompasses the connection region. The protection structure includes at least a barrier, an insulation layer and a mask layer. The barrier is disposed in the dielectric layer in the peripheral region. The insulation layer is disposed on the dielectric layer. The mask layer is disposed on the dielectric layer and covers the insulation layer and the mask layer includes an opening to expose the connection region of the pad.

Abstract: An optoelectronic device including a substrate, a half-boat-shaped material layer, a deep trench isolation structure, and an optical waveguide is provided. The substrate has a first area. The half-boat-shaped material layer is disposed in the substrate within the first area. The refractive index of the half-boat-shaped material layer is lower than that of the substrate. A top surface of the half-boat-shaped material layer is coplanar with the surface of the substrate. The deep trench isolation structure is disposed in the substrate within the first area and located at one side of a bow portion of the half-boat-shaped material layer. The optical waveguide is disposed on the substrate within the first area. The optical waveguide overlaps a portion of the deep trench isolation structure and at least a portion of the half-boat-shaped material layer.

Abstract: A charging station for recharging the battery of and electrically powered vehicle includes a diagnostic interface with the vehicle via an OBDII-type connection or the equivalent or alternatively via a wireless interface, optical interface or an electronic encoding imposed upon the charging current. Optionally a cooling system may be integrated into the charging station to enable thermal control of the energy storage system by providing heating or cooling via a second electrical circuit, or a fluid heat exchange system or by a gas heat exchange system. The charging station may produce a diagnostic test report for the EV that is sold to the vehicle operator, or the report may be provided to the vehicle operator gratis as an incentive to increase utilization of the recharging service.

Abstract: The present invention relates to an engineering design method and a system of implementing same. In one embodiment, the method includes a construction process of knowledge components and a design process based on the knowledge components. The knowledge components pack universal modules in the standard forms. Accordingly, the knowledge components are independent from design layouts or design processes of products, and reusable in different projects and platforms. The design process integrates a variety of software platforms via an uniform environment and calls the knowledge components to complete the engineering designs. Further, the design process defines a data relation and an execution relation of the knowledge components and establishes a relationship between the knowledge components without programming. The universal module comprises at least operations, methods, rules and/or flows of an engineering design process and engineering analysis process.

Abstract: The present invention relates to an engineering design method and a system of implementing same. In one embodiment, the method includes a construction process of knowledge components and a design process based on the knowledge components. The knowledge components pack universal modules in the standard forms. Accordingly, the knowledge components are independent from design layouts or design processes of products, and reusable in different projects and platforms. The design process integrates a variety of software platforms via a uniform environment and calls the knowledge components to complete the engineering designs. Further, the design process defines a data relation and an execution relation of the knowledge components and establishes a relationship between the knowledge components without programming. The universal module comprises at least operations, methods, rules and/or flows of an engineering design process and engineering analysis process.

Abstract: A method of fabricating a MEMS microphone includes: first providing a substrate having a first surface and a second surface. The substrate is divided into a logic region and a MEMS region. The first surface of the substrate is etched to form a plurality of first trenches in the MEMS region. An STI material is then formed in the plurality of first trenches. Subsequently, the second surface of the substrate is etched to form a second trench in the MEMS region, wherein the second trench connects with each of the first trenches. Finally, the STI material in the first trenches is removed.

Abstract: A method of forming the structure of the semiconductor device having a waveguide. Firstly, a SOI substrate including a bulk silicon, an insulating layer, and a silicon layer is provided and a device region and a waveguide region are defined on the SOI substrate. Afterwards, a protection layer and a patterned shielding layer are formed to cover the waveguide region and expose the device region. Subsequently, a recess is formed by etching the protection layer, the silicon layer and the insulating layer and thereby the bulk silicon is exposed. After that, an epitaxial silicon layer is formed in the recess and a semiconductor device is subsequently formed on the epitaxial silicon layer. Also, the present invention conquers the poor electrical performance of the semiconductor device integrated into the SOI substrate.

Abstract: An optoelectronic device including a substrate, a half-boat-shaped material layer, a deep trench isolation structure, and an optical waveguide is provided. The substrate has a first area. The half-boat-shaped material layer is disposed in the substrate within the first area. The refractive index of the half-boat-shaped material layer is lower than that of the substrate. A top surface of the half-boat-shaped material layer is coplanar with the surface of the substrate. The deep trench isolation structure is disposed in the substrate within the first area and located at one side of a bow portion of the half-boat-shaped material layer. The optical waveguide is disposed on the substrate within the first area. The optical waveguide overlaps a portion of the deep trench isolation structure and at least a portion of the half-boat-shaped material layer.

Abstract: A method of fabricating a semiconductor optoelectronic structure is provided. First, a substrate is provided, and a waveguide is formed therein, and then a plurality of dielectric layers is formed on the waveguide. Next, a contact pad and a passivation layer are provided on the dielectric layers and a patterned mask layer is formed thereon. Last, an etching process is provided by using the patterned mask layer to expose the contact pad and remove a portion of the passivation layer and the dielectric layers to form a transformer.

Abstract: A micro electro mechanical system (MEMS) structure is disclosed. The MEMS structure includes a backplate electrode and a 3D diaphragm electrode. The 3D diaphragm electrode has a composite structure so that a dielectric is disposed between two metal layers. The 3D diaphragm electrode is adjacent to the backplate electrode to form a variable capacitor together.

Abstract: A focusing member and an optoelectronic device having the same are provided. The focusing member includes multiple levels of conductive plugs and multiple levels of conductive layers that together form an inversed half-boat shape. The optoelectronic device includes a bottom layer, an optical waveguide above the bottom layer, a dielectric layer covering the optical waveguide, and the above focusing member disposed at an edge of the optoelectronic device and located in the dielectric layer above the optical waveguide. A wider end of the inversed half-boat shape of the focusing member faces the outside of the optoelectronic device. The refractive indexes of the bottom layer and the dielectric layer are smaller than that of the optical waveguide.

Abstract: A method of fabricating MEMS device includes: providing a substrate with a first surface and a second surface. The substrate includes at least one logic region and at least one MEMS region. The logic region includes at least one logic device positioned on the first surface of the substrate. Then, an interlayer material is formed on the first surface of the substrate within the MEMS region. Finally, the second surface of the substrate within the MEMS region is patterned. After the pattern process, a vent pattern is formed in the second surface of the substrate within the MEMS region. The interlayer material does not react with halogen radicals. Therefore, during the formation of the vent pattern, the substrate is protected by the interlayer material and the substrate can be prevented from forming any undercut.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a dielectric layer, a pad structure and a protection structure. The dielectric layer is disposed on the substrate. The pad structure is disposed in the dielectric layer. The pad structure includes a plurality of first metal layers and a plurality of plugs which are electrically connected to each other vertically. There is no contact plug disposed between the pad structure and the substrate. The protection structure is disposed in the dielectric layer and encompasses the pad structure.

Abstract: A color filter structure includes a substrate, in which a number of first pixel regions, a number of second pixel regions, and a number of third pixel regions are defined on the substrate. Each first pixel region includes a first stack layer; each second pixel region includes a second stack layer; and each third pixel region includes the first stack layer and the second stack layer.

Abstract: An integrated circuit (IC) having a microelectromechanical system (MEMS) device buried therein is provided. The integrated circuit includes a substrate, a metal-oxide semiconductor (MOS) device, a metal interconnect, and the MEMS device. The substrate has a logic circuit region and a MEMS region. The MOS device is located on the logic circuit region of the substrate. The metal interconnect, formed by a plurality of levels of wires and a plurality of vias, is located above the substrate to connect the MOS device. The MEMS device is located on the MEMS region, and includes a sandwich membrane located between any two neighboring levels of wires in the metal interconnect and connected to the metal interconnect.

Abstract: A semiconductor photodetector structure is provided. The structure includes a substrate, a photodetecting element and a semiconductor layer disposed on the photodetecting element. The substrate includes a first semiconductor material and includes a deep trench. The surface of the deep trench includes a first type dopant. The photodetecting element is disposed in the deep trench. The photodetecting element includes a second semiconductor material. The semiconductor layer includes a second type dopant.

Abstract: A display device including a rotatable stand and a display module provided on the rotatable stand is provided. The rotatable stand includes a base, a sleeve provided on the base, a composite washer, and a rotatable structure. One end of the sleeve is connected with the base. The composite washer has a flexible material layer and a rigid material layer. Further, the rotatable structure is disposed through the sleeve, the display module is adapted to be fixedly connected with one end of the rotatable structure, and the composite washer is disposed between the display module and the sleeve. The first rigid material layer contacts the display module, and the flexible material layer is disposed between the sleeve and the second rigid material layer.

Abstract: A protection structure of a pad is provided. The pad is disposed in a dielectric layer on a semiconductor substrate and the pad includes a connection region and a peripheral region which encompasses the connection region. The protection structure includes at least a barrier, an insulation layer and a mask layer. The barrier is disposed in the dielectric layer in the peripheral region. The insulation layer is disposed on the dielectric layer. The mask layer is disposed on the dielectric layer and covers the insulation layer and the mask layer includes an opening to expose the connection region of the pad.

Abstract: A method for fabricating a semiconductor device is disclosed. The method includes providing a substrate; forming at least one gate structure over the substrate; forming a plurality of doped regions in the substrate; forming an etch stop layer over the substrate; removing a first portion of the etch stop layer, wherein a second portion of the etch stop layer remains over the plurality of doped regions; forming a hard mask layer over the substrate; removing a first portion of the hard mask layer, wherein a second portion of the hard mask layer remains over the at least one gate structure; and forming a first contact through the second portion of the hard mask layer to the at least one gate structure, and a second contact through the second portion of the etch stop layer to the plurality of doped regions.